From fef5531fd8f311b347970568d77e7bf4feffd7fb Mon Sep 17 00:00:00 2001 From: Ayan Kumar Halder Date: Thu, 10 Mar 2022 17:45:00 +0000 Subject: [PATCH] xen/arm64: io: Handle the abort due to access to stage1 translation table If the abort was caused due to access to stage1 translation table, Xen will try to set the p2m entry (assuming that the Stage 1 translation table is in the non MMIO region). If there is no such entry found, then Xen will try to map the address as a MMIO region (assuming that the Stage 1 translation table is in the direct MMIO region). If that fails as well, then there are the two following scenarios:- 1. Stage 1 translation table being in an emulated MMIO region - Xen can read the region, but it has no way to return the value read to the CPU page table walker (which tries to go through the stage1 tables to resolve the translation fault). 2. Stage 1 translation table address is invalid. In both the above scenarios, Xen will forward the abort to the guest. Signed-off-by: Ayan Kumar Halder Reviewed-by: Julien Grall --- xen/arch/arm/io.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/xen/arch/arm/io.c b/xen/arch/arm/io.c index fd903b7b03..53729a342b 100644 --- a/xen/arch/arm/io.c +++ b/xen/arch/arm/io.c @@ -128,6 +128,17 @@ void try_decode_instruction(const struct cpu_user_regs *regs, return; } + /* + * At this point, we know that the stage1 translation table is either in + * an emulated MMIO region or its address is invalid. This is not + * expected by Xen and thus it forwards the abort to the guest. + */ + if ( info->dabt.s1ptw ) + { + info->dabt_instr.state = INSTR_ERROR; + return; + } + /* * Armv8 processor does not provide a valid syndrome for decoding some * instructions. So in order to process these instructions, Xen must -- 2.30.2