From dc036ab9d506b997777c7656d9e6e4fa32bc582e Mon Sep 17 00:00:00 2001 From: Roger Pau Monne Date: Mon, 27 Jul 2020 19:05:37 +0200 Subject: [PATCH] x86/hvm: fix ISA IRQ 0 handling when set as lowest priority mode in IO APIC MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Lowest priority destination mode does allow the vIO APIC code to select a vCPU to inject the interrupt to, but the selected vCPU must be part of the possible destinations configured for such IO APIC pin. Fix the code in order to only force vCPU 0 if it's part of the listed destinations. Signed-off-by: Roger Pau Monné Reviewed-by: Andrew Cooper --- xen/arch/x86/hvm/vioapic.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/hvm/vioapic.c b/xen/arch/x86/hvm/vioapic.c index 123191db75..67d4a6237f 100644 --- a/xen/arch/x86/hvm/vioapic.c +++ b/xen/arch/x86/hvm/vioapic.c @@ -415,12 +415,14 @@ static void vioapic_deliver(struct hvm_vioapic *vioapic, unsigned int pin) case dest_LowestPrio: { #ifdef IRQ0_SPECIAL_ROUTING - /* Force round-robin to pick VCPU 0 */ - if ( (irq == hvm_isa_irq_to_gsi(0)) && pt_active(&d->arch.vpit.pt0) ) - { - v = d->vcpu ? d->vcpu[0] : NULL; - target = v ? vcpu_vlapic(v) : NULL; - } + struct vlapic *lapic0 = vcpu_vlapic(d->vcpu[0]); + + /* Force to pick vCPU 0 if part of the destination list */ + if ( (irq == hvm_isa_irq_to_gsi(0)) && pt_active(&d->arch.vpit.pt0) && + vlapic_match_dest(lapic0, NULL, 0, dest, dest_mode) && + /* Mimic the vlapic_enabled check found in vlapic_lowest_prio. */ + vlapic_enabled(lapic0) ) + target = lapic0; else #endif target = vlapic_lowest_prio(d, NULL, 0, dest, dest_mode); -- 2.30.2