From cebb4e854200d6247afe903692acc76a780e0020 Mon Sep 17 00:00:00 2001 From: Stefano Stabellini Date: Tue, 9 Oct 2012 15:05:37 +0100 Subject: [PATCH] xen/arm: protect LR registers and lr_mask changes with spin_lock_irq GICH_LR registers and lr_mask need to be kept in sync: make sure that their modifications are protected by spin_lock_irq(&gic.lock). Signed-off-by: Stefano Stabellini Acked-by: Ian Campbell Committed-by: Ian Campbell --- xen/arch/arm/gic.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 6f5b0e1b16..ab9340480c 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -57,9 +57,11 @@ void gic_save_state(struct vcpu *v) { int i; + spin_lock_irq(&gic.lock); for ( i=0; iarch.gic_lr[i] = GICH[GICH_LR + i]; v->arch.lr_mask = gic.lr_mask; + spin_unlock_irq(&gic.lock); /* Disable until next VCPU scheduled */ GICH[GICH_HCR] = 0; isb(); @@ -72,9 +74,11 @@ void gic_restore_state(struct vcpu *v) if ( is_idle_vcpu(v) ) return; + spin_lock_irq(&gic.lock); gic.lr_mask = v->arch.lr_mask; for ( i=0; iarch.gic_lr[i]; + spin_unlock_irq(&gic.lock); GICH[GICH_HCR] = GICH_HCR_EN; isb(); @@ -469,9 +473,11 @@ static void gic_restore_pending_irqs(struct vcpu *v) i = find_first_zero_bit(&gic.lr_mask, nr_lrs); if ( i >= nr_lrs ) return; + spin_lock_irq(&gic.lock); gic_set_lr(i, p->irq, GICH_LR_PENDING, p->priority); list_del_init(&p->lr_queue); set_bit(i, &gic.lr_mask); + spin_unlock_irq(&gic.lock); } } -- 2.30.2