From b35d0a26983843c092bfa353fd6b9aa8c3bf4886 Mon Sep 17 00:00:00 2001 From: Yang Zhang Date: Thu, 22 Aug 2013 10:50:13 +0200 Subject: [PATCH] Nested VMX: Force check ISR when L2 is running External interrupt is allowed to notify CPU only when it has higher priority than current in servicing interrupt. With APIC-v, the priority comparing is done by hardware and hardware will inject the interrupt to VCPU when it recognizes an interrupt. Currently, there is no virtual APIC-v feature available for L1 to use, so when L2 is running, we still need to compare interrupt priority with ISR in hypervisor instead via hardware. Signed-off-by: Yang Zhang Acked-by: "Dong, Eddie" --- xen/arch/x86/hvm/vlapic.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index 7a154f9ac2..f1530fdedb 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -37,6 +37,7 @@ #include #include #include +#include #include #include @@ -1037,7 +1038,8 @@ int vlapic_has_pending_irq(struct vcpu *v) if ( irr == -1 ) return -1; - if ( vlapic_virtual_intr_delivery_enabled() ) + if ( vlapic_virtual_intr_delivery_enabled() && + !nestedhvm_vcpu_in_guestmode(v) ) return irr; isr = vlapic_find_highest_isr(vlapic); -- 2.30.2