From 9bd6b01f9d466a5836633599934d6637b965133f Mon Sep 17 00:00:00 2001 From: Andrew Cooper Date: Mon, 9 Jan 2017 13:42:02 +0000 Subject: [PATCH] x86/hvm: Conditionally leave CPUID Faulting active in HVM context If the hardware supports faulting, and the guest has chosen to use it, leave faulting active in HVM context. It is more efficient to have hardware convert CPUID to a #GP fault (which we don't intercept), than to take a VMExit and have Xen re-inject a #GP fault. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich Reviewed-by: Kevin Tian --- xen/arch/x86/cpu/intel.c | 5 +++-- xen/arch/x86/hvm/vmx/vmx.c | 12 ++++++++++-- 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c index 2e11662f7a..d0e380c3c6 100644 --- a/xen/arch/x86/cpu/intel.c +++ b/xen/arch/x86/cpu/intel.c @@ -175,8 +175,9 @@ static void intel_ctxt_switch_levelling(const struct vcpu *next) * generating the maximum full cpuid policy into Xen, at which * this problem will disappear. */ - set_cpuid_faulting(nextd && is_pv_domain(nextd) && - !is_control_domain(nextd)); + set_cpuid_faulting(nextd && !is_control_domain(nextd) && + (is_pv_domain(nextd) || + next->arch.cpuid_faulting)); return; } diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index a5e5ffdcac..dcb308cdf7 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -2866,11 +2866,19 @@ static int vmx_msr_write_intercept(unsigned int msr, uint64_t msr_content) break; case MSR_INTEL_MISC_FEATURES_ENABLES: + { + bool old_cpuid_faulting = v->arch.cpuid_faulting; + if ( msr_content & ~MSR_MISC_FEATURES_CPUID_FAULTING ) goto gp_fault; - v->arch.cpuid_faulting = - !!(msr_content & MSR_MISC_FEATURES_CPUID_FAULTING); + + v->arch.cpuid_faulting = msr_content & MSR_MISC_FEATURES_CPUID_FAULTING; + + if ( cpu_has_cpuid_faulting && + (old_cpuid_faulting ^ v->arch.cpuid_faulting) ) + ctxt_switch_levelling(v); break; + } default: if ( passive_domain_do_wrmsr(msr, msr_content) ) -- 2.30.2