From 8eaca58a104bf6a79202373d07d835a40268181e Mon Sep 17 00:00:00 2001 From: Keir Fraser Date: Fri, 13 Mar 2009 07:45:11 +0000 Subject: [PATCH] [SVM] Always read zero AMD C1E control MSR to allow cross-vendor migration Signed-off-by: Christoph Egger --- xen/arch/x86/hvm/hvm.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index c19d36a9d3..c8c53c6244 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -1776,6 +1776,15 @@ int hvm_msr_read_intercept(struct cpu_user_regs *regs) msr_content = var_range_base[index]; break; + case MSR_K8_ENABLE_C1E: + /* There's no point in letting the guest see C-States. + * Further, this AMD-only register may be accessed if this HVM guest + * has been migrated to an Intel host. This fixes a guest crash + * in this case. + */ + msr_content = 0; + break; + default: return hvm_funcs.msr_read_intercept(regs); } -- 2.30.2