From 6fd5f43ad974e8759a9c7bb6c61987fc214f27cc Mon Sep 17 00:00:00 2001 From: "Liu, Jinsong" Date: Wed, 26 Sep 2012 12:14:30 +0200 Subject: [PATCH] x86: Expose TSC adjust to HVM guest Intel latest SDM (17.13.3) release a new MSR CPUID.7.0.EBX[1]=1 indicates TSC_ADJUST MSR 0x3b is supported. This patch expose it to hvm guest. Signed-off-by: Liu, Jinsong Committed-by: Jan Beulich --- tools/libxc/xc_cpufeature.h | 1 + tools/libxc/xc_cpuid_x86.c | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/tools/libxc/xc_cpufeature.h b/tools/libxc/xc_cpufeature.h index e1772337ad..c464e3a84b 100644 --- a/tools/libxc/xc_cpufeature.h +++ b/tools/libxc/xc_cpufeature.h @@ -128,6 +128,7 @@ /* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx) */ #define X86_FEATURE_FSGSBASE 0 /* {RD,WR}{FS,GS}BASE instructions */ +#define X86_FEATURE_TSC_ADJUST 1 /* Tsc thread offset */ #define X86_FEATURE_BMI1 3 /* 1st group bit manipulation extensions */ #define X86_FEATURE_HLE 4 /* Hardware Lock Elision */ #define X86_FEATURE_AVX2 5 /* AVX2 instructions */ diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c index 0882ce6554..17efc0f841 100644 --- a/tools/libxc/xc_cpuid_x86.c +++ b/tools/libxc/xc_cpuid_x86.c @@ -362,7 +362,8 @@ static void xc_cpuid_hvm_policy( case 0x00000007: /* Intel-defined CPU features */ if ( input[1] == 0 ) { - regs[1] &= (bitmaskof(X86_FEATURE_BMI1) | + regs[1] &= (bitmaskof(X86_FEATURE_TSC_ADJUST) | + bitmaskof(X86_FEATURE_BMI1) | bitmaskof(X86_FEATURE_HLE) | bitmaskof(X86_FEATURE_AVX2) | bitmaskof(X86_FEATURE_SMEP) | -- 2.30.2