From 5fe515a0fede07543f2a3b049167b1fd8b873caf Mon Sep 17 00:00:00 2001 From: Jan Beulich Date: Tue, 7 Jul 2020 14:37:46 +0200 Subject: [PATCH] vtd: improve IOMMU TLB flush MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Do not limit PSI flushes to order 0 pages, in order to avoid doing a full TLB flush if the passed in page has an order greater than 0 and is aligned. Should increase the performance of IOMMU TLB flushes when dealing with page orders greater than 0. This is part of XSA-321. Signed-off-by: Jan Beulich Reviewed-by: Roger Pau Monné --- xen/drivers/passthrough/vtd/iommu.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c index 208b33c0e4..dcc9b7a35e 100644 --- a/xen/drivers/passthrough/vtd/iommu.c +++ b/xen/drivers/passthrough/vtd/iommu.c @@ -576,13 +576,14 @@ static int __must_check iommu_flush_iotlb(struct domain *d, dfn_t dfn, if ( iommu_domid == -1 ) continue; - if ( page_count != 1 || dfn_eq(dfn, INVALID_DFN) ) + if ( !page_count || (page_count & (page_count - 1)) || + dfn_eq(dfn, INVALID_DFN) || !IS_ALIGNED(dfn_x(dfn), page_count) ) rc = iommu_flush_iotlb_dsi(iommu, iommu_domid, 0, flush_dev_iotlb); else rc = iommu_flush_iotlb_psi(iommu, iommu_domid, dfn_to_daddr(dfn), - PAGE_ORDER_4K, + get_order_from_pages(page_count), !dma_old_pte_present, flush_dev_iotlb); -- 2.30.2