From 49e65b1ca730eae7691c91c7bbdb0787521cb13e Mon Sep 17 00:00:00 2001 From: Ian Campbell Date: Mon, 30 Mar 2015 12:18:08 +0100 Subject: [PATCH] xen: arm: Fix handling of ICC_{SGI1R,SGI0R,ASGI1R}_EL1 Having injected an undefined instruction we don't want to also advance pc. So return. The ICC_{SGI0R,ASGI1R}_EL1 case was previously missing a break, so would have fallen through to the default case and injected a second undef, corrupting SPSR_EL1 and ELR_EL1 for the guest. Signed-off-by: Ian Campbell Reviewed-by: Julien Grall --- xen/arch/arm/traps.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index 74b3f0f79c..c11c0638e6 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -1909,7 +1909,7 @@ static void do_sysreg(struct cpu_user_regs *regs, { dprintk(XENLOG_WARNING, "failed emulation of sysreg ICC_SGI1R_EL1 access\n"); - inject_undef64_exception(regs, hsr.len); + return inject_undef64_exception(regs, hsr.len); } break; case HSR_SYSREG_ICC_SGI0R_EL1: @@ -1917,7 +1917,7 @@ static void do_sysreg(struct cpu_user_regs *regs, /* TBD: Implement to support secure grp0/1 SGI forwarding */ dprintk(XENLOG_WARNING, "Emulation of sysreg ICC_SGI0R_EL1/ASGI1R_EL1 not supported\n"); - inject_undef64_exception(regs, hsr.len); + return inject_undef64_exception(regs, hsr.len); default: { const struct hsr_sysreg sysreg = hsr.sysreg; -- 2.30.2