From 3ecf35ddfd1de4ace5643b6940848776f8cd9c92 Mon Sep 17 00:00:00 2001
From: YunQiang Su <wzssyqa@gmail.com>
Date: Wed, 20 Dec 2023 18:07:36 +0100
Subject: [PATCH] use configuration directive to set mips fpu mode

Forwarded: https://github.com/paul99/v8m-rb/issues/192
Last-Update: 2015-09-29


Gbp-Pq: Topic mips
Gbp-Pq: Name fpu.patch
---
 deps/v8/src/base/cpu.cc | 21 +++++----------------
 1 file changed, 5 insertions(+), 16 deletions(-)

diff --git a/deps/v8/src/base/cpu.cc b/deps/v8/src/base/cpu.cc
index 571a1b6a2..a4a7b6549 100644
--- a/deps/v8/src/base/cpu.cc
+++ b/deps/v8/src/base/cpu.cc
@@ -197,22 +197,11 @@ static uint32_t ReadELFHWCaps() {
 
 #if V8_HOST_ARCH_MIPS
 int __detect_fp64_mode(void) {
-  double result = 0;
-  // Bit representation of (double)1 is 0x3FF0000000000000.
-  __asm__ volatile(
-      ".set push\n\t"
-      ".set noreorder\n\t"
-      ".set oddspreg\n\t"
-      "lui $t0, 0x3FF0\n\t"
-      "ldc1 $f0, %0\n\t"
-      "mtc1 $t0, $f1\n\t"
-      "sdc1 $f0, %0\n\t"
-      ".set pop\n\t"
-      : "+m"(result)
-      :
-      : "t0", "$f0", "$f1", "memory");
-
-  return !(result == 1);
+#ifdef FPU_MODE_FP64
+  return 1;
+#else
+  return 0;
+#endif
 }
 
 
-- 
2.30.2