xen/arm: Add workaround for Cortex-A53 erratum #843419
authorLuca Fancellu <luca.fancellu@arm.com>
Thu, 10 Dec 2020 10:42:58 +0000 (10:42 +0000)
committerStefano Stabellini <sstabellini@kernel.org>
Thu, 17 Dec 2020 01:56:33 +0000 (17:56 -0800)
commitd81133d45d81d35a4e7445778bfd1179190cbd31
tree74d4f5bc2d480e55bd2b3fb1e9b59b18ca7441f0
parentac6a0af3870ba0f7ffb16af3e41827b0a53f88b0
xen/arm: Add workaround for Cortex-A53 erratum #843419

On the Cortex A53, when executing in AArch64 state, a load or store instruction
which uses the result of an ADRP instruction as a base register, or which uses
a base register written by an instruction immediately after an ADRP to the
same register, might access an incorrect address.

The workaround is to enable the linker flag --fix-cortex-a53-843419
if present, to check and fix the affected sequence. Otherwise print a warning
that Xen may be susceptible to this errata

Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
docs/misc/arm/silicon-errata.txt
xen/arch/arm/Kconfig
xen/arch/arm/Makefile
xen/scripts/Kbuild.include