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(parent: dcfd9a5) | patch
x86/HVM: correct segment register loading during task switch
authorJan Beulich <jbeulich@suse.com>
Mon, 26 Sep 2016 15:27:34 +0000 (17:27 +0200)
committerJan Beulich <jbeulich@suse.com>
Mon, 26 Sep 2016 15:27:34 +0000 (17:27 +0200)
commitbdb860d01cac7bcbaebbdce29ae9e9c7e9582d03
tree72104a6b88897ca20719e118243ee19b396795f8tree | snapshot
parentdcfd9a5eadedc71d8546286b881bba7db152207acommit | diff
x86/HVM: correct segment register loading during task switch

Instead of #NP, #SS needs to be raised for a non-present %ss
descriptor.

Don't lose the low two selector bits on null selector loads.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
xen/arch/x86/hvm/hvm.c diff | blob | history
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