x86/tsx: Cope with TSX deprecation on SKL/KBL/CFL/WHL
authorAndrew Cooper <andrew.cooper3@citrix.com>
Wed, 16 Sep 2020 15:15:52 +0000 (16:15 +0100)
committerAndrew Cooper <andrew.cooper3@citrix.com>
Wed, 9 Jun 2021 13:17:58 +0000 (14:17 +0100)
commit3e09045991cde360432bc7437103f8f8a6699359
treed241ca72551009477cf7ba14b235a7925af641e3
parentf5035d480f7a7033f15765b67c19df86a8ef2c69
x86/tsx: Cope with TSX deprecation on SKL/KBL/CFL/WHL

The June 2021 microcode is formally de-featuring TSX on the older Skylake
client CPUs.  The workaround from the March 2019 microcode is being dropped,
and replaced with additions to MSR_TSX_FORCE_ABORT to hide the HLE/RTM CPUID
bits.

With this microcode in place, TSX is disabled by default on these CPUs.
Backwards compatibility is provided in the same way as for TAA - RTM force
aborts, rather than suffering #UD, and the CPUID bits can be hidden to recover
performance.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
docs/misc/xen-command-line.pandoc
tools/misc/xen-cpuid.c
xen/arch/x86/tsx.c
xen/include/asm-x86/cpufeature.h
xen/include/asm-x86/msr-index.h
xen/include/public/arch-x86/cpufeatureset.h