dgit.raspbian.org Git - spirv-llvm-translator-15.git/log

[PATCH 23/79] [Backport to 15][DebugInfo] Support translation of DIStringType (#1877)

This type instruction describes a string, mostly for Fortran 90.

Spec:
KhronosGroup/SPIRV-Registry#186

Gbp-Pq: Name 0023-Backport-to-15-DebugInfo-Support-translation-of-DISt.patch

[PATCH 22/79] [Backport to 15][DebugInfo] Add DebugTypeArrayDynamic translation (#1871)

This instruction describes a dynamic array, mostly for Fortran 90.

Unlike DebugTypeArray it has Data Location, Associated, Allocated
and Rank parameters. If the appropriate metadata parameters
appear in LLVM IR in DW_TAG_array_type metadata, then such
debug type becomes treated as dynamic array by the translator
(of course if the appropriate extended instruction set is enabled).

Spec:
https://github.com/KhronosGroup/SPIRV-Registry/pull/186

Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
Gbp-Pq: Name 0022-Backport-to-15-DebugInfo-Add-DebugTypeArrayDynamic-t.patch

[PATCH 21/79] [Backport to 15][DebugInfo] Add an option for NonSemantic.Shader.DebugInfo.100 (#1855)

Under this option this extended instruction set will be implemented
Spec:
https://github.com/KhronosGroup/SPIRV-Registry/blob/main/nonsemantic/NonSemantic.Shader.DebugInfo.100.asciidoc

TODO: to rename NonSemantic.Kernel.DebugInfo.100 to
NonSemantic.Shader.DebugInfo.200 when the name is stable

Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
Gbp-Pq: Name 0021-Backport-to-15-DebugInfo-Add-an-option-for-NonSemant.patch

[PATCH 20/79] [Backport to 15][DebugInfo] Add new Source Languages table used in DebugCompilationUnit (#1854)

This extended source language table is used by DebugCompilationUnit instruction when the extension is enabled. It enables support for more languages than exists in a core specification.
Spec: KhronosGroup/SPIRV-Registry#186

Enabling of Fortran language also allowed to fix FortranArray test that was originally XFAIL-ed in 9e234d9.

Gbp-Pq: Name 0020-Backport-to-15-DebugInfo-Add-new-Source-Languages-ta.patch

[PATCH 19/79] [Backport to 15][DebugInfo] Add Target Function optional parameter to DebugFunction (#1853)

It's being added in
KhronosGroup/SPIRV-Registry#186

In DWARF it's used in 'trampoline' functions generated for Fortran external function calls.

Gbp-Pq: Name 0019-Backport-to-15-DebugInfo-Add-Target-Function-optiona.patch

[PATCH 18/79] [Backport to 15] Initial support NonSemantic.Kernel.DebugInfo.100 (#1846)

This patch implements the initial support for the new debug specification NonSemantic.Kernel.DebugInfo.100.
It also introduces support for the new debug instruction DISubrange.

Spec: KhronosGroup/SPIRV-Registry#186

Gbp-Pq: Name 0018-Backport-to-15-Initial-support-NonSemantic.Kernel.De.patch

[PATCH 17/79] Update spirv-as invocations (#1933)

After SPIRV-Tools commit 2e0f4b52 ("tools: refactorize tools flags
parsing. (#5111)", 2023-02-27), spirv-as needs to be told explicitly
when reading from stdin.

Co-authored-by: Sven van Haastregt <sven.vanhaastregt@arm.com>
Gbp-Pq: Name 0017-Update-spirv-as-invocations-1933.patch

[PATCH 16/79] Fix mangling of opcodes from SPV_KHR_bit_instructions in SPV-IR (#1869)

Gbp-Pq: Name 0016-Fix-mangling-of-opcodes-from-SPV_KHR_bit_instruction.patch

[PATCH 15/79] Allow ReadNone and ReadOnly as Function attributes

Gbp-Pq: Name 0015-Allow-ReadNone-and-ReadOnly-as-Function-attributes.patch

[PATCH 14/79] [Backport to 15] Put memory(none) attribute instead of readnone (#1746)

Instead of creating readnone attributes on each parameter of
a function it's better to put just memory(none) which was recently
introduced.

See https://reviews.llvm.org/D135780

Co-authored by: Zou, Feng <feng.zou@intel.com>

Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
Gbp-Pq: Name 0014-Backport-to-15-Put-memory-none-attribute-instead-of-.patch

[PATCH 13/79] [Backport to 15] Translate readnone attribute as function parameter attribute (#1697)

Community restricted readnone, readonly and writeonly attributes
to be only function parameter attributes. This patch aligns
the translator with llvm.org.

It also fixes a bug, when readnone attribute is being mapped
to NoWrite SPIR-V function parameter attribute.

Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
Gbp-Pq: Name 0013-Backport-to-15-Translate-readnone-attribute-as-funct.patch

[PATCH 12/79] Deprecate SPV_INTEL_non_constant_addrspace_printf extension (#1818)

This change continues #1749.
We are removing SPV_INTEL_non_constant_addrspace_printf extension in
favor of SPV_EXT_relaxed_printf_string_address_space, which are
basically the same.

Signed-off-by: Maksimova, Viktoria <viktoria.maksimova@intel.com>
Gbp-Pq: Name 0012-Deprecate-SPV_INTEL_non_constant_addrspace_printf-ex.patch

[PATCH 11/79] [Backport to 15] Add SPV_EXT_relaxed_printf_string_address_space extension

The original change: #1749

The extension was added in https://github.com/KhronosGroup/SPIRV-Registry/pull/148

Starting from this PR SPV_INTEL_non_constant_addrspace_printf will
be step by step deprecated.

Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
Gbp-Pq: Name 0011-Backport-to-15-Add-SPV_EXT_relaxed_printf_string_add.patch

[PATCH 10/79] [Backport to 15] Relax OpenCL extended instruction restrictions (#1755)

* [Backport to 15] Relax OpenCL extended instruction restrictions (#1724)

When VectorAnyINTEL capability is enabled, OpenCL extended instructions
are able to work on vector types with any number of components greater
then or equal to 2.

* [Backport to 15] Translate LLVM intrinsics into native_* OpenCL instructions (#1729)

When an intrinsic function is called with `afn` flag, it's allowed to
substitute an approximate calculations. So the translator can emit
native versions of OpenCL extended instructions.

Co-authored-by: Victor Mustya <victor.mustya@intel.com>
Gbp-Pq: Name 0010-Backport-to-15-Relax-OpenCL-extended-instruction-res.patch

[PATCH 09/79] [Backport to 15] Fix builtin vars translation

The translator was crashing in case if builin GV was accessed via
GEP without AS cast due to incorrect assumption.

Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
Gbp-Pq: Name 0009-Backport-to-15-Fix-builtin-vars-translation.patch

[PATCH 08/79] [Backport to 15] Implement SPV_INTEL_tensor_float32_conversion extension (#1656) (#1700)

This extension adds conversion instruction from float to tensor float (TF32)
data format. TF32 uses 1 bit for a sign, 8 bits for an exponent and 10 bits
for a fraction. This extension doesn’t introduce TF32 type in SPIR-V, instead
instruction below uses 32-bit float type to represent TF32 value.

Spec: https://github.com/intel/llvm/pull/6990

Co-authored-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
Gbp-Pq: Name 0008-Backport-to-15-Implement-SPV_INTEL_tensor_float32_co.patch

[PATCH 07/79] [Backport to 15] Translate llvm.loop.unroll.full metadata (#1673)

It can be generated via #pragma clang unroll(full) pragma.
llvm.loop.unroll.full means attempt to do full unroll of the
loop and disable the unrolling if the trip count is not known
at compile time.

Unroll mask to which it was previously mapped doesn't much the
description.

The way the patch represents it in SPIR-V is:
Unroll mask + PartialCount mask with '1' parameter

This patch also removes some overtesting for unroll metadata.

This backports: https://github.com/KhronosGroup/SPIRV-LLVM-Translator/pull/1664

Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
Gbp-Pq: Name 0007-Backport-to-15-Translate-llvm.loop.unroll.full-metad.patch

[PATCH 06/79] [Backport to 15] Add SPV_INTEL_masked_gather_scatter extension (#1580) (#1695)

This extension allows TypeVector to have a Physical Pointer Type
Component Type and introduces gather/scatter instructions.
It will be useful for explicitly vectorized kernels.

Spec: https://github.com/intel/llvm/pull/6613

Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com
Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com
Co-authored-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
Gbp-Pq: Name 0006-Backport-to-15-Add-SPV_INTEL_masked_gather_scatter-e.patch

[PATCH 05/79] [NFC] Initialize a variable

Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
Gbp-Pq: Name 0005-NFC-Initialize-a-variable.patch

[PATCH 04/79] [NFC] Replace getPointerElementType in SPIRVRegularizeLLVM

Signed-off-by: Sidorov, Dmitry <dmitry.sidorov@intel.com>
Gbp-Pq: Name 0004-NFC-Replace-getPointerElementType-in-SPIRVRegularize.patch

[PATCH 03/79] [CI] Upgrade to Ubuntu 20.04

The Ubuntu 18.04 image is marked deprecated [1], so move to a newer
image.

[1] https://github.com/actions/runner-images

Gbp-Pq: Name 0003-CI-Upgrade-to-Ubuntu-20.04.patch

[PATCH 02/79] Add support for split barriers extension SPV_INTEL_split_barrier (#1424) (#1663)

This PR adds support for split barriers and the SPV_INTEL_split_barrier extension.

The related SPIR-V extension spec can be found here:

* https://github.com/KhronosGroup/SPIRV-Registry/pull/136

The related OpenCL C extension spec can be found here:

* https://github.com/KhronosGroup/OpenCL-Docs/pull/765

Co-authored-by: Ben Ashbaugh <ben.ashbaugh@intel.com>
Gbp-Pq: Name 0002-Add-support-for-split-barriers-extension-SPV_INTEL_s.patch

[PATCH 01/79] Integer dot product 4x8 packed translation (#1654)

Changed the integer dot translation to use the correct function names
(i.e. dot_4x8packed or dot_acc_sat_4x8packed) to translate them into
proper OpCodes. Additionally removed unused variables from visitCallDot

Gbp-Pq: Name 0001-Integer-dot-product-4x8-packed-translation-1654.patch

spirv-llvm-translator-15 (15.0.0-7) unstable; urgency=medium

  * Skip upstream testsuite on big-endian architectures (> 60% of the tests
    are failing anyway but ignored) due to excessive disk space usage
    (> 40 GB).  (Closes: #1065395)
  * Update from llvm_release_150 branch (v15.0.0-85-gda050541).
  * Disable two commits causing test failures.

[dgit import unpatched spirv-llvm-translator-15 15.0.0-7]

Import spirv-llvm-translator-15_15.0.0-7.debian.tar.xz

[dgit import tarball spirv-llvm-translator-15 15.0.0-7 spirv-llvm-translator-15_15.0.0-7.debian.tar.xz]