Ian Campbell [Wed, 31 Jul 2013 15:15:51 +0000 (16:15 +0100)]
tools: remove in tree libaio
We have defaulted to using the system libaio for a while now and I din't think
there are any relevant distros which don't have it that running Xen 4.4 would
be reasonable on.
Also it has caused confusion because it is not ever wanted on ARM, but the
build system doesn't express that (could be fixed, but deleting is the right
thing to do anyway).
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Matt Wilson <msw@amazon.com>
Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Ian Campbell [Wed, 31 Jul 2013 15:15:50 +0000 (16:15 +0100)]
tools: make building xend configurable.
xend has been deprecated for 2 releases now. Lets make it possible to not even
build it.
For now I'm leaving the default of on but I would like to change that before
the 4.4 release.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Matt Wilson <msw@amazon.com>
Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Ian Campbell [Wed, 31 Jul 2013 15:15:49 +0000 (16:15 +0100)]
tools: move xm and xend under tools python
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Matt Wilson <msw@amazon.com>
Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Andre Przywara [Tue, 13 Aug 2013 15:13:07 +0000 (17:13 +0200)]
ARM: add Calxeda Midway platform
Calxeda Midway is an ARMv7 server platform with Cortex-A15 cores.
The peripheral side has many similarities with the machine known as
Highbank.
Add Calxeda Midway to the list of supported platforms to avoid a
warning on boot and provide the proper reset method.
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
Matthew Daley [Wed, 14 Aug 2013 22:20:54 +0000 (10:20 +1200)]
libxc: silence HVM domain creation messages
There's no need for xl to output these messages on HVM domain creation
to stderr by default.
Change their loglevels from XTL_INFO to XTL_DETAIL; then the messages
output by xl are the same as those for PV domain creation. These
now-silenced messages can still be seen using verbose (-v) mode.
Signed-off-by: Matthew Daley <mattjd@gmail.com>
Bob Proulx [Fri, 9 Aug 2013 07:18:19 +0000 (01:18 -0600)]
vif-bridge: fix cut behavior change
A recent change in GNU cut disallows use of a newline as a field
delimiter. Avoid the problematic use of cut in vif-bridge.
Signed-off-by: Bob Proulx <bob@proulx.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Andre Przywara [Tue, 13 Aug 2013 15:12:52 +0000 (17:12 +0200)]
PL011: don't force baud rate of 38400 bps
The PL011 driver currently sets the baudrate to a hardcoded value of
38400 bits/second. This will break Calxeda Midway, which uses 115200
bps.
Instead don't tinker with the baud rate register at all and rely on
the firmware or bootloader setting the correct value in here.
This works fine on Versatile Express and Calxeda Midway.
Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Andrew Cooper [Tue, 13 Aug 2013 13:17:19 +0000 (14:17 +0100)]
tools: Cull more ia64 and ppc code
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Ian Campbell <Ian.Campbell@citrix.com>
Julien Grall [Thu, 8 Aug 2013 12:56:51 +0000 (13:56 +0100)]
xen/arm: erratum 766422: decode thumb store during data abort
From the errata document:
When a non-secure non-hypervisor memory operation instruction generates a
stage2 page table translation fault, a trap to the hypervisor will be triggered.
For an architecturally defined subset of instructions, the Hypervisor Syndrome
Register (HSR) will have the Instruction Syndrome Valid (ISV) bit set to 1’b1,
and the Rt field should reflect the source register (for stores) or destination
register for loads.
On Cortex-A15, for Thumb and ThumbEE stores, the Rt value may be incorrect
and should not be used, even if the ISV bit is set. All loads, and all ARM
instruction set loads and stores, will have the correct Rt value if the ISV
bit is set.
To avoid this issue, Xen needs to decode thumb store instruction and update
the transfer register.
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Julien Grall [Thu, 8 Aug 2013 12:56:50 +0000 (13:56 +0100)]
xen/arm: Start to implement an ARM decoder instruction
Some errata on ARM processor requires to decode the instruction.
The decoder will, obviously, decode and fill the ISS fields of the hsr_dabt.
For the moment, the decoder only supports:
- THUMB2 store instruction
- THUMB single load/store instruction
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Bastian Blank [Sun, 11 Aug 2013 20:10:20 +0000 (22:10 +0200)]
tools: xen-mceinj: Add missing return value checks
The return value of vasprintf must be checked. This check is enforced
with the compiler options used in Debian by request and in Ubuntu by
default.
Check the return value and abort on error.
Signed-off-by: Bastian Blank <waldi@debian.org>
Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Tim Deegan [Thu, 15 Aug 2013 15:38:25 +0000 (16:38 +0100)]
xen/x86: hypervisor build fixes for FreeBSD.
These allow an x86_64 hypervisor to build on FreeBSD 9.1/amd64.
- like OpenBSD, needs a different arch passed to ld.
- like OpenBSD, stdarg.h and stdbool.h are in /usr/include.
Signed-off-by: Tim Deegan <tim@xen.org>
Acked-by: Keir Fraser <keir@xen.org>
Andrew Cooper [Fri, 16 Aug 2013 09:46:25 +0000 (11:46 +0200)]
x86/boot: Remove stack segment parameter from smpboot
The stack segment is legacy remnant of a 32bit hypervisor, and not used in
64bit. Furthermore, the unsigned short in the structure actually aliases
whatever the linker decides to put next in the data section.
Drop the extern struct definition and change it to a simple void pointer,
which matches its definition in arch/x86/boot/x86_64.S
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Tim Deegan [Thu, 15 Aug 2013 12:00:18 +0000 (13:00 +0100)]
xen: Add stdbool.h workaround for BSD.
On *BSD, stdbool.h lives in /usr/include, but we don't want to have
that on the search path in case we pick up any headers from the build
host's C libraries.
Copy the equivalent hack already in place for stdarg.h: on all
supported compilers the contents of stdbool.h are trivial, so just
supply the things we need in a xen/stdbool.h header.
Signed-off-by: Tim Deegan <tim@xen.org>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
Tested-by: Patrick Welche <prlw1@cam.ac.uk>
Tim Deegan [Thu, 15 Aug 2013 10:57:52 +0000 (11:57 +0100)]
xen: move -nostdinc into common Rules.mk.
Previously we didn't use it at all the on ARM ports or for clang builds.
For ARM, I think this is just an oversight.
For clang, this used not to work, because '-withprefix include' didn't
let us see stdarg.h, but that's fixed in clang v3.0.
Also move the '-withprefix include' to beside -nostdinc as it's only
needed with -nostdinc anyway.
Signed-off-by: Tim Deegan <tim@xen.org>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
Tim Deegan [Thu, 15 Aug 2013 10:20:48 +0000 (11:20 +0100)]
xen: move some arch CFLAGS into the common Rules.mk.
These are the same on all current architectures, so move them
into xen/Rules.mk. Lay them out a little more neatly too.
Signed-off-by: Tim Deegan <tim@xen.org>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
Tim Deegan [Thu, 15 Aug 2013 11:17:10 +0000 (13:17 +0200)]
x86/time: fix check for negative time in __update_vcpu_system_time()
Clang points out that u64 stime variable is always >= 0.
Signed-off-by: Tim Deegan <tim@xen.org>
Jan Beulich [Wed, 14 Aug 2013 09:20:26 +0000 (11:20 +0200)]
x86/MTRR: fix range check in mtrr_add_page()
Extracted from Yinghai Lu's Linux commit
d5c78673 ("x86: Fix /proc/mtrr
with base/size more than 44bits").
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
Jan Beulich [Wed, 14 Aug 2013 09:19:45 +0000 (11:19 +0200)]
x86: use "R" constraint for fxsaveq/fxrstorq enforcement
I became aware of this constraint's (referring to all legacy registers
in one go) existence by (accidentally) noticing Linux commit
82024135
("x86-64, fpu: Simplify constraints for fxsave/fxtstor").
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
Jan Beulich [Wed, 14 Aug 2013 09:18:24 +0000 (11:18 +0200)]
VT-d: protect against bogus information coming from BIOS
Add checks similar to those done by Linux: The DRHD address must not
be all zeros or all ones (Linux only checks for zero), and capabilities
as well as extended capabilities must not be all ones.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Ben Guthro <benjamin.guthro@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Tested-by: Ben Guthro <benjamin.guthro@citrix.com>
Acked by: Yang Zhang <yang.z.zhang@intel.com>
Acked-by: Xiantao Zhang <xiantao.zhang@intel.com>
Yang Zhang [Tue, 13 Aug 2013 15:47:16 +0000 (17:47 +0200)]
VMX: add boot parameter to enable/disable APIC-v dynamically
Add a boot parameter to enable/disable the APIC-v dynamically. APIC-v is
enabled by default. User can use apicv=0 to disable it.
Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com>
Andrew Cooper [Tue, 13 Aug 2013 12:31:01 +0000 (14:31 +0200)]
watchdog/crash: Always disable watchdog in console_force_unlock()
Depending on the state of the conring and serial_tx_buffer,
console_force_unlock() can be a long running operation, usually because of
serial_start_sync()
XenServer testing has found a reliable case where console_force_unlock() on
one PCPU takes long enough for another PCPU to timeout due to the watchdog
(such as waiting for a tlb flush callin).
The watchdog timeout causes the second PCPU to repeat the
console_force_unlock(), at which point the first PCPU typically fails an
assertion in spin_unlock_irqrestore(&port->tx_lock) (because the tx_lock has
been unlocked behind itself).
console_force_unlock() is only on emergency paths, so one way or another the
host is going down. Disable the watchdog before forcing the console lock to
help prevent having pcpus completing with each other to bring the host down.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
Andrew Cooper [Tue, 13 Aug 2013 12:30:44 +0000 (14:30 +0200)]
x86/watchdog: Tweak implementation given new common code
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
Andrew Cooper [Tue, 13 Aug 2013 12:29:00 +0000 (14:29 +0200)]
watchdog: Move watchdog from being x86 specific to common code
Augment watchdog_setup() to be able to possibly return an error, and introduce
watchdog_enabled() as a better alternative to knowing the architectures
internal details.
This patch does not change the x86 implementaion, beyond making it compile.
For header files, some includes of xen/nmi.h were only for the watchdog
functions, so are replaced rather than adding an extra include of
xen/watchdog.h
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
Suravee Suthikulpanit [Tue, 13 Aug 2013 12:24:16 +0000 (14:24 +0200)]
x86/AMD: Inject #GP instead of #UD when unable to map vmcb
According to AMD Programmer's Manual vol2, vmrun, vmsave and vmload
should inject #GP instead of #UD when unable to access memory
location for vmcb. Also, the code should make sure that L1 guest
EFER.SVME is not zero. Otherwise, #UD should be injected.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Reviewed-by: Tim Deegan <tim@xen.org>
Suravee Suthikulpanit [Tue, 13 Aug 2013 12:22:14 +0000 (14:22 +0200)]
x86/AMD: Fix nested svm crash due to assertion in __virt_to_maddr
Fix assertion in __virt_to_maddr when starting nested SVM guest
in debug mode. Investigation has shown that svm_vmsave/svm_vmload
make use of __pa() with invalid address.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Reviewed-by: Tim Deegan <tim@xen.org>
Ian Campbell [Mon, 22 Jul 2013 18:17:20 +0000 (19:17 +0100)]
xen: arm: document which hypercalls (and subops) are supported on ARM
There are many hypercalls which make no sense or which are not supported on ARM
systems but it's not all that obvious which ones we do support. So lets try and
document the hypercalls which are useful on ARM.
I'm not sure this is the best way to go about this, I'm open to other ideas.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>?
Andrew Cooper [Thu, 8 Aug 2013 13:20:36 +0000 (15:20 +0200)]
cleanup unused request{_dt,}_irq() parameter
The irqflags parameter appears to be an unused vestigial parameter right from
the integration of the IOMMU code in 2007. The parameter is 0 at all
callsites and never used.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Ian Campbell <Ian.Campbell@citrix.com>
Ian Campbell [Thu, 8 Aug 2013 12:44:16 +0000 (13:44 +0100)]
Revert "xen/arm: Add support for device tree specified arch_timer clock frequency."
This reverts commit
dd11cc89c5ba53ae8d969037eda8b8c70d20ffa6.
Broke the build due to dt_property_read_u32 being defined in an as yet
unapplied patch.
Ian Campbell [Thu, 8 Aug 2013 12:16:01 +0000 (13:16 +0100)]
Merge branch 'staging' of ssh://xenbits.xen.org/home/xen/git/xen into staging
Julien Grall [Thu, 1 Aug 2013 16:09:32 +0000 (17:09 +0100)]
pl011: Implement vuart_info callback
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Reviewed-by: Tim Deegan <tim@xen.org>
Julien Grall [Thu, 1 Aug 2013 16:09:31 +0000 (17:09 +0100)]
exynos4210: Implement vuart_info callback
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Reviewed-by: Tim Deegan <tim@xen.org>
Julien Grall [Thu, 1 Aug 2013 16:09:30 +0000 (17:09 +0100)]
exynos4210: rename UTRSTAT_TX_EMPTY in UTRSTAT_TXFE
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Reviewed-by: Tim Deegan <tim@xen.org>
Julien Grall [Thu, 1 Aug 2013 16:09:29 +0000 (17:09 +0100)]
xen/arm: Implement a virtual UART
This code is based on the previous vuart0 implementation. Unlike the latter,
it's intend to replace UART stolen by XEN to DOM0 via dtuart=... on its
command line.
It's useful when the kernel is compiled with early printk enabled or for a
single platform. Most of the time, the hardcoded code to handle the UART
will need 2 registers: status and data, the others registers can be
implemented as RAZ/WI.
This commit will also drop support of early printk (based on vexpress pl011)
in the guest.
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Reviewed-by: Tim Deegan <tim@xen.org>
Julien Grall [Thu, 1 Aug 2013 16:09:28 +0000 (17:09 +0100)]
xen/arm: New callback in uart_driver to retrieve serial information
There is no way to retrieve basic informations (base address, size, ....) for
an UART. This callback will be used later to partially emulate the real UART
for DOM0 on ARM.
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Reviewed-by: Tim Deegan <tim@xen.org>
Acked-by: Keir Fraser <keir@xen.org>
Patrick Welche [Thu, 8 Aug 2013 10:43:29 +0000 (11:43 +0100)]
libelf: Fix typo in header guard macro
s/__LIBELF_PRIVATE_H_/__LIBELF_PRIVATE_H__/
Signed-off-by: Patrick Welche <prlw1@cam.ac.uk>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Chen Baozi [Thu, 8 Aug 2013 10:52:24 +0000 (18:52 +0800)]
xen/arm: Add support for device tree specified arch_timer clock frequency.
Signed-off-by: Chen Baozi <baozich@gmail.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Andrew Cooper [Tue, 6 Aug 2013 13:48:40 +0000 (14:48 +0100)]
rombios/debug: Reduce verbosity of rombios
Default builds of Qemu have the Bochs debug port logging #ifdef'd out, so
remove all the completely wasted VMExits
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
Andrew Cooper [Tue, 6 Aug 2013 13:48:39 +0000 (14:48 +0100)]
rombios/ata Remove another needless trap from the int 0x13 hotpath
The return value from await_ide() is always ignored, and most calls to
await_ide() immediately reread the status register.
Therefore, making await_ide() return the last value of the status register
removes a further two traps on the int 0x13 path.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
Andrew Cooper [Tue, 6 Aug 2013 13:48:38 +0000 (14:48 +0100)]
rombios/ata: Reading this status register has no relevant side effects
So taking two traps when one will do is pointless. This removes 1 of 13
VMExits on the int 0x13 hotpath.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
Andrew Cooper [Tue, 6 Aug 2013 13:48:37 +0000 (14:48 +0100)]
rombios/ata: Do not wait for BSY to be set
After issuing a reset, the BSY bit is expected to be set. This is not the
case for Qemu.
In SeaBIOS.git:
580e33293244fee4556e56ecc67b8bd877f3c496
this check was even replaced with a udelay(5), as enough real hardware ignored
the BSY bit as well.
As rombios does not have an equivalent udelay(), replace the wait with a write
to port 0x80 which is whitelisted by Xen for 'a small delay'.
This causes 42k fewer IO traps to Qemu.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
Andrew Cooper [Tue, 6 Aug 2013 13:48:36 +0000 (14:48 +0100)]
rombios/keyboard: Don't needlessly poll the status register
Repeated polling of the status register is not going to change its value, so
don't needlessly take 8192 traps to Qemu when 1 will do.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
Ian Campbell [Wed, 31 Jul 2013 16:42:47 +0000 (17:42 +0100)]
autoconf: regenerate configure scripts with 4.4 version
No semantic change, reduced noise in future patches.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Ian Campbell [Mon, 22 Jul 2013 18:16:13 +0000 (19:16 +0100)]
docs: Build docs for ARM as well as x86_64
Also do x86_32 (which is still relevant since it is "compat mode").
Install as hypercall-$ARCH but keep the hypercall path around as a symlink to
the x86_64 version so links (e.g. to http://xenbits.xen.org/docs/ keep working.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Nai Xia [Tue, 6 Aug 2013 16:25:48 +0000 (00:25 +0800)]
mem_sharing_nominate_page: p2mt should never change before p2m_change_type()
The p2mt change check for p2m_change_type() was first introduced when
this code path was not protected by p2m_lock(). Now this code path is
protected by p2m_lock. So p2mt should never change before
p2m_change_type().
Signed-off-by: Nai Xia <nai.xia@gmail.com>
Acked-by: Andres Lagar-Cavilla <andres@lagarcavilla.org>
Acked-by: Tim Deegan <tim@xen.org>
Jan Beulich [Thu, 8 Aug 2013 09:13:54 +0000 (11:13 +0200)]
pciif: add multi-vector-MSI command
The requested vector count is to be passed in struct xen_pci_op's info
field. Upon failure, if a smaller vector count might work, the backend
will pass that smaller count in the value field (which so far is always
being set to zero in the error path).
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
Jan Beulich [Thu, 8 Aug 2013 09:12:14 +0000 (11:12 +0200)]
x86: enable multi-vector MSI
This implies
- extending the public interface to have a way to request a block of
MSIs
- allocating a block of contiguous pIRQ-s for the target domain (but
note that the Xen IRQs allocated have no need of being contiguous)
- repeating certain operations for all involved IRQs
- fixing multi_msi_enable()
- adjusting the mask bit accesses for maskable MSIs
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
Ian Jackson [Wed, 7 Aug 2013 15:11:55 +0000 (16:11 +0100)]
QEMU_TAG update
Boris Ostrovsky [Wed, 7 Aug 2013 07:51:02 +0000 (09:51 +0200)]
Intel/VPMU: Add support for full-width PMC writes
A recent Linux commit (
069e0c3c405814778c7475d95b9fff5318f39834) added
support for full-width PMC writes to performance counter registers,
making these registers default for perf. Since current Xen VPMU does
not support these new MSRs perf will fail to initialise in guests.
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: Dietmar Hahn <dietmar.hahn@ts.fujitsu.com>
Acked-by: Keir Faser <keir@xen.org>
Andrew Cooper [Tue, 6 Aug 2013 15:45:00 +0000 (17:45 +0200)]
xen/conring: Write to console ring even if console lock is busted
console_lock_busted gets set when an NMI/MCE/Double Fault handler decides to
bring Xen down in an emergency. conring_puts() cannot block and does
not have problematic interactions with the console_lock.
Therefore, choosing to not put the string into the console ring simply means
that the kexec environment cant find any panic() message caused by an IST
interrupt, which is unhelpful for debugging purposes.
In the case that two pcpus fight with console_force_unlock(), having slightly
garbled strings in the console ring is far more useful than having nothing at
all.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Matt Wilson <msw@amazon.com>
Acked-by: Keir Fraser <keir@xen.org>
Andrew Cooper [Tue, 6 Aug 2013 15:44:31 +0000 (17:44 +0200)]
xen/conring: Clean up writing to the console ring
Refactor putchar_console_ring() to conring_puts(). This allows for
consistency with {sercon,vga}_puts(), prevents needless recalculation of
the conring consumer index, and slight cleanup at the two callsites.
There is no functional change.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Matt Wilson <msw@amazon.com>
Acked-by: Keir Fraser <keir@xen.org>
Yang Zhang [Tue, 6 Aug 2013 15:22:35 +0000 (17:22 +0200)]
Nested VMX: Flush TLBs and Caches if paging mode changed
According to SDM, if paging mode is changed, then whole TLBs and caches will
be flushed. This is missed in nested handle logic. Also this fixed the issue
that 64 bits windows cannot boot up on top of L1 kvm.
Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com>
Acked-by: Keir Fraser <keir@xen.org>
Jan Beulich [Mon, 5 Aug 2013 16:42:37 +0000 (18:42 +0200)]
x86: refine FPU selector handling code for XSAVEOPT
Some extra tweaks are necessary to deal with the situation of XSAVEOPT
not writing the FPU portion of the save image (due to it detecting that
the register state did not get modified since the last XRSTOR).
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Tested-by: Ben Guthro <ben.guthro@gmail.com>
Acked-by: Keir Fraser <keir@xen.org>
Jan Beulich [Mon, 5 Aug 2013 16:40:23 +0000 (18:40 +0200)]
fix off-by-one mistakes in vm_alloc()
Also add another pair of assertions to catch eventual further cases of
incorrect accounting, and remove the temporary debuggin messages again
which commit
68caac7f ("x86: don't use destroy_xen_mappings() for
vunmap()") added.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
Ian Jackson [Mon, 5 Aug 2013 15:53:08 +0000 (16:53 +0100)]
QEMU_TAG update
Paul Durrant [Fri, 2 Aug 2013 16:45:31 +0000 (17:45 +0100)]
Add vendor_device parameter for HVM guests
The parameter determines which, if any, xen-pvdevice is specified on the
QEMU command line. The default value is 'none' which means no argument will
be passed. A value of 'xenserver' specifies a xen-pvdevice with device-id
0xc000 (the initial value in the xenserver namespace - see
docs/misc/pci-device-reservations.txt).
Signed-off-by: Paul Durrant <paul.durrant@citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
[ ijc -- s/BUILD_INFO/BUILDINFO for consistency in LIBXL_HAVE define ]
Julien Grall [Thu, 1 Aug 2013 16:09:27 +0000 (17:09 +0100)]
xen/arm: Use define instead of hardcoded value in debug-pl011
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Reviewed-by: Tim Deegan <tim@xen.org>
Julien Grall [Thu, 1 Aug 2013 16:09:26 +0000 (17:09 +0100)]
pl011: Move registers' definition in a separate file
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Reviewed-by: Tim Deegan <tim@xen.org>
Julien Grall [Wed, 31 Jul 2013 15:38:21 +0000 (16:38 +0100)]
pl011: Use ioreadl/iowritel
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Andrew Cooper [Fri, 2 Aug 2013 15:52:55 +0000 (16:52 +0100)]
scmversion: 'Improve' svn interaction.
Xen has never been in an svn tree, and the current code will unconditionally
create a .svn directory when run from a tarball.
Therefore, simply discard the svn support.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
Andrew Cooper [Wed, 31 Jul 2013 13:48:11 +0000 (14:48 +0100)]
docs: Correct docs for extra_guest_irqs command line option
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Ian Campbell <Ian.Campbell@citrix.com>
rwxybh [Fri, 2 Aug 2013 07:33:19 +0000 (15:33 +0800)]
libxl: Fix function libxl__domain_resume_device_model
Add a break line in function libxl__domain_resume_device_model
Signed-off-by: Bingheng Yan <rwxybh@126.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Ian Campbell [Mon, 29 Jul 2013 16:08:57 +0000 (17:08 +0100)]
xen: arm: handle traps of conditional instructions.
This means handling the HSR.ccvalid field as well as correctly processing the
Thumb If-Then state block in the CPSR correctly which is rather tricky. KVM
provided a useful reference for all this.
I suspect we aren't actually hitting these paths very often since the sorts of
traps we take will not often be conditional so my limited testing may not
actually be exercising these paths very much.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.linaro.org>
Ian Campbell [Tue, 30 Jul 2013 08:42:06 +0000 (09:42 +0100)]
xen: arm: do not pretend to be a Cortex-A15 when running 32-bit guests
It is definitely wrong to do this when running on non-Cortex-A15 32-bit
hardware but even when running on 64-bit hardware it's not really necessary
and may cause more harm than good if the underlying processor is not all that
similar to an A15.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
Vadim A. Misbakh-Soloviov [Tue, 30 Jul 2013 12:34:40 +0000 (16:34 +0400)]
flask: use DESTDIR directly in install target rules
30.07.2013 13:51, Ian Campbell wrote:
> I think it would be a bit less surprising for drive by patchers etc to
> remove the DESTDIR from POLICY_LOADPATH and add it to the install
> target, which is the usual way to do things. Up to you/Vadim though.
Signed-off-by: Vadim A. Misbakh-Soloviov <mva@mva.name>
Acked-by: Daniel De Graaf <dgdegra@tycho.nsa.gov>
Vadim A. Misbakh-Soloviov [Tue, 30 Jul 2013 12:34:39 +0000 (16:34 +0400)]
tools: build flask-tools and flask policy only if flask enabled
Signed-off-by: Vadim A. Misbakh-Soloviov <mva@mva.name>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Vadim A. Misbakh-Soloviov [Tue, 30 Jul 2013 12:34:38 +0000 (16:34 +0400)]
flask: avoid installing policy file as '/boot'
Signed-off-by: Vadim A. Misbakh-Soloviov <mva@mva.name>
Acked-by: Daniel De Graaf <dgdegra@tycho.nsa.gov>
Samuel Thibault [Mon, 29 Jul 2013 09:18:10 +0000 (11:18 +0200)]
stubdom: Fix stubdom undeclared function build warnings
This includes a few headers to fix some missing function declarations.
../grub-upstream/stage2/builtins.c:1728:3: warning: implicit declaration of function ‘do_exit’ [-Wimplicit-function-declaration]
stubdom/include/xen/libelf/libelf.h:453:5: warning: implicit declaration of function ‘memcpy’ [-Wimplicit-function-declaration]
Reported-by: IAN DELANEY <della5@iinet.com.au>
Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Julien Grall [Mon, 29 Jul 2013 23:18:28 +0000 (00:18 +0100)]
xen/arm: Fix guest secondaries CPU boot after
bcac10f
The commit
bcac10f "xen: arm: support building a 64-bit dom0 domain" breaks
secondary cpus boot for all the guest. Linux requires CPUs to boot on SVC mode.
Divide PSR_GUEST_INIT in 2 distinct defines: one for 32 bit, the other for 64
bits guests.
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Ian Campbell [Mon, 29 Jul 2013 15:56:02 +0000 (16:56 +0100)]
Merge branch 'staging' of ssh://xenbits.xen.org/home/xen/git/xen into staging
Ian Campbell [Mon, 29 Jul 2013 12:21:06 +0000 (13:21 +0100)]
xen: arm: Handle SMC from 64-bit guests
Similarly to arm32 guests handle it by injecting an undefined instruction
trap.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
Ian Campbell [Mon, 29 Jul 2013 12:21:05 +0000 (13:21 +0100)]
xen: arm: document HCR bits.
I was mostly interested in commenting the RW bit which is Register Width and
not Read/Write as a reader might initially expect. Thought I might as well do
the others...
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
Ian Campbell [Mon, 29 Jul 2013 12:21:04 +0000 (13:21 +0100)]
xen: arm: align some comments
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Ian Campbell [Mon, 29 Jul 2013 12:21:03 +0000 (13:21 +0100)]
xen: arm: handle 64-bit system register access traps.
Wire up the vtimer handling to it.
Use a simplified version of the 32-bit cp-register macros to have convenient
decoding of HSR register values. (simplified because we don't need them for
passing to the assembler on 64-bit)
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Ian Campbell [Mon, 29 Jul 2013 12:21:02 +0000 (13:21 +0100)]
xen: arm: handle hypercalls from 64-bit guests
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Ian Campbell [Mon, 29 Jul 2013 12:21:01 +0000 (13:21 +0100)]
xen: arm: handle traps from 64-bit guests
While there observe that we weren't ever restoring the outer stack frame, even
for 32-bit guests when running a 64-bit hypervisor! The outer stack frame
"only" contains most of the SPSR registers for 32-bit...
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
Ian Campbell [Mon, 29 Jul 2013 12:21:00 +0000 (13:21 +0100)]
xen: arm: refactor 64-bit return from trap path
Refactor exit path to use a single "exit" macro similar to the entry path.
We can also remove the logic at "return_to_new_vcpu" which detects returns to
hypervisor mode -- seemingly trying to handle hypervisor threads which aren't
an thing which we have. The idle VCPUs do not take this path. This simplifies
the return_to_new_vcpu code, we also split it into 32- and 64-bit VCPU paths.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
Ian Campbell [Mon, 29 Jul 2013 12:20:59 +0000 (13:20 +0100)]
xen: arm: some cleanups to hypervisor entry code.
Tweak the case of some system registers for consistency.
There is no need to export return_to_hypervisor or return_to_guest.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
Ian Campbell [Mon, 29 Jul 2013 12:20:58 +0000 (13:20 +0100)]
xen: arm: Set EL1 register width in HCR_EL2 during context switch.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Ian Campbell [Mon, 29 Jul 2013 12:20:57 +0000 (13:20 +0100)]
xen: arm: show less words in a line of a stack trace in 64-bit builds
Words are twice as wide so this ensures that a line is still <80 characters.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Ian Campbell [Mon, 29 Jul 2013 12:20:56 +0000 (13:20 +0100)]
xen: arm: support dumping 64-bit guest stack
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Ian Campbell [Mon, 29 Jul 2013 12:20:55 +0000 (13:20 +0100)]
xen: arm: improve register dump output for 64-bit guest (and more generally too)
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
Ian Campbell [Mon, 29 Jul 2013 12:20:54 +0000 (13:20 +0100)]
xen: arm: precalculate VTTBR_EL2 for a domain when setting up its p2m
Mostly just to help with upcoming vcpu_show_registers changes.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Ian Campbell [Mon, 29 Jul 2013 12:20:53 +0000 (13:20 +0100)]
xen: arm: support building a 64-bit dom0 domain
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Ian Campbell [Mon, 29 Jul 2013 12:20:52 +0000 (13:20 +0100)]
xen: arm: support for loading 64-bit zImage dom0
This is defined in linux/Documentation/arm64/booting.txt.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Ian Campbell [Mon, 29 Jul 2013 12:20:51 +0000 (13:20 +0100)]
xen: arm: rename 32-bit specific zImage field offset constants
This will help avoid confusion when 64-bit Image support is added.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Ian Campbell [Mon, 29 Jul 2013 12:20:50 +0000 (13:20 +0100)]
xen: arm: tweak arm64 stack frame layout
Correct definition of UREGS_kernel_sizeof and use it.
Correct adjustment of stack on entry and exit.
Add 64-bit versions of the build time checks for stack pointer alignment
correctness when pushing the stack frames.
Lastly, correct the padding in the stack frames to properly align the inner and
outer frames and also avoid an unnecessary 64bit padding field.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Ian Campbell [Wed, 17 Jul 2013 11:19:28 +0000 (12:19 +0100)]
xen: arm: remove unnecessary cache flush in write_pte
On a ARMv7/v8 SMP system the MMU is coherent
Suggested-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
[ ijc -- dropped the associated dsb too ]
Julien Grall [Mon, 29 Jul 2013 13:42:13 +0000 (14:42 +0100)]
xen/arm: Clean up identify processor call for secondary cpus
The smp_processor_id() is set at the beginning of start_secondary. We don't
need to compute ourself the offset of the cpu data.
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Julien Grall [Thu, 25 Jul 2013 15:21:31 +0000 (16:21 +0100)]
xen/arm: Allow secondary cpus to start in THUMB
Unlike bx, eret will not update the instruction set (THUMB,ARM) according to
the return address. This will result to an unpredicable behaviour for the
processor if the address doesn't match the right instruction set.
When the kernel is compiled with THUMB2, THUMB bit needs to be set in CPSR
for the secondary cpus.
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Julien Grall [Thu, 25 Jul 2013 15:21:30 +0000 (16:21 +0100)]
xen/arm: Don't emulate the MMIO access if the instruction syndrome is invalid
When the instruction syndrome is not valid, the transfer register is unknown.
If this register is used in the emulation code (it's the case for the VGIC),
Xen can retrieve wrong data.
For safety, consider invalid instruction syndrome as wrong memory access.
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Julien Grall [Wed, 24 Jul 2013 17:01:36 +0000 (18:01 +0100)]
xen/arm: Initialize PERCPU variables at the beginning of start_xen
PERCPU variables rely on HTPIDR (TPIDR_EL2) which is in an unknown state when
a processor boot.
For the boot CPU, the first use of PERCPU is in setup_pagetables. So
initialize PERCPU and set the processor ID before.
Bamvor Jian Zhang observed this failure on the sun6i processor which does not
initialise HTPIDR and contributed a very similar patch.
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
[ ijc -- added last para of commit message ]
Tim Deegan [Mon, 29 Jul 2013 11:12:17 +0000 (12:12 +0100)]
Don't take the domain lock for p2m operations.
P2M ops are covered by their own locks, and these uses of the domain
lock are relics of shadow-v1 code.
Signed-off-by: Tim Deegan <tim@xen.org>
Reviewed-by: Andres Lagar-Cavilla <andres@lagarcavilla.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
Ian Campbell [Tue, 23 Jul 2013 17:06:24 +0000 (18:06 +0100)]
xen: arm: panic if we cannot build dom0's p2m.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
Ian Campbell [Mon, 22 Jul 2013 18:16:33 +0000 (19:16 +0100)]
xen: arm: remove dummy HYPERVISOR_arch_0 hypercall
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
=John Liu [Mon, 22 Jul 2013 21:23:10 +0000 (22:23 +0100)]
oxenstored: Protect oxenstored from malicious domains.
add check logic when read from IO ring, and if error happens,
then mark the reading connection as "bad", Unless vm reboot,
oxenstored will not handle message from this connection any more.
xs_ring_stubs.c: add a more strict check on ring reading
connection.ml, domain.ml: add getter and setter for bad flag
process.ml: if exception raised when reading from domain's ring,
mark this domain as "bad"
xenstored.ml: if a domain is marked as "bad", do not handle it.
Signed-off-by: John Liu <john.liuqiming@huawei.com>
Acked-by: David Scott <dave.scott@eu.citrix.com>
George Dunlap [Fri, 5 Jul 2013 11:13:55 +0000 (12:13 +0100)]
libxl: Add vif.default.backend to xl.conf
This will allow a user to default to a network driver domain
system-wide.
Signed-off-by: George Dunlap <george.dunlap@eu.citrix.com>
Acked-by: Roger Pau Monné <roger.pau@citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Konrad Rzeszutek Wilk [Fri, 19 Jul 2013 15:31:10 +0000 (11:31 -0400)]
xl: Enable by default claim mode.
During the Xen 4.3 release we discussed that this feature could be
turned on by default - as it benefits all of the guests - not just
tmem related.
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Acked-by: George Dunlap <george.dunlap@eu.citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Ian Campbell [Sun, 21 Jul 2013 05:24:30 +0000 (06:24 +0100)]
xen: x86: put back .gz suffix on installed hypervisor binary.
This reverts the effect of
524b93def23b "xen: x86: drop the ".gz" suffix when
installing" which broke things in osstest (Debian Squeeze update-grub
apparently can't cope). It is not a direct revert because of other changes made
since. We continue to omit the suffix on ARM.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Ian Campbell [Fri, 26 Apr 2013 10:58:47 +0000 (11:58 +0100)]
xen: arm: drop LDFLAGS_DIRECT emulation specification.
The current -maarch64elf fails when cross-building arm64 on Ubuntu Raring due
to a missing file "ldscripts/aarch64elf.xr". This is undoubtedly an Ubuntu gcc
bug, hwever when investigating I found that this option was not necessary at
all since we provide an explicit linker script when linking the hypervisor
(AFAICT all -m<foo> does is override the default linker script).
LDFLAGS_DIRECT is also used when linking the intermediate built-in.o files but
-m<emulatin> is not needed for this since it isn't linking the final image and
we are calling the linker with the correct, cross if necessary, name.
However it does appear to be potentially useful to supply -EL in both cases to
ensure that we get little endian images. (I just happened to spot that Linux
does this, for both arm and arm64, although I expect we are unlikely to trip
over such toolchains these days).
Tested with cross-builds of arm32 and arm64 as well as a native arm32 build.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>