From: Jan Beulich Date: Tue, 5 May 2020 07:50:54 +0000 (+0200) Subject: x86emul: extend x86_insn_is_mem_write() coverage X-Git-Tag: archive/raspbian/4.14.0+80-gd101b417b7-1+rpi1^2~63^2~310 X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=fc6fa977be54;p=xen.git x86emul: extend x86_insn_is_mem_write() coverage Several insns were missed when this function was first added. As far as insns already supported by the emulator go - SMSW and {,V}STMXCSR were wrongly considered r/o insns so far. Insns like the VMX, SVM, or CET-SS ones, PTWRITE, or AMD's new SNP ones are intentionally not covered just yet. VMPTRST is put there just to complete the respective group. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 1959fc227a..7503da980f 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -11551,13 +11551,39 @@ x86_insn_is_mem_write(const struct x86_emulate_state *state, break; case X86EMUL_OPC(0x0f, 0x01): - return !(state->modrm_reg & 6); /* SGDT / SIDT */ + switch ( state->modrm_reg & 7 ) + { + case 0: /* SGDT */ + case 1: /* SIDT */ + case 4: /* SMSW */ + return true; + } + break; + + case X86EMUL_OPC(0x0f, 0xae): + switch ( state->modrm_reg & 7 ) + { + case 0: /* FXSAVE */ + case 3: /* {,V}STMXCSR */ + case 4: /* XSAVE */ + case 6: /* XSAVEOPT */ + return true; + } + break; case X86EMUL_OPC(0x0f, 0xba): return (state->modrm_reg & 7) > 4; /* BTS / BTR / BTC */ case X86EMUL_OPC(0x0f, 0xc7): - return (state->modrm_reg & 7) == 1; /* CMPXCHG{8,16}B */ + switch ( state->modrm_reg & 7 ) + { + case 1: /* CMPXCHG{8,16}B */ + case 4: /* XSAVEC */ + case 5: /* XSAVES */ + case 7: /* VMPTRST */ + return true; + } + break; } return false;