From: Andrii Anisov <andrii_anisov@epam.com>
Date: Wed, 12 Dec 2018 18:20:54 +0000 (+0200)
Subject: gic-vgic: Drop an excessive clear_lrs
X-Git-Tag: archive/raspbian/4.14.0+80-gd101b417b7-1+rpi1^2~63^2~2751
X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=cca87128aab1820d269f7ebc6c169f27dafdbadd;p=xen.git

gic-vgic: Drop an excessive clear_lrs

This action is excessive because for an invalid LR there is no need
to write another invalid value to a register. So we can skip it here,
saving a peripheral register write.
Keep clearing the LR for the DEBUG build. This would make dumped
invalid LRs be zero. That is more obvious than picking state bits
from a non-zero value.

Signed-off-by: Andrii Anisov <andrii_anisov@epam.com>
Reviewed-by: Julien Grall <julien.grall@arm.com>
---

diff --git a/xen/arch/arm/gic-vgic.c b/xen/arch/arm/gic-vgic.c
index 990399cf3f..48922f5595 100644
--- a/xen/arch/arm/gic-vgic.c
+++ b/xen/arch/arm/gic-vgic.c
@@ -216,7 +216,9 @@ static void gic_update_one_lr(struct vcpu *v, int i)
     }
     else
     {
+#ifndef NDEBUG
         gic_hw_ops->clear_lr(i);
+#endif
         clear_bit(i, &this_cpu(lr_mask));
 
         if ( p->desc != NULL )