From: Jan Beulich <jbeulich@suse.com>
Date: Fri, 30 Sep 2016 12:58:48 +0000 (+0200)
Subject: x86emul: defer injection of #DB
X-Git-Tag: archive/raspbian/4.8.0-1+rpi1~1^2~237
X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=c3a2654fa248687c66f033fcdb4dd6c50e6d6fdf;p=xen.git

x86emul: defer injection of #DB

Move the raising of the single step trap until after registers were
updated. This should probably have been that way from the beginning,
to allow the inject_hw_exception() hook to see updated register state
(in case it cares) - it's a trap, after all.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
---

diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c
index c3d193ce51..8c6cc50bec 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -2265,6 +2265,7 @@ x86_emulate(
     struct x86_emulate_state state;
     int rc;
     uint8_t b, d;
+    bool tf = ctxt->regs->eflags & EFLG_TF;
     struct operand src = { .reg = REG_POISON };
     struct operand dst = { .reg = REG_POISON };
     enum x86_swint_type swint_type;
@@ -5176,11 +5177,6 @@ x86_emulate(
     }
 
  no_writeback:
-    /* Inject #DB if single-step tracing was enabled at instruction start. */
-    if ( (ctxt->regs->eflags & EFLG_TF) && (rc == X86EMUL_OKAY) &&
-         (ops->inject_hw_exception != NULL) )
-        rc = ops->inject_hw_exception(EXC_DB, -1, ctxt) ? : X86EMUL_EXCEPTION;
-
     /* Commit shadow register state. */
     _regs.eflags &= ~EFLG_RF;
 
@@ -5190,6 +5186,10 @@ x86_emulate(
 
     *ctxt->regs = _regs;
 
+    /* Inject #DB if single-step tracing was enabled at instruction start. */
+    if ( tf && (rc == X86EMUL_OKAY) && ops->inject_hw_exception )
+        rc = ops->inject_hw_exception(EXC_DB, -1, ctxt) ? : X86EMUL_EXCEPTION;
+
  done:
     _put_fpu();
     put_stub(stub);