From: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
Date: Tue, 1 Jul 2014 06:41:12 +0000 (+0530)
Subject: xen/arm: move GIC context data structure to gic driver
X-Git-Tag: archive/raspbian/4.8.0-1+rpi1~1^2~4743
X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=bd982d7381d215106a1e3dc5d302666b4cd53ef7;p=xen.git

xen/arm: move GIC context data structure to gic driver

arch_domain in domain.h defines all the GIC registers
that needs to be saved/restored directly.

These GIC registers are GIC HW version specific. The number
of registers and size of registers varies with GIC version.
So move these registers to gic.h file and make a union of these
registers. This helps to define GIC HW version specific
structure to this union for later GIC versions.

Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
---

diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c
index 3539cb8fed..c18cd4cda4 100644
--- a/xen/arch/arm/gic-v2.c
+++ b/xen/arch/arm/gic-v2.c
@@ -111,10 +111,10 @@ static void gicv2_save_state(struct vcpu *v)
      * accessed simultaneously by another pCPU.
      */
     for ( i = 0; i < gicv2_info.nr_lrs; i++ )
-        v->arch.gic_lr[i] = readl_relaxed(GICH + GICH_LR + i * 4);
+        v->arch.gic.v2.lr[i] = readl_relaxed(GICH + GICH_LR + i * 4);
 
-    v->arch.gic_apr = readl_relaxed(GICH + GICH_APR);
-    v->arch.gic_vmcr = readl_relaxed(GICH + GICH_VMCR);
+    v->arch.gic.v2.apr = readl_relaxed(GICH + GICH_APR);
+    v->arch.gic.v2.vmcr = readl_relaxed(GICH + GICH_VMCR);
     /* Disable until next VCPU scheduled */
     writel_relaxed(0, GICH + GICH_HCR);
 }
@@ -124,10 +124,10 @@ static void gicv2_restore_state(const struct vcpu *v)
     int i;
 
     for ( i = 0; i < gicv2_info.nr_lrs; i++ )
-        writel_relaxed(v->arch.gic_lr[i], GICH + GICH_LR + i * 4);
+        writel_relaxed(v->arch.gic.v2.lr[i], GICH + GICH_LR + i * 4);
 
-    writel_relaxed(v->arch.gic_apr, GICH + GICH_APR);
-    writel_relaxed(v->arch.gic_vmcr, GICH + GICH_VMCR);
+    writel_relaxed(v->arch.gic.v2.apr, GICH + GICH_APR);
+    writel_relaxed(v->arch.gic.v2.vmcr, GICH + GICH_VMCR);
     writel_relaxed(GICH_HCR_EN, GICH + GICH_HCR);
 }
 
@@ -144,7 +144,7 @@ static void gicv2_dump_state(const struct vcpu *v)
     else
     {
         for ( i = 0; i < gicv2_info.nr_lrs; i++ )
-            printk("   VCPU_LR[%d]=%x\n", i, v->arch.gic_lr[i]);
+            printk("   VCPU_LR[%d]=%x\n", i, v->arch.gic.v2.lr[i]);
     }
 }
 
diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h
index 046362cfd9..bfd462c147 100644
--- a/xen/include/asm-arm/domain.h
+++ b/xen/include/asm-arm/domain.h
@@ -8,6 +8,7 @@
 #include <asm/p2m.h>
 #include <asm/vfp.h>
 #include <asm/mmio.h>
+#include <asm/gic.h>
 #include <public/hvm/params.h>
 #include <xen/serial.h>
 #include <xen/hvm/iommu.h>
@@ -263,8 +264,8 @@ struct arch_vcpu
     uint32_t csselr;
     register_t vmpidr;
 
-    uint32_t gic_hcr, gic_vmcr, gic_apr;
-    uint32_t gic_lr[64];
+    /* Holds gic context data */
+    union gic_state_data gic;
     uint64_t lr_mask;
 
     struct {
diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h
index 9a85633e60..a3c5f3d6b4 100644
--- a/xen/include/asm-arm/gic.h
+++ b/xen/include/asm-arm/gic.h
@@ -147,6 +147,24 @@
 #define DT_MATCH_GIC    DT_MATCH_COMPATIBLE("arm,cortex-a15-gic"), \
                         DT_MATCH_COMPATIBLE("arm,cortex-a7-gic")
 
+/*
+ * GICv2 register that needs to be saved/restored
+ * on VCPU context switch
+ */
+struct gic_v2 {
+    uint32_t hcr;
+    uint32_t vmcr;
+    uint32_t apr;
+    uint32_t lr[64];
+};
+
+/*
+ * Union to hold underlying hw version context information
+ */
+union gic_state_data {
+    struct gic_v2 v2;
+};
+
 /*
  * Decode LR register content.
  * The LR register format is different for GIC HW version