From: Andy Lutomirski <luto@kernel.org>
Date: Fri, 9 Dec 2016 18:24:07 +0000 (-0800)
Subject: x86/microcode: Replace sync_core() with cpuid_eax()
X-Git-Tag: archive/raspbian/4.11.1-1+rpi1~1^2~66^2~2590
X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=b95028e468f73528146d57e68ffca71aa47b4cbe;p=xen.git

x86/microcode: Replace sync_core() with cpuid_eax()

The Intel microcode driver is using sync_core() to mean "do CPUID
with EAX=1".

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Acked-by: Borislav Petkov <bp@alien8.de>
[Linux commit 484d0e5c7943644cc46e7308a8f9d83be598f2b9]
[Ported to Xen]
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
---

diff --git a/xen/arch/x86/microcode_intel.c b/xen/arch/x86/microcode_intel.c
index 62c293281f..ba3971a659 100644
--- a/xen/arch/x86/microcode_intel.c
+++ b/xen/arch/x86/microcode_intel.c
@@ -115,8 +115,9 @@ static int collect_cpu_info(unsigned int cpu_num, struct cpu_signature *csig)
     }
 
     wrmsrl(MSR_IA32_UCODE_REV, 0x0ULL);
-    /* see notes above for revision 1.07.  Apparent chip bug */
-    sync_core();
+    /* As documented in the SDM: Do a CPUID 1 here */
+    cpuid_eax(1);
+
     /* get the current revision from MSR 0x8B */
     rdmsrl(MSR_IA32_UCODE_REV, msr_content);
     csig->rev = (uint32_t)(msr_content >> 32);
@@ -297,8 +298,8 @@ static int apply_microcode(unsigned int cpu)
     wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)uci->mc.mc_intel->bits);
     wrmsrl(MSR_IA32_UCODE_REV, 0x0ULL);
 
-    /* see notes above for revision 1.07.  Apparent chip bug */
-    sync_core();
+    /* As documented in the SDM: Do a CPUID 1 here */
+    cpuid_eax(1);
 
     /* get the current revision from MSR 0x8B */
     rdmsrl(MSR_IA32_UCODE_REV, msr_content);
diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 8ba7ed0851..13a609b3b4 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -2572,7 +2572,8 @@ static int priv_op_read_msr(unsigned int reg, uint64_t *val,
         {
             if ( wrmsr_safe(MSR_IA32_UCODE_REV, 0) )
                 break;
-            sync_core();
+            /* As documented in the SDM: Do a CPUID 1 here */
+            cpuid_eax(1);
         }
         goto normal;