From: Jan Beulich <jbeulich@suse.com>
Date: Tue, 5 Sep 2017 15:32:05 +0000 (+0200)
Subject: x86emul: correct VEX.L handling for VCVT{,T}S{S,D}2SI
X-Git-Tag: archive/raspbian/4.11.1-1+rpi1~1^2~66^2~1485
X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=a6488965ca3ec30f2e0b7022b539bba78c2aeede;p=xen.git

x86emul: correct VEX.L handling for VCVT{,T}S{S,D}2SI

Recent changes to the SDM (and XED) have made clear that older hardware
raising #UD when the bit is set was really an erratum. Generalize the
so far AMD-only override.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
---

diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c
index 0d76351163..d977e371b1 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -5609,9 +5609,8 @@ x86_emulate(
         }
         else
         {
-            if ( ctxt->vendor == X86_VENDOR_AMD )
-                vex.l = 0;
-            generate_exception_if(vex.l || vex.reg != 0xf, EXC_UD);
+            generate_exception_if(vex.reg != 0xf, EXC_UD);
+            vex.l = 0;
             host_and_vcpu_must_have(avx);
             get_fpu(X86EMUL_FPU_ymm, &fic);
         }