From: LLVM Packaging Team <pkg-llvm-team@lists.alioth.debian.org>
Date: Thu, 22 Oct 2020 20:29:07 +0000 (+0100)
Subject: mips-force-nomadd4
X-Git-Tag: archive/raspbian/1%10.0.1-8+rpi1^2^2~2
X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=9cc1f0fbde82b23f4cee0fc1405303e10d0160f1;p=llvm-toolchain-10.git

mips-force-nomadd4

The MIPS port aims to support the Loongson 3 family of CPUs in addition
of the other MIPS CPUs. On the Loongson 3 family the MADD4 instructions
are fused, while they are not fused on the other MIPS CPUs. In order to
support both, we have to disabled those instructions.

For that, the patch below basically corresponds to the --with-madd4=no
used on the GCC side.


Gbp-Pq: Name mips-force-nomadd4.patch
---

diff --git a/clang/lib/Basic/Targets/Mips.h b/clang/lib/Basic/Targets/Mips.h
index 224ec0783..42befab72 100644
--- a/clang/lib/Basic/Targets/Mips.h
+++ b/clang/lib/Basic/Targets/Mips.h
@@ -332,6 +332,8 @@ public:
         HasMSA = true;
       else if (Feature == "+nomadd4")
         DisableMadd4 = true;
+      else if (Feature == "-nomadd4")
+        DisableMadd4 = false;
       else if (Feature == "+fp64")
         FPMode = FP64;
       else if (Feature == "-fp64")
diff --git a/llvm/lib/Target/Mips/Mips.td b/llvm/lib/Target/Mips/Mips.td
index b8a69815c..c32f55311 100644
--- a/llvm/lib/Target/Mips/Mips.td
+++ b/llvm/lib/Target/Mips/Mips.td
@@ -205,7 +205,7 @@ def FeatureUseTCCInDIV : SubtargetFeature<
                                "UseTCCInDIV", "false",
                                "Force the assembler to use trapping">;
 
-def FeatureMadd4
+def FeatureNoMadd4
     : SubtargetFeature<"nomadd4", "DisableMadd4", "true",
                        "Disable 4-operand madd.fmt and related instructions">;
 
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td
index d9a3ff802..99bbb9601 100644
--- a/llvm/lib/Target/Mips/MipsInstrInfo.td
+++ b/llvm/lib/Target/Mips/MipsInstrInfo.td
@@ -242,7 +242,7 @@ def HasEVA       :    Predicate<"Subtarget->hasEVA()">,
 def HasMSA : Predicate<"Subtarget->hasMSA()">,
              AssemblerPredicate<"FeatureMSA">;
 def HasMadd4 : Predicate<"!Subtarget->disableMadd4()">,
-               AssemblerPredicate<"!FeatureMadd4">;
+               AssemblerPredicate<"!FeatureNoMadd4">;
 def HasMT  : Predicate<"Subtarget->hasMT()">,
              AssemblerPredicate<"FeatureMT">;
 def UseIndirectJumpsHazard : Predicate<"Subtarget->useIndirectJumpsHazard()">,
diff --git a/llvm/lib/Target/Mips/MipsSubtarget.cpp b/llvm/lib/Target/Mips/MipsSubtarget.cpp
index 133b81811..6d883d742 100644
--- a/llvm/lib/Target/Mips/MipsSubtarget.cpp
+++ b/llvm/lib/Target/Mips/MipsSubtarget.cpp
@@ -79,7 +79,7 @@ MipsSubtarget::MipsSubtarget(const Triple &TT, StringRef CPU, StringRef FS,
       InMips16Mode(false), InMips16HardFloat(Mips16HardFloat),
       InMicroMipsMode(false), HasDSP(false), HasDSPR2(false), HasDSPR3(false),
       AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16), HasMSA(false),
-      UseTCCInDIV(false), HasSym32(false), HasEVA(false), DisableMadd4(false),
+      UseTCCInDIV(false), HasSym32(false), HasEVA(false), DisableMadd4(true),
       HasMT(false), HasCRC(false), HasVirt(false), HasGINV(false),
       UseIndirectJumpsHazard(false), StackAlignOverride(StackAlignOverride),
       TM(TM), TargetTriple(TT), TSInfo(),
@@ -91,6 +91,9 @@ MipsSubtarget::MipsSubtarget(const Triple &TT, StringRef CPU, StringRef FS,
   if (MipsArchVersion == MipsDefault)
     MipsArchVersion = Mips32;
 
+  if (hasMips32r6() || hasMips64r6())
+    DisableMadd4 = false;
+
   // Don't even attempt to generate code for MIPS-I and MIPS-V. They have not
   // been tested and currently exist for the integrated assembler only.
   if (MipsArchVersion == Mips1)
@@ -238,6 +241,7 @@ MipsSubtarget &
 MipsSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS,
                                                const TargetMachine &TM) {
   std::string CPUName = MIPS_MC::selectMipsCPU(TM.getTargetTriple(), CPU);
+  SubtargetFeatures Features(FS);
 
   // Parse features string.
   ParseSubtargetFeatures(CPUName, FS);
@@ -260,6 +264,13 @@ MipsSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS,
     report_fatal_error("64-bit code requested on a subtarget that doesn't "
                        "support it!");
 
+  for (const std::string &Feature : Features.getFeatures()) {
+    if (Feature == "+nomadd4")
+      DisableMadd4 = true;
+    else if (Feature == "-nomadd4")
+      DisableMadd4 = false;
+  }
+
   return *this;
 }