From: Igor Druzhinin Date: Mon, 26 Apr 2021 08:22:48 +0000 (+0200) Subject: x86/intel: insert Ice Lake-SP and Ice Lake-D model numbers X-Git-Tag: archive/raspbian/4.16.0+51-g0941d6cb-1+rpi1~2^2~42^2~606 X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=95419adfd4b275cffe24b96edcc2f15bc4db8907;p=xen.git x86/intel: insert Ice Lake-SP and Ice Lake-D model numbers LBR, C-state MSRs should correspond to Ice Lake desktop according to SDM rev. 74 for both models. Ice Lake-SP is known to expose IF_PSCHANGE_MC_NO in IA32_ARCH_CAPABILITIES MSR (as advisory tells and Whitley SDP confirms) which means the erratum is fixed in hardware for that model and therefore it shouldn't be present in has_if_pschange_mc list. Provisionally assume the same to be the case for Ice Lake-D. Signed-off-by: Igor Druzhinin Reviewed-by: Jan Beulich Reviewed-by: Kevin Tian --- diff --git a/xen/arch/x86/acpi/cpu_idle.c b/xen/arch/x86/acpi/cpu_idle.c index c092086b33..d788c8bffc 100644 --- a/xen/arch/x86/acpi/cpu_idle.c +++ b/xen/arch/x86/acpi/cpu_idle.c @@ -181,6 +181,8 @@ static void do_get_hw_residencies(void *arg) case 0x55: case 0x5E: /* Ice Lake */ + case 0x6A: + case 0x6C: case 0x7D: case 0x7E: /* Tiger Lake */ diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 8e0aa976c2..dde4f3b70d 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -2973,7 +2973,7 @@ static const struct lbr_info *last_branch_msr_get(void) /* Goldmont Plus */ case 0x7a: /* Ice Lake */ - case 0x7d: case 0x7e: + case 0x6a: case 0x6c: case 0x7d: case 0x7e: /* Tiger Lake */ case 0x8c: case 0x8d: /* Tremont */