From: Paul Durrant Date: Thu, 14 Mar 2019 13:54:00 +0000 (+0100) Subject: x86: move the saved value of MSR_IA32_XSS into struct vcpu_msrs X-Git-Tag: archive/raspbian/4.14.0+80-gd101b417b7-1+rpi1^2~63^2~2335 X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=943c474283a34e48e5088af2ad67d7a56320fbd7;p=xen.git x86: move the saved value of MSR_IA32_XSS into struct vcpu_msrs Currently the value is saved directly in struct hvm_vcpu. This patch simply co-locates it with other saved MSR values. No functional change. Signed-off-by: Paul Durrant Reviewed-by: Jan Beulich Reviewed-by: Kevin Tian --- diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 873b510c3f..9eaa978ce5 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -1659,7 +1659,7 @@ static void __context_switch(void) BUG(); if ( cpu_has_xsaves && is_hvm_vcpu(n) ) - set_msr_xss(n->arch.hvm.msr_xss); + set_msr_xss(n->arch.msrs->xss.raw); } vcpu_restore_fpu_nonlazy(n, false); nd->arch.ctxt_switch->to(n); diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 95aeec8fd7..c3576072a0 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -3476,7 +3476,7 @@ int hvm_msr_read_intercept(unsigned int msr, uint64_t *msr_content) case MSR_IA32_XSS: if ( !d->arch.cpuid->xstate.xsaves ) goto gp_fault; - *msr_content = v->arch.hvm.msr_xss; + *msr_content = v->arch.msrs->xss.raw; break; case MSR_K8_ENABLE_C1E: @@ -3622,7 +3622,7 @@ int hvm_msr_write_intercept(unsigned int msr, uint64_t msr_content, /* No XSS features currently supported for guests. */ if ( !d->arch.cpuid->xstate.xsaves || msr_content != 0 ) goto gp_fault; - v->arch.hvm.msr_xss = msr_content; + v->arch.msrs->xss.raw = msr_content; break; case MSR_AMD64_NB_CFG: diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index f8481d032a..985e5735d2 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -807,7 +807,7 @@ static void vmx_save_msr(struct vcpu *v, struct hvm_msr *ctxt) { if ( cpu_has_xsaves && cpu_has_vmx_xsaves ) { - ctxt->msr[ctxt->count].val = v->arch.hvm.msr_xss; + ctxt->msr[ctxt->count].val = v->arch.msrs->xss.raw; if ( ctxt->msr[ctxt->count].val ) ctxt->msr[ctxt->count++].index = MSR_IA32_XSS; } @@ -826,7 +826,7 @@ static int vmx_load_msr(struct vcpu *v, struct hvm_msr *ctxt) { case MSR_IA32_XSS: if ( cpu_has_xsaves && cpu_has_vmx_xsaves ) - v->arch.hvm.msr_xss = ctxt->msr[i].val; + v->arch.msrs->xss.raw = ctxt->msr[i].val; else err = -ENXIO; break; diff --git a/xen/include/asm-x86/hvm/vcpu.h b/xen/include/asm-x86/hvm/vcpu.h index d1589f3a96..38f5c2bb9b 100644 --- a/xen/include/asm-x86/hvm/vcpu.h +++ b/xen/include/asm-x86/hvm/vcpu.h @@ -176,7 +176,6 @@ struct hvm_vcpu { struct hvm_vcpu_asid n1asid; u64 msr_tsc_adjust; - u64 msr_xss; union { struct vmx_vcpu vmx; diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h index a7244793bf..0d52c085f6 100644 --- a/xen/include/asm-x86/msr.h +++ b/xen/include/asm-x86/msr.h @@ -313,6 +313,11 @@ struct vcpu_msrs * values here may be stale in current context. */ uint32_t dr_mask[4]; + + /* 0x00000da0 - MSR_IA32_XSS */ + struct { + uint64_t raw; + } xss; }; void init_guest_msr_policy(void);