From: Keir Fraser <keir.fraser@citrix.com>
Date: Fri, 13 Mar 2009 07:45:11 +0000 (+0000)
Subject: [SVM] Always read zero AMD C1E control MSR to allow cross-vendor migration
X-Git-Tag: archive/raspbian/4.8.0-1+rpi1~1^2~13992^2~72
X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=8eaca58a104bf6a79202373d07d835a40268181e;p=xen.git

[SVM] Always read zero AMD C1E control MSR to allow cross-vendor migration

Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>
---

diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index c19d36a9d3..c8c53c6244 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -1776,6 +1776,15 @@ int hvm_msr_read_intercept(struct cpu_user_regs *regs)
         msr_content = var_range_base[index];
         break;
 
+    case MSR_K8_ENABLE_C1E:
+         /* There's no point in letting the guest see C-States.
+          * Further, this AMD-only register may be accessed if this HVM guest
+          * has been migrated to an Intel host. This fixes a guest crash
+          * in this case.
+          */
+         msr_content = 0;
+         break;
+
     default:
         return hvm_funcs.msr_read_intercept(regs);
     }