From: Ian Campbell Date: Mon, 30 Mar 2015 11:12:26 +0000 (+0100) Subject: xen: arm: Handle 32-bit EL0 on 64-bit EL1 when advancing PC after trap X-Git-Tag: archive/raspbian/4.8.0-1+rpi1~1^2~3498 X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=86bab57d094af5f03171c460934df64831cd1b9f;p=xen.git xen: arm: Handle 32-bit EL0 on 64-bit EL1 when advancing PC after trap Fix a coding style issue while in the area. Signed-off-by: Ian Campbell Reviewed-by: Julien Grall --- diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index 37bc150d9f..e13b959b3e 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -1487,7 +1487,7 @@ static int check_conditional_instr(struct cpu_user_regs *regs, union hsr hsr) { unsigned long it; - BUG_ON( !is_32bit_domain(current->domain) || !(cpsr&PSR_THUMB) ); + BUG_ON( !psr_mode_is_32bit(regs->cpsr) || !(cpsr&PSR_THUMB) ); it = ( (cpsr >> (10-2)) & 0xfc) | ((cpsr >> 25) & 0x3 ); @@ -1496,7 +1496,7 @@ static int check_conditional_instr(struct cpu_user_regs *regs, union hsr hsr) return 1; /* The cond for this instruction works out as the top 4 bits. */ - cond = ( it >> 4 ); + cond = ( it >> 4 ); } cpsr_cond = cpsr >> 28; @@ -1514,10 +1514,10 @@ static void advance_pc(struct cpu_user_regs *regs, union hsr hsr) unsigned long itbits, cond, cpsr = regs->cpsr; /* PSR_IT_MASK bits can only be set for 32-bit processors in Thumb mode. */ - BUG_ON( (!is_32bit_domain(current->domain)||!(cpsr&PSR_THUMB)) + BUG_ON( (!psr_mode_is_32bit(cpsr)||!(cpsr&PSR_THUMB)) && (cpsr&PSR_IT_MASK) ); - if ( is_32bit_domain(current->domain) && (cpsr&PSR_IT_MASK) ) + if ( cpsr&PSR_IT_MASK ) { /* The ITSTATE[7:0] block is contained in CPSR[15:10],CPSR[26:25] *