From: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Date: Wed, 16 Aug 2017 18:44:56 +0000 (+0300)
Subject: arm: traps: handle unknown exceptions in check_conditional_instr()
X-Git-Tag: archive/raspbian/4.11.1-1+rpi1~1^2~66^2~1639
X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=8604e12694fef08494c2e15fd85acd92dddd8111;p=xen.git

arm: traps: handle unknown exceptions in check_conditional_instr()

According to ARM architecture reference manual (ARM DDI 0487B.a page D7-2259,
ARM DDI 0406C.c page B3-1426), exception with unknown reason (HSR.EC == 0)
has no valid bits in HSR (apart from HSR.EC), so we can't check if that was
caused by conditional instruction. We need to assume that it is unconditional.

Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Acked-by: Julien Grall <julien.grall@arm.com>
Signed-off-by: Stefano Stabellini <sstabellini@kernel.org>
---

diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index c07999b518..eae221272c 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -1717,7 +1717,7 @@ static int check_conditional_instr(struct cpu_user_regs *regs,
     int cond;
 
     /* Unconditional Exception classes */
-    if ( hsr.ec >= 0x10 )
+    if ( hsr.ec == HSR_EC_UNKNOWN || hsr.ec >= 0x10 )
         return 1;
 
     /* Check for valid condition in hsr */