From: Andrew Cooper Date: Fri, 12 Aug 2016 13:35:28 +0000 (+0100) Subject: hvm/fep: Allow testing of instructions crossing the -1 -> 0 virtual boundary X-Git-Tag: archive/raspbian/4.8.0-1+rpi1~1^2~428 X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=7b5cee79dad24e7006059667b02bd7de685d8ee5;p=xen.git hvm/fep: Allow testing of instructions crossing the -1 -> 0 virtual boundary The Force Emulation Prefix is named to follow its PV counterpart for cpuid or rdtsc, but isn't really an instruction prefix. It behaves as a break-out into Xen, with the purpose of emulating the next instruction in the current state. It is important to be able to test legal situations which occur in real hardware, including instruction which cross certain boundaries, and instructions starting at 0. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 787f055527..89539287d7 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -3981,15 +3981,8 @@ void hvm_ud_intercept(struct cpu_user_regs *regs) unsigned long addr; char sig[5]; /* ud2; .ascii "xen" */ - /* - * Note that in the call below we pass 1 more than the signature - * size, to guard against the overall code sequence wrapping between - * "prefix" and actual instruction. There's necessarily at least one - * actual instruction byte required, so this won't cause failure on - * legitimate uses. - */ if ( hvm_virtual_to_linear_addr(x86_seg_cs, cs, regs->eip, - sizeof(sig) + 1, hvm_access_insn_fetch, + sizeof(sig), hvm_access_insn_fetch, (hvm_long_mode_enabled(cur) && cs->attr.fields.l) ? 64 : cs->attr.fields.db ? 32 : 16, &addr) && @@ -3999,6 +3992,11 @@ void hvm_ud_intercept(struct cpu_user_regs *regs) { regs->eip += sizeof(sig); regs->eflags &= ~X86_EFLAGS_RF; + + /* Zero the upper 32 bits of %rip if not in 64bit mode. */ + if ( !(hvm_long_mode_enabled(cur) && cs->attr.fields.l) ) + regs->eip = regs->_eip; + add_taint(TAINT_HVM_FEP); } }