From: Tim Deegan Date: Thu, 28 Mar 2013 10:07:48 +0000 (+0000) Subject: arm: fix comment in HTCR setup. X-Git-Tag: archive/raspbian/4.8.0-1+rpi1~1^2~7045 X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=7186e6718e70250900f934f6f95a5c60edffbfa6;p=xen.git arm: fix comment in HTCR setup. Reported-by: Gihun Jung Signed-off-by: Tim Deegan Acked-by: Ian Campbell --- diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S index db3baa0c25..f2f581da97 100644 --- a/xen/arch/arm/arm32/head.S +++ b/xen/arch/arm/arm32/head.S @@ -189,7 +189,7 @@ skip_bss: /* Set up the HTCR: * PT walks use Outer-Shareable accesses, - * PT walks are write-back, no-write-allocate in both cache levels, + * PT walks are write-back, write-allocate in both cache levels, * Full 32-bit address space goes through this table. */ ldr r0, =0x80002500 mcr CP32(r0, HTCR) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index b7ab251385..bbde419d5e 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -173,7 +173,7 @@ skip_bss: * PASize -- 4G * Top byte is used * PT walks use Outer-Shareable accesses, - * PT walks are write-back, no-write-allocate in both cache levels, + * PT walks are write-back, write-allocate in both cache levels, * Full 64-bit address space goes through this table. */ ldr x0, =0x80802500 msr tcr_el2, x0