From: awilliam@xenbuild.aw Date: Tue, 13 Jun 2006 21:05:33 +0000 (-0600) Subject: [IA64] Fix vga acceleration for VTI domain X-Git-Tag: archive/raspbian/4.8.0-1+rpi1~1^2~15969 X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=6ea824a3f682b46edb40a5e0eb69e37dd9fb7af4;p=xen.git [IA64] Fix vga acceleration for VTI domain Now guest vhpt table of VMX domain is searched to insert some entry into vtlb on the fly. However previous guard on memory attribute is only done for guest itc.d emulation. That breaks VGA acceleration and this patch fixes it by moving check to right place. Signed-off-by Kevin Tian --- diff --git a/xen/arch/ia64/vmx/vmmu.c b/xen/arch/ia64/vmx/vmmu.c index 3a91956b10..3df28d1afd 100644 --- a/xen/arch/ia64/vmx/vmmu.c +++ b/xen/arch/ia64/vmx/vmmu.c @@ -373,18 +373,8 @@ IA64FAULT vmx_vcpu_itc_d(VCPU *vcpu, UINT64 pte, UINT64 itir, UINT64 ifa) } #endif //VTLB_DEBUG gpfn = (pte & _PAGE_PPN_MASK)>> PAGE_SHIFT; - if (VMX_DOMAIN(vcpu)) { - if (__gpfn_is_io(vcpu->domain, gpfn)) - pte |= VTLB_PTE_IO; - else{ - if ((pte & _PAGE_MA_MASK)!=_PAGE_MA_NAT) - /* Ensure WB attribute if pte is related to a normal mem page, - * which is required by vga acceleration since qemu maps shared - * vram buffer with WB. - */ - pte &= ~_PAGE_MA_MASK; - } - } + if (VMX_DOMAIN(vcpu) && __gpfn_is_io(vcpu->domain, gpfn)) + pte |= VTLB_PTE_IO; thash_purge_and_insert(vcpu, pte, itir, ifa); return IA64_NO_FAULT; diff --git a/xen/arch/ia64/vmx/vtlb.c b/xen/arch/ia64/vmx/vtlb.c index 57466da8c7..2e038890fe 100644 --- a/xen/arch/ia64/vmx/vtlb.c +++ b/xen/arch/ia64/vmx/vtlb.c @@ -446,6 +446,13 @@ void thash_purge_and_insert(VCPU *v, u64 pte, u64 itir, u64 ifa) ps = itir_ps(itir); if(VMX_DOMAIN(v)){ + /* Ensure WB attribute if pte is related to a normal mem page, + * which is required by vga acceleration since qemu maps shared + * vram buffer with WB. + */ + if (!(pte & VTLB_PTE_IO) && ((pte & _PAGE_MA_MASK) != _PAGE_MA_NAT)) + pte &= ~_PAGE_MA_MASK; + phy_pte = translate_phy_pte(v, &pte, itir, ifa); if(ps==PAGE_SHIFT){ if(!(pte&VTLB_PTE_IO)){