From: Len Brown <len.brown@intel.com>
Date: Fri, 30 Aug 2013 09:00:07 +0000 (+0200)
Subject: x86/mwait_idle: initial C8, C9, C10 support
X-Git-Tag: archive/raspbian/4.8.0-1+rpi1~1^2~6427
X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=6e287713c94b40bbf21a378eab622108b1186233;p=xen.git

x86/mwait_idle: initial C8, C9, C10 support

Allow mwait_idle to utilize C8, C9, C10 when they are present on...
"Fourth Generation Intel(R) Core(TM) Processors", which are based on
Intel(R) microarchitecture code name Haswell.

Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Keir Fraser <keir@xen.org>
---

diff --git a/xen/arch/x86/cpu/mwait-idle.c b/xen/arch/x86/cpu/mwait-idle.c
index 879963215f..85179f2f81 100644
--- a/xen/arch/x86/cpu/mwait-idle.c
+++ b/xen/arch/x86/cpu/mwait-idle.c
@@ -252,6 +252,24 @@ static const struct cpuidle_state hsw_cstates[] = {
 		.exit_latency = 166,
 		.target_residency = 500,
 	},
+ 	{
+		.name = "C8-HSW",
+		.flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
+		.exit_latency = 300,
+		.target_residency = 900,
+	},
+	{
+		.name = "C9-HSW",
+		.flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
+		.exit_latency = 600,
+		.target_residency = 1800,
+	},
+	{
+		.name = "C10-HSW",
+		.flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
+		.exit_latency = 2600,
+		.target_residency = 7700,
+	},
 	{}
 };