From: Jan Beulich Date: Fri, 20 Dec 2019 15:30:13 +0000 (+0100) Subject: x86: explicitly disallow guest access to PPIN X-Git-Tag: archive/raspbian/4.14.0+80-gd101b417b7-1+rpi1^2~63^2~1004 X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=619a7119da6a57ffe8bdd0f382e011eef05fbec2;p=xen.git x86: explicitly disallow guest access to PPIN To fulfill the "protected" in its name, don't let the real hardware values leak. While we could report a control register value expressing this (which I would have preferred), unconditionally raise #GP for all accesses (in the interest of getting this done). Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper --- diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index da504ce7ae..785574de67 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -136,6 +136,10 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val) case MSR_TSX_CTRL: case MSR_AMD64_LWP_CFG: case MSR_AMD64_LWP_CBADDR: + case MSR_PPIN_CTL: + case MSR_PPIN: + case MSR_AMD_PPIN_CTL: + case MSR_AMD_PPIN: /* Not offered to guests. */ goto gp_fault; @@ -279,6 +283,10 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) case MSR_TSX_CTRL: case MSR_AMD64_LWP_CFG: case MSR_AMD64_LWP_CBADDR: + case MSR_PPIN_CTL: + case MSR_PPIN: + case MSR_AMD_PPIN_CTL: + case MSR_AMD_PPIN: /* Not offered to guests. */ goto gp_fault;