From: Julien Grall <julien.grall@arm.com>
Date: Mon, 9 Oct 2017 13:23:38 +0000 (+0100)
Subject: xen/arm: page: Describe the layout of flags used to update page tables
X-Git-Tag: archive/raspbian/4.11.1-1+rpi1~1^2~66^2~1172
X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=5f3edb5f32e511b915d173403d0b7b5ea38e00ad;p=xen.git

xen/arm: page: Describe the layout of flags used to update page tables

Currently, the flags used to update page tables (i.e PAGE_HYPERVISOR_*)
only contains the memory attribute index. Follow-up patches will add
more information in it. So document the current layout.

At the same time introduce PAGE_AI_MASK to get the memory attribute
index easily.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index 70a03015ec..c1dad61a20 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -331,7 +331,7 @@ static inline lpae_t mfn_to_xen_entry(mfn_t mfn, unsigned attr)
 /* Map a 4k page in a fixmap entry */
 void set_fixmap(unsigned map, mfn_t mfn, unsigned int flags)
 {
-    lpae_t pte = mfn_to_xen_entry(mfn, flags);
+    lpae_t pte = mfn_to_xen_entry(mfn, PAGE_AI_MASK(flags));
     pte.pt.table = 1; /* 4k mappings always have this bit set */
     pte.pt.xn = 1;
     write_pte(xen_fixmap + third_table_offset(FIXMAP_ADDR(map)), pte);
@@ -1021,7 +1021,7 @@ static int create_xen_entries(enum xenmap_operation op,
                 }
                 if ( op == RESERVE )
                     break;
-                pte = mfn_to_xen_entry(mfn, flags);
+                pte = mfn_to_xen_entry(mfn, PAGE_AI_MASK(flags));
                 pte.pt.table = 1;
                 write_pte(entry, pte);
                 break;
diff --git a/xen/include/asm-arm/page.h b/xen/include/asm-arm/page.h
index 0ae1a2587b..aa3e83f5b4 100644
--- a/xen/include/asm-arm/page.h
+++ b/xen/include/asm-arm/page.h
@@ -65,6 +65,13 @@
 #define MAIR0VAL (MAIRVAL & 0xffffffff)
 #define MAIR1VAL (MAIRVAL >> 32)
 
+/*
+ * Layout of the flags used for updating the hypervisor page tables
+ *
+ * [0:2] Memory Attribute Index
+ */
+#define PAGE_AI_MASK(x) ((x) & 0x7U)
+
 #define PAGE_HYPERVISOR         (MT_NORMAL)
 #define PAGE_HYPERVISOR_NOCACHE (MT_DEVICE_nGnRE)
 #define PAGE_HYPERVISOR_WC      (MT_NORMAL_NC)