From: Michael R. Crusoe Date: Sat, 23 Jan 2021 15:07:18 +0000 (+0100) Subject: enhanced the atomic yield patch (SSE2/arm/powerpc) X-Git-Tag: archive/raspbian/3.1+ds1-4+rpi1^2~71 X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=59c34efec19517ef61e172152a0858c27502d967;p=solvespace.git enhanced the atomic yield patch (SSE2/arm/powerpc) --- diff --git a/debian/changelog b/debian/changelog index 72dbb15..38183be 100644 --- a/debian/changelog +++ b/debian/changelog @@ -33,6 +33,10 @@ solvespace (3.0.rc2+repack1-1) UNRELEASED; urgency=medium * Do not parse d/changelog (routine-update) * Add salsa-ci file (routine-update) * debian/upstream/metadata: mention upstream's GitHub repository + * debian/patches/03_use_system_threejs.patch: refreshed + * debian/patches/10_mimalloc_restrict_cpu_yield.patch: enhanced with better + atomic yield for SSE2 (if available) and better/added ops for arm64, + armel, and ppc64{el,}/powerpc. Closes: #980169 -- Michael R. Crusoe Sat, 23 Jan 2021 15:40:21 +0100 diff --git a/debian/patches/03_use_system_threejs.patch b/debian/patches/03_use_system_threejs.patch index 46d8b2f..d4b206e 100644 --- a/debian/patches/03_use_system_threejs.patch +++ b/debian/patches/03_use_system_threejs.patch @@ -10,11 +10,9 @@ Date: Tue, 19 Jan 2021 15:05:06 -0600 src/export.cpp | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) -diff --git a/res/CMakeLists.txt b/res/CMakeLists.txt -index 5969039..348f812 100644 ---- a/res/CMakeLists.txt -+++ b/res/CMakeLists.txt -@@ -282,7 +282,6 @@ add_resources( +--- solvespace.orig/res/CMakeLists.txt ++++ solvespace/res/CMakeLists.txt +@@ -284,7 +284,6 @@ shaders/edge.frag shaders/edge.vert shaders/outline.vert @@ -22,11 +20,9 @@ index 5969039..348f812 100644 threejs/hammer-2.0.8.js.gz threejs/SolveSpaceControls.js) -diff --git a/src/export.cpp b/src/export.cpp -index e0c6182..6a670b9 100644 ---- a/src/export.cpp -+++ b/src/export.cpp -@@ -1064,7 +1064,7 @@ void SolveSpaceUI::ExportMeshAsThreeJsTo(FILE *f, const Platform::Path &filename +--- solvespace.orig/src/export.cpp ++++ solvespace/src/export.cpp +@@ -1014,7 +1014,7 @@ if(filename.HasExtension("html")) { fprintf(f, htmlbegin, diff --git a/debian/patches/10_mimalloc_restrict_cpu_yield.patch b/debian/patches/10_mimalloc_restrict_cpu_yield.patch index aeca596..7579cc8 100644 --- a/debian/patches/10_mimalloc_restrict_cpu_yield.patch +++ b/debian/patches/10_mimalloc_restrict_cpu_yield.patch @@ -1,43 +1,61 @@ Subject: Restricts cpu yield instructions a little. From: Ryan Pavlik - -Date: Tue, 19 Jan 2021 13:46:43 -0600 +Last-Updated: 2021-01-23 +Forwarded: https://github.com/microsoft/mimalloc/pull/350 adding clobber for ARM and preventing older 32 bits chips not supporting this instruction. Backport of https://github.com/microsoft/mimalloc/commit/33a10b48605f8bb419487a03125815ad6ee00a70 +Enhanced via https://github.com/mr-c/misc/wiki/pause-techniques-on-many-architectures + --- extlib/mimalloc/include/mimalloc-atomic.h | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) -diff --git a/extlib/mimalloc/include/mimalloc-atomic.h b/extlib/mimalloc/include/mimalloc-atomic.h -index 722b6ad..94010d4 100644 ---- a/extlib/mimalloc/include/mimalloc-atomic.h -+++ b/extlib/mimalloc/include/mimalloc-atomic.h -@@ -267,16 +267,22 @@ static inline void mi_atomic_maxi64(volatile int64_t* p, int64_t x) { +--- solvespace.orig/extlib/mimalloc/include/mimalloc-atomic.h ++++ solvespace/extlib/mimalloc/include/mimalloc-atomic.h +@@ -266,17 +266,37 @@ + static inline void mi_atomic_yield(void) { std::this_thread::yield(); } - #elif (defined(__GNUC__) || defined(__clang__)) && \ +-#elif (defined(__GNUC__) || defined(__clang__)) && \ - (defined(__x86_64__) || defined(__i386__) || defined(__arm__) || defined(__aarch64__)) -+ (defined(__x86_64__) || defined(__i386__) || (defined(__arm__) && __ARM_ARCH__ >= 7) || defined(__aarch64__)) - #if defined(__x86_64__) || defined(__i386__) +-#if defined(__x86_64__) || defined(__i386__) ++#elif defined(__SSE2__) // AMD and Intel ++ #include ++ static inline void mi_atomic_yield(void) { ++ _mm_pause(); ++ } ++#elif defined(__x86_64__) || defined(__i386__) static inline void mi_atomic_yield(void) { asm volatile ("pause" ::: "memory"); } -#elif defined(__arm__) || defined(__aarch64__) -+#elif (defined(__arm__) && __ARM_ARCH__ >= 7) || defined(__aarch64__) - static inline void mi_atomic_yield(void) { -- asm volatile("yield"); ++#elif defined(__aarch64__) ++ static inline void mi_atomic_yield(void) { ++ asm volatile("wfe"); ++ } ++#elif defined(__arm__) && __ARM_ARCH__ >= 7 ++ static inline void mi_atomic_yield(void) { + __asm__ volatile("yield" ::: "memory"); - } - #endif ++ } ++#elif defined(__armel__) || defined(__ARMEL__) ++ static inline void mi_atomic_yield(void) { ++ asm volatile ("nop" ::: "memory"); // default operation - does nothing => Might lead to passive spinning. ++ } ++#elif defined(__powerpc__) || defined(__ppc__) || defined(__PPC__) // PowerPC ++ static inline void mi_atomic_yield(void) { ++ __asm__ __volatile__ ("or 27,27,27" ::: "memory"); ++ } +#elif defined(__sun) + // Fallback for other archs + #include -+ static inline void mi_atomic_yield(void) { + static inline void mi_atomic_yield(void) { +- asm volatile("yield"); + smt_pause(); -+ } + } +-#endif #elif defined(__wasi__) #include static inline void mi_atomic_yield(void) {