From: Bertrand Marquis <bertrand.marquis@arm.com>
Date: Tue, 6 Jul 2021 15:28:57 +0000 (+0100)
Subject: tools: Fix CPSR/SPSR print size
X-Git-Tag: archive/raspbian/4.16.0+51-g0941d6cb-1+rpi1~2^2~42^2~353
X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=32cbc7f96ffa3ddceacb3812da0e31a82840b138;p=xen.git

tools: Fix CPSR/SPSR print size

918b8842a852 changed CPSR and SPSR to be stored as 64bit values.

This is fixing the print size in some tools to use 64bit type.

Fixes: 918b8842a852 ("arm64: Change type of hsr, cpsr, spsr_el1 to uint64_t")
Signed-off-by: Bertrand Marquis <bertrand.marquis@arm.com>
Reviewed-by: Michal Orzel <michal.orzel@arm.com>
Tested-by: Michal Orzel <michal.orzel@arm.com>
---

diff --git a/tools/libs/guest/xg_dom_arm.c b/tools/libs/guest/xg_dom_arm.c
index 01e85e0ea9..5e3b76355e 100644
--- a/tools/libs/guest/xg_dom_arm.c
+++ b/tools/libs/guest/xg_dom_arm.c
@@ -140,7 +140,7 @@ static int vcpu_arm32(struct xc_dom_image *dom)
 
     ctxt->flags = VGCF_online;
 
-    DOMPRINTF("Initial state CPSR %#"PRIx32" PC %#"PRIx32,
+    DOMPRINTF("Initial state CPSR %#"PRIx64" PC %#"PRIx32,
            ctxt->user_regs.cpsr, ctxt->user_regs.pc32);
 
     rc = xc_vcpu_setcontext(dom->xch, dom->guest_domid, 0, &any_ctx);
@@ -182,7 +182,7 @@ static int vcpu_arm64(struct xc_dom_image *dom)
 
     ctxt->flags = VGCF_online;
 
-    DOMPRINTF("Initial state CPSR %#"PRIx32" PC %#"PRIx64,
+    DOMPRINTF("Initial state CPSR %#"PRIx64" PC %#"PRIx64,
            ctxt->user_regs.cpsr, ctxt->user_regs.pc64);
 
     rc = xc_vcpu_setcontext(dom->xch, dom->guest_domid, 0, &any_ctx);
diff --git a/tools/xentrace/xenctx.c b/tools/xentrace/xenctx.c
index 972f473dbf..85ba0c0fa6 100644
--- a/tools/xentrace/xenctx.c
+++ b/tools/xentrace/xenctx.c
@@ -556,7 +556,7 @@ static void print_ctx_32(vcpu_guest_context_t *ctx)
     printf("PC:       %08"PRIx32, regs->pc32);
     print_symbol(regs->pc32, KERNEL_TEXT_ADDR);
     printf("\n");
-    printf("CPSR:     %08"PRIx32"\n", regs->cpsr);
+    printf("CPSR:     %08"PRIx64"\n", regs->cpsr);
     printf("USR:               SP:%08"PRIx32" LR:%08"PRIx32"\n",
            regs->sp_usr, regs->lr_usr);
     printf("SVC: SPSR:%08"PRIx32" SP:%08"PRIx32" LR:%08"PRIx32"\n",
@@ -614,8 +614,8 @@ static void print_ctx_64(vcpu_guest_context_t *ctx)
     printf("LR:       %016"PRIx64"\n", regs->x30);
     printf("ELR_EL1:  %016"PRIx64"\n", regs->elr_el1);
 
-    printf("CPSR:     %08"PRIx32"\n", regs->cpsr);
-    printf("SPSR_EL1: %08"PRIx32"\n", regs->spsr_el1);
+    printf("CPSR:     %08"PRIx64"\n", regs->cpsr);
+    printf("SPSR_EL1: %08"PRIx64"\n", regs->spsr_el1);
 
     printf("SP_EL0:   %016"PRIx64"\n", regs->sp_el0);
     printf("SP_EL1:   %016"PRIx64"\n", regs->sp_el1);