From: Julien Grall <julien.grall@citrix.com>
Date: Wed, 18 Nov 2015 17:28:06 +0000 (+0000)
Subject: xen/arm: vgic-v3: Make clear that GICD_*SPI_* registers are reserved
X-Git-Tag: archive/raspbian/4.8.0-1+rpi1~1^2~2178
X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=2a91f05083c33f69d19ec3ee037b4536f9dd4516;p=xen.git

xen/arm: vgic-v3: Make clear that GICD_*SPI_* registers are reserved

Our vGIC emulation have GICD_TYPER.MBIS set to 0 which means that
GICD_*SPI_* registers are reserved. Implement them using the *_reserved
labels.

Also, implement theses registers for the read part.

Signed-off-by: Julien Grall <julien.grall@citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
---

diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
index 44e926a9df..985e866793 100644
--- a/xen/arch/arm/vgic-v3.c
+++ b/xen/arch/arm/vgic-v3.c
@@ -951,15 +951,31 @@ static int vgic_v3_distr_mmio_read(struct vcpu *v, mmio_info_t *info,
     case VRANGE32(0x0020, 0x003C):
         goto read_impl_defined;
 
+    case VREG32(GICD_SETSPI_NSR):
+        /* Message based SPI is not implemented */
+        goto read_reserved;
+
     case VREG32(0x0044):
         goto read_reserved;
 
+    case VREG32(GICD_CLRSPI_NSR):
+        /* Message based SPI is not implemented */
+        goto read_reserved;
+
     case VREG32(0x004C):
         goto read_reserved;
 
+    case VREG32(GICD_SETSPI_SR):
+        /* Message based SPI is not implemented */
+        goto read_reserved;
+
     case VREG32(0x0054):
         goto read_reserved;
 
+    case VREG32(GICD_CLRSPI_SR):
+        /* Message based SPI is not implemented */
+        goto read_reserved;
+
     case VRANGE32(0x005C, 0x007C):
         goto read_reserved;
 
@@ -1125,28 +1141,28 @@ static int vgic_v3_distr_mmio_write(struct vcpu *v, mmio_info_t *info,
 
     case VREG32(GICD_SETSPI_NSR):
         /* Message based SPI is not implemented */
-        goto write_ignore_32;
+        goto write_reserved;
 
     case VREG32(0x0044):
         goto write_reserved;
 
     case VREG32(GICD_CLRSPI_NSR):
         /* Message based SPI is not implemented */
-        goto write_ignore_32;
+        goto write_reserved;
 
     case VREG32(0x004C):
         goto write_reserved;
 
     case VREG32(GICD_SETSPI_SR):
         /* Message based SPI is not implemented */
-        goto write_ignore_32;
+        goto write_reserved;
 
     case VREG32(0x0054):
         goto write_reserved;
 
     case VREG32(GICD_CLRSPI_SR):
         /* Message based SPI is not implemented */
-        goto write_ignore_32;
+        goto write_reserved;
 
     case VRANGE32(0x005C, 0x007C):
         goto write_reserved;