From: Mirela Simonovic Date: Fri, 1 Jun 2018 13:17:42 +0000 (+0200) Subject: xen/arm: Ignore write to GICD_ISACTIVERn registers (vgic-v2) X-Git-Tag: archive/raspbian/4.14.0+80-gd101b417b7-1+rpi1^2~63^2~3704^2~21 X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=25f9e80201f3688e0c4d5c4e43e4b6143b441c52;p=xen.git xen/arm: Ignore write to GICD_ISACTIVERn registers (vgic-v2) Guests attempt to write into these registers on resume (for example Linux). Without this patch a data abort exception will be raised to the guest. This patch handles the write access by ignoring it, but only if the value to be written is zero. This should be fine because reading these registers is already handled as 'read as zero'. Signed-off-by: Mirela Simonovic Reviewed-by: Julien Grall --- diff --git a/xen/arch/arm/vgic-v2.c b/xen/arch/arm/vgic-v2.c index 646d1f3d12..f6c11f1e41 100644 --- a/xen/arch/arm/vgic-v2.c +++ b/xen/arch/arm/vgic-v2.c @@ -485,6 +485,8 @@ static int vgic_v2_distr_mmio_write(struct vcpu *v, mmio_info_t *info, case VRANGE32(GICD_ISACTIVER, GICD_ISACTIVERN): if ( dabt.size != DABT_WORD ) goto bad_width; + if ( r == 0 ) + goto write_ignore_32; printk(XENLOG_G_ERR "%pv: vGICD: unhandled word write %#"PRIregister" to ISACTIVER%d\n", v, r, gicd_reg - GICD_ISACTIVER);