From: Keir Fraser Date: Wed, 16 Dec 2009 12:32:35 +0000 (+0000) Subject: iommu: Actually clear IO-APIC pins on boot and shutdown when used with an IOMMU X-Git-Tag: archive/raspbian/4.8.0-1+rpi1~1^2~12892 X-Git-Url: https://dgit.raspbian.org/?a=commitdiff_plain;h=142a10c6c8d52689e9770e5f61bcce7b4af9095a;p=xen.git iommu: Actually clear IO-APIC pins on boot and shutdown when used with an IOMMU When booted with iommu=on, io_apic_read/write functions call into the interrupt remapping code to update the IRTEs. Unfortunately, on boot and shutdown, we really want clear_IO_APIC() to sanitize the actual IOAPIC RTE, and not just the bits that are active when interrupt remapping is enabled. This is particularly a problem on older versions of Xen which used the IOAPIC RTE as the canonical source for the IRTE index. In that case, clear_IO_APIC() actually causes whatever happens to be stored in the RTEs to be used as an IRTE index, which can come back and bite us in ioapic_guest_write() if we attempt to remove an interrupt that didn't actually exist. Current upstream appears less susceptible to errors since the IRTE index is stored in an array, but it's still a good idea to sanitize the IOAPIC state. Signed-off-by: Alex Williamson Signed-off-by: Keir Fraser --- diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c index 95a0a60938..031360ef67 100644 --- a/xen/arch/x86/io_apic.c +++ b/xen/arch/x86/io_apic.c @@ -221,15 +221,21 @@ static void eoi_IO_APIC_irq(unsigned int irq) spin_unlock_irqrestore(&ioapic_lock, flags); } -static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin) -{ +#define clear_IO_APIC_pin(a,p) __clear_IO_APIC_pin(a,p,0) +#define clear_IO_APIC_pin_raw(a,p) __clear_IO_APIC_pin(a,p,1) +static void __clear_IO_APIC_pin(unsigned int apic, unsigned int pin, int raw) +{ + unsigned int (*read)(unsigned int, unsigned int) + = raw ? __io_apic_read : io_apic_read; + void (*write)(unsigned int, unsigned int, unsigned int) + = raw ? __io_apic_write : io_apic_write; struct IO_APIC_route_entry entry; unsigned long flags; /* Check delivery_mode to be sure we're not clearing an SMI pin */ spin_lock_irqsave(&ioapic_lock, flags); - *(((int*)&entry) + 0) = io_apic_read(apic, 0x10 + 2 * pin); - *(((int*)&entry) + 1) = io_apic_read(apic, 0x11 + 2 * pin); + *(((int*)&entry) + 0) = (*read)(apic, 0x10 + 2 * pin); + *(((int*)&entry) + 1) = (*read)(apic, 0x11 + 2 * pin); spin_unlock_irqrestore(&ioapic_lock, flags); if (entry.delivery_mode == dest_SMI) return; @@ -240,8 +246,8 @@ static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin) memset(&entry, 0, sizeof(entry)); entry.mask = 1; spin_lock_irqsave(&ioapic_lock, flags); - io_apic_write(apic, 0x10 + 2 * pin, *(((int *)&entry) + 0)); - io_apic_write(apic, 0x11 + 2 * pin, *(((int *)&entry) + 1)); + (*write)(apic, 0x10 + 2 * pin, *(((int *)&entry) + 0)); + (*write)(apic, 0x11 + 2 * pin, *(((int *)&entry) + 1)); spin_unlock_irqrestore(&ioapic_lock, flags); } @@ -249,9 +255,12 @@ static void clear_IO_APIC (void) { int apic, pin; - for (apic = 0; apic < nr_ioapics; apic++) - for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) + for (apic = 0; apic < nr_ioapics; apic++) { + for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) { clear_IO_APIC_pin(apic, pin); + clear_IO_APIC_pin_raw(apic, pin); + } + } } #ifdef CONFIG_SMP diff --git a/xen/include/asm-x86/io_apic.h b/xen/include/asm-x86/io_apic.h index e47ee0c168..d546380435 100644 --- a/xen/include/asm-x86/io_apic.h +++ b/xen/include/asm-x86/io_apic.h @@ -131,20 +131,30 @@ extern struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS]; /* Only need to remap ioapic RTE (reg: 10~3Fh) */ #define ioapic_reg_remapped(reg) (iommu_enabled && ((reg) >= 0x10)) +static inline unsigned int __io_apic_read(unsigned int apic, unsigned int reg) +{ + *IO_APIC_BASE(apic) = reg; + return *(IO_APIC_BASE(apic)+4); +} + static inline unsigned int io_apic_read(unsigned int apic, unsigned int reg) { if (ioapic_reg_remapped(reg)) return iommu_read_apic_from_ire(apic, reg); + return __io_apic_read(apic, reg); +} + +static inline void __io_apic_write(unsigned int apic, unsigned int reg, unsigned int value) +{ *IO_APIC_BASE(apic) = reg; - return *(IO_APIC_BASE(apic)+4); + *(IO_APIC_BASE(apic)+4) = value; } static inline void io_apic_write(unsigned int apic, unsigned int reg, unsigned int value) { if (ioapic_reg_remapped(reg)) return iommu_update_ire_from_apic(apic, reg, value); - *IO_APIC_BASE(apic) = reg; - *(IO_APIC_BASE(apic)+4) = value; + __io_apic_write(apic, reg, value); } static inline void io_apic_eoi(unsigned int apic, unsigned int vector)