xen/arm: check for GICv3 platform support
authorVijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
Fri, 12 Sep 2014 11:09:49 +0000 (16:39 +0530)
committerIan Campbell <ian.campbell@citrix.com>
Mon, 15 Sep 2014 21:56:42 +0000 (22:56 +0100)
ID_AA64PFR0_EL1 register provides information about GIC support.
Check for this register in GICv3 driver.

Also print GICv3 support information in boot log

Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
xen/arch/arm/gic-v3.c
xen/arch/arm/setup.c
xen/include/asm-arm/cpufeature.h
xen/include/asm-arm/processor.h

index ca450f966c20f88ec6cb0e790e00e0bb43468ad7..91161a2225f1eb19e6a7ff6e3bc4094ebeb7e90e 100644 (file)
@@ -39,6 +39,7 @@
 #include <asm/device.h>
 #include <asm/gic.h>
 #include <asm/gic_v3_defs.h>
+#include <asm/cpufeature.h>
 
 struct rdist_region {
     paddr_t base;
@@ -1158,6 +1159,12 @@ static int __init gicv3_init(struct dt_device_node *node, const void *data)
     int res, i;
     uint32_t reg;
 
+    if ( !cpu_has_gicv3 )
+    {
+        dprintk(XENLOG_ERR, "GICv3: driver requires system register support\n");
+        return -ENODEV;
+    }
+
     dt_device_set_used_by(node, DOMID_XEN);
 
     res = dt_device_get_address(node, 0, &gicv3.dbase, &gicv3.dbase_size);
index 446b4dc007ea97fbcc38056ed2915f9a4dda212e..025349e319b6be6976dc6dd24b63de684c89e199 100644 (file)
@@ -103,9 +103,10 @@ static void __init processor_id(void)
            cpu_has_el2_32 ? "64+32" : cpu_has_el2_64 ? "64" : "No",
            cpu_has_el1_32 ? "64+32" : cpu_has_el1_64 ? "64" : "No",
            cpu_has_el0_32 ? "64+32" : cpu_has_el0_64 ? "64" : "No");
-    printk("    Extensions:%s%s\n",
+    printk("    Extensions:%s%s%s\n",
            cpu_has_fp ? " FloatingPoint" : "",
-           cpu_has_simd ? " AdvancedSIMD" : "");
+           cpu_has_simd ? " AdvancedSIMD" : "",
+           cpu_has_gicv3 ? " GICv3-SysReg" : "");
 
     printk("  Debug Features: %016"PRIx64" %016"PRIx64"\n",
            boot_cpu_data.dbg64.bits[0], boot_cpu_data.dbg64.bits[1]);
index 1d2c9c70ee989a9032c7eba7faea972e8913439c..aec9173c8f8dc529913b1fab72720049aacf28ad 100644 (file)
@@ -15,6 +15,7 @@
 #define cpu_has_el3_64    (boot_cpu_feature64(el3) >= 1)
 #define cpu_has_fp        (boot_cpu_feature64(fp) == 0)
 #define cpu_has_simd      (boot_cpu_feature64(simd) == 0)
+#define cpu_has_gicv3     (boot_cpu_feature64(gic) == 1)
 #endif
 
 #define cpu_feature32(c, feat)         ((c)->pfr32.feat)
index a13c368e21b89c49ec28d32f8c831aa28a95cea5..4aab8231abf293dddb3494242149b3f406a44eaf 100644 (file)
@@ -190,8 +190,8 @@ struct cpuinfo_arm {
             unsigned long el3:4;
             unsigned long fp:4;   /* Floating Point */
             unsigned long simd:4; /* Advanced SIMD */
-            unsigned long __res0:8;
-
+            unsigned long gic:4;  /* GIC support */
+            unsigned long __res0:4;
             unsigned long __res1;
         };
     } pfr64;