xen: arm: enable perf counters
authorIan Campbell <ian.campbell@citrix.com>
Wed, 14 Jan 2015 16:16:50 +0000 (16:16 +0000)
committerIan Campbell <ian.campbell@citrix.com>
Thu, 15 Jan 2015 13:51:57 +0000 (13:51 +0000)
As well as the existing common perf counters add a bunch of ARM
specifics, including the various trap types, vuart/vgic/vtimer
accesses and different types of interrupt.

Adjust the common code so that the columns line up again, not sure
when/where this went wrong.

This is mostly the set of stuff I happened to be interested in, it can
be made more (or less) fine grained as the need arises.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Julien Grall <julien.grall@linaro.org>
13 files changed:
xen/arch/arm/gic.c
xen/arch/arm/irq.c
xen/arch/arm/time.c
xen/arch/arm/traps.c
xen/arch/arm/vgic-v2.c
xen/arch/arm/vgic-v3.c
xen/arch/arm/vgic.c
xen/arch/arm/vtimer.c
xen/arch/arm/vuart.c
xen/common/perfc.c
xen/include/asm-arm/config.h
xen/include/asm-arm/perfc.h [new file with mode: 0644]
xen/include/asm-arm/perfc_defn.h [new file with mode: 0644]

index e7a1af5c1bd4810efac63b5a3dd73cf08c512919..390c8b05f95dea9c4756929588ee528975219791 100644 (file)
@@ -536,6 +536,8 @@ static void do_sgi(struct cpu_user_regs *regs, enum gic_sgi sgi)
     /* Lower the priority */
     struct irq_desc *desc = irq_to_desc(sgi);
 
+    perfc_incr(ipis);
+
     /* Lower the priority */
     gic_hw_ops->eoi_irq(desc);
 
@@ -604,6 +606,7 @@ static void maintenance_interrupt(int irq, void *dev_id, struct cpu_user_regs *r
      * GICH_HCR_UIE is cleared before reading GICC_IAR. As a consequence
      * this handler is not called.
      */
+    perfc_incr(maintenance_irqs);
 }
 
 void gic_dump_info(struct vcpu *v)
index 25ecf1d1556f27d19d883ebaf85531a6268eaebe..cb9c99bf629b1cd89b7faca0a48e28eb6bbb0808 100644 (file)
@@ -179,7 +179,14 @@ void do_IRQ(struct cpu_user_regs *regs, unsigned int irq, int is_fiq)
 {
     struct irq_desc *desc = irq_to_desc(irq);
 
-    /* TODO: perfc_incr(irqs); */
+    perfc_incr(irqs);
+
+    ASSERT(irq >= 16); /* SGIs do not come down this path */
+
+    if (irq < 32)
+        perfc_incr(ppis);
+    else
+        perfc_incr(spis);
 
     /* TODO: this_cpu(irq_count)++; */
 
@@ -199,6 +206,7 @@ void do_IRQ(struct cpu_user_regs *regs, unsigned int irq, int is_fiq)
     {
         struct domain *d = irq_get_domain(desc);
 
+        perfc_incr(guest_irqs);
         desc->handler->end(desc);
 
         set_bit(_IRQ_INPROGRESS, &desc->status);
index 0add494926e2db625a179af585f05654505c9da2..455f217610983b2f438b79af22dc4910249013f1 100644 (file)
@@ -151,6 +151,7 @@ static void timer_interrupt(int irq, void *dev_id, struct cpu_user_regs *regs)
     if ( irq == (timer_irq[TIMER_HYP_PPI]) &&
          READ_SYSREG32(CNTHP_CTL_EL2) & CNTx_CTL_PENDING )
     {
+        perfc_incr(hyp_timer_irqs);
         /* Signal the generic timer code to do its work */
         raise_softirq(TIMER_SOFTIRQ);
         /* Disable the timer to avoid more interrupts */
@@ -160,6 +161,7 @@ static void timer_interrupt(int irq, void *dev_id, struct cpu_user_regs *regs)
     if ( irq == (timer_irq[TIMER_PHYS_NONSECURE_PPI]) &&
          READ_SYSREG32(CNTP_CTL_EL0) & CNTx_CTL_PENDING )
     {
+        perfc_incr(phys_timer_irqs);
         /* Signal the generic timer code to do its work */
         raise_softirq(TIMER_SOFTIRQ);
         /* Disable the timer to avoid more interrupts */
@@ -182,6 +184,8 @@ static void vtimer_interrupt(int irq, void *dev_id, struct cpu_user_regs *regs)
     if ( unlikely(is_idle_vcpu(current)) )
         return;
 
+    perfc_incr(virt_timer_irqs);
+
     current->arch.virt_timer.ctl = READ_SYSREG32(CNTV_CTL_EL0);
     WRITE_SYSREG32(current->arch.virt_timer.ctl | CNTx_CTL_MASK, CNTV_CTL_EL0);
     vgic_vcpu_inject_irq(current, current->arch.virt_timer.irq);
index 4c932503a7efbe8203e076b21833738e7529b518..ad046e87c2072797466c7cbb0ab99d4e9923b9a1 100644 (file)
@@ -30,6 +30,7 @@
 #include <xen/hypercall.h>
 #include <xen/softirq.h>
 #include <xen/domain_page.h>
+#include <xen/perfc.h>
 #include <public/sched.h>
 #include <public/xen.h>
 #include <asm/debugger.h>
@@ -1240,6 +1241,7 @@ static void do_trap_psci(struct cpu_user_regs *regs)
     case PSCI_cpu_off:
         {
             uint32_t pstate = PSCI_ARG32(regs,1);
+            perfc_incr(vpsci_cpu_off);
             PSCI_RESULT_REG(regs) = do_psci_cpu_off(pstate);
         }
         break;
@@ -1247,33 +1249,41 @@ static void do_trap_psci(struct cpu_user_regs *regs)
         {
             uint32_t vcpuid = PSCI_ARG32(regs,1);
             register_t epoint = PSCI_ARG(regs,2);
+            perfc_incr(vpsci_cpu_on);
             PSCI_RESULT_REG(regs) = do_psci_cpu_on(vcpuid, epoint);
         }
         break;
     case PSCI_0_2_FN_PSCI_VERSION:
+        perfc_incr(vpsci_version);
         PSCI_RESULT_REG(regs) = do_psci_0_2_version();
         break;
     case PSCI_0_2_FN_CPU_OFF:
+        perfc_incr(vpsci_cpu_off);
         PSCI_RESULT_REG(regs) = do_psci_0_2_cpu_off();
         break;
     case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
+        perfc_incr(vpsci_migrate_info_type);
         PSCI_RESULT_REG(regs) = do_psci_0_2_migrate_info_type();
         break;
     case PSCI_0_2_FN_MIGRATE_INFO_UP_CPU:
     case PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU:
+        perfc_incr(vpsci_migrate_info_up_cpu);
         if ( psci_mode_check(current->domain, fid) )
             PSCI_RESULT_REG(regs) = do_psci_0_2_migrate_info_up_cpu();
         break;
     case PSCI_0_2_FN_SYSTEM_OFF:
+        perfc_incr(vpsci_system_off);
         do_psci_0_2_system_off();
         PSCI_RESULT_REG(regs) = PSCI_INTERNAL_FAILURE;
         break;
     case PSCI_0_2_FN_SYSTEM_RESET:
+        perfc_incr(vpsci_system_reset);
         do_psci_0_2_system_reset();
         PSCI_RESULT_REG(regs) = PSCI_INTERNAL_FAILURE;
         break;
     case PSCI_0_2_FN_CPU_ON:
     case PSCI_0_2_FN64_CPU_ON:
+        perfc_incr(vpsci_cpu_on);
         if ( psci_mode_check(current->domain, fid) )
         {
             register_t vcpuid = PSCI_ARG(regs,1);
@@ -1285,6 +1295,7 @@ static void do_trap_psci(struct cpu_user_regs *regs)
         break;
     case PSCI_0_2_FN_CPU_SUSPEND:
     case PSCI_0_2_FN64_CPU_SUSPEND:
+        perfc_incr(vpsci_cpu_suspend);
         if ( psci_mode_check(current->domain, fid) )
         {
             uint32_t pstate = PSCI_ARG32(regs,1);
@@ -1296,6 +1307,7 @@ static void do_trap_psci(struct cpu_user_regs *regs)
         break;
     case PSCI_0_2_FN_AFFINITY_INFO:
     case PSCI_0_2_FN64_AFFINITY_INFO:
+        perfc_incr(vpsci_cpu_affinity_info);
         if ( psci_mode_check(current->domain, fid) )
         {
             register_t taff = PSCI_ARG(regs,1);
@@ -1306,6 +1318,7 @@ static void do_trap_psci(struct cpu_user_regs *regs)
         break;
     case PSCI_0_2_FN_MIGRATE:
     case PSCI_0_2_FN64_MIGRATE:
+        perfc_incr(vpsci_cpu_migrate);
         if ( psci_mode_check(current->domain, fid) )
         {
             uint32_t tcpu = PSCI_ARG32(regs,1);
@@ -1344,15 +1357,19 @@ static void do_trap_hypercall(struct cpu_user_regs *regs, register_t *nr,
     register_t orig_pc = regs->pc;
 #endif
 
+    BUILD_BUG_ON(NR_hypercalls < ARRAY_SIZE(arm_hypercall_table) );
+
     if ( iss != XEN_HYPERCALL_TAG )
         domain_crash_synchronous();
 
     if ( *nr >= ARRAY_SIZE(arm_hypercall_table) )
     {
+        perfc_incr(invalid_hypercalls);
         HYPERCALL_RESULT_REG(regs) = -ENOSYS;
         return;
     }
 
+    perfc_incra(hypercalls, *nr);
     call = arm_hypercall_table[*nr].fn;
     if ( call == NULL )
     {
@@ -1492,8 +1509,10 @@ static int check_conditional_instr(struct cpu_user_regs *regs, union hsr hsr)
     cpsr_cond = cpsr >> 28;
 
     if ( !((cc_map[cond] >> cpsr_cond) & 1) )
+    {
+        perfc_incr(trap_uncond);
         return 0;
-
+    }
     return 1;
 }
 
@@ -2034,9 +2053,11 @@ asmlinkage void do_trap_hypervisor(struct cpu_user_regs *regs)
         }
         if ( hsr.wfi_wfe.ti ) {
             /* Yield the VCPU for WFE */
+            perfc_incr(trap_wfe);
             vcpu_yield();
         } else {
             /* Block the VCPU for WFI */
+            perfc_incr(trap_wfi);
             vcpu_block_unless_event_pending(current);
         }
         advance_pc(regs, hsr);
@@ -2044,32 +2065,39 @@ asmlinkage void do_trap_hypervisor(struct cpu_user_regs *regs)
     case HSR_EC_CP15_32:
         if ( !is_32bit_domain(current->domain) )
             goto bad_trap;
+        perfc_incr(trap_cp15_32);
         do_cp15_32(regs, hsr);
         break;
     case HSR_EC_CP15_64:
         if ( !is_32bit_domain(current->domain) )
             goto bad_trap;
+        perfc_incr(trap_cp15_64);
         do_cp15_64(regs, hsr);
         break;
     case HSR_EC_CP14_32:
         if ( !is_32bit_domain(current->domain) )
             goto bad_trap;
+        perfc_incr(trap_cp14_32);
         do_cp14_32(regs, hsr);
         break;
     case HSR_EC_CP14_DBG:
         if ( !is_32bit_domain(current->domain) )
             goto bad_trap;
+        perfc_incr(trap_cp14_dbg);
         do_cp14_dbg(regs, hsr);
         break;
     case HSR_EC_CP:
         if ( !is_32bit_domain(current->domain) )
             goto bad_trap;
+        perfc_incr(trap_cp);
         do_cp(regs, hsr);
         break;
     case HSR_EC_SMC32:
+        perfc_incr(trap_smc32);
         inject_undef32_exception(regs);
         break;
     case HSR_EC_HVC32:
+        perfc_incr(trap_hvc32);
 #ifndef NDEBUG
         if ( (hsr.iss & 0xff00) == 0xff00 )
             return do_debug_trap(regs, hsr.iss & 0x00ff);
@@ -2080,6 +2108,7 @@ asmlinkage void do_trap_hypervisor(struct cpu_user_regs *regs)
         break;
 #ifdef CONFIG_ARM_64
     case HSR_EC_HVC64:
+        perfc_incr(trap_hvc64);
 #ifndef NDEBUG
         if ( (hsr.iss & 0xff00) == 0xff00 )
             return do_debug_trap(regs, hsr.iss & 0x00ff);
@@ -2089,19 +2118,23 @@ asmlinkage void do_trap_hypervisor(struct cpu_user_regs *regs)
         do_trap_hypercall(regs, &regs->x16, hsr.iss);
         break;
     case HSR_EC_SMC64:
+        perfc_incr(trap_smc64);
         inject_undef64_exception(regs, hsr.len);
         break;
     case HSR_EC_SYSREG:
         if ( is_32bit_domain(current->domain) )
             goto bad_trap;
+        perfc_incr(trap_sysreg);
         do_sysreg(regs, hsr);
         break;
 #endif
 
     case HSR_EC_INSTR_ABORT_LOWER_EL:
+        perfc_incr(trap_iabt);
         do_trap_instr_abort_guest(regs, hsr);
         break;
     case HSR_EC_DATA_ABORT_LOWER_EL:
+        perfc_incr(trap_dabt);
         do_trap_data_abort_guest(regs, hsr);
         break;
 
index 1369f78b7c4011cd232bb6884286e8c2aa0c2658..4dc22679f6ab94714fc31b8c9c0b8b639bf48cd4 100644 (file)
@@ -41,6 +41,8 @@ static int vgic_v2_distr_mmio_read(struct vcpu *v, mmio_info_t *info)
     int gicd_reg = (int)(info->gpa - v->domain->arch.vgic.dbase);
     unsigned long flags;
 
+    perfc_incr(vgicd_reads);
+
     switch ( gicd_reg )
     {
     case GICD_CTLR:
@@ -271,6 +273,8 @@ static int vgic_v2_distr_mmio_write(struct vcpu *v, mmio_info_t *info)
     uint32_t tr;
     unsigned long flags;
 
+    perfc_incr(vgicd_writes);
+
     switch ( gicd_reg )
     {
     case GICD_CTLR:
index ff99e5092c79e1ebcc083145d80bb859a1ccf1d3..c738ca9c61d1bb32b1995f0984118d0787960bd7 100644 (file)
@@ -605,6 +605,8 @@ static int vgic_v3_rdistr_mmio_read(struct vcpu *v, mmio_info_t *info)
 {
     uint32_t offset;
 
+    perfc_incr(vgicr_reads);
+
     if ( v->domain->arch.vgic.rdist_stride != 0 )
         offset = info->gpa & (v->domain->arch.vgic.rdist_stride - 1);
     else
@@ -627,6 +629,8 @@ static int vgic_v3_rdistr_mmio_write(struct vcpu *v, mmio_info_t *info)
 {
     uint32_t offset;
 
+    perfc_incr(vgicr_writes);
+
     if ( v->domain->arch.vgic.rdist_stride != 0 )
         offset = info->gpa & (v->domain->arch.vgic.rdist_stride - 1);
     else
@@ -656,6 +660,8 @@ static int vgic_v3_distr_mmio_read(struct vcpu *v, mmio_info_t *info)
     unsigned int vcpu_id;
     int gicd_reg = (int)(info->gpa - v->domain->arch.vgic.dbase);
 
+    perfc_incr(vgicd_reads);
+
     switch ( gicd_reg )
     {
     case GICD_CTLR:
@@ -801,6 +807,8 @@ static int vgic_v3_distr_mmio_write(struct vcpu *v, mmio_info_t *info)
     struct vcpu *old_vcpu, *new_vcpu;
     int gicd_reg = (int)(info->gpa - v->domain->arch.vgic.dbase);
 
+    perfc_incr(vgicd_writes);
+
     switch ( gicd_reg )
     {
     case GICD_CTLR:
@@ -980,6 +988,11 @@ static int vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
 
     ASSERT (hsr.ec == HSR_EC_SYSREG);
 
+    if ( sysreg.read )
+        perfc_incr(vgic_sysreg_reads);
+    else
+        perfc_incr(vgic_sysreg_writes);
+
     switch ( hsr.bits & HSR_SYSREG_REGS_MASK )
     {
     case HSR_SYSREG_ICC_SGI1R_EL1:
index b8bd38b6a9ccfcc64d33e2c5365ea734e26ee273..8938a694bd8a9b7c44bb4df40a61a4e3095cc255 100644 (file)
@@ -24,6 +24,7 @@
 #include <xen/softirq.h>
 #include <xen/irq.h>
 #include <xen/sched.h>
+#include <xen/perfc.h>
 
 #include <asm/current.h>
 
@@ -185,6 +186,8 @@ void vgic_migrate_irq(struct vcpu *old, struct vcpu *new, unsigned int irq)
     if ( test_bit(GIC_IRQ_GUEST_MIGRATING, &p->status) )
         return;
 
+    perfc_incr(vgic_irq_migrates);
+
     spin_lock_irqsave(&old->arch.vgic.lock, flags);
 
     if ( list_empty(&p->inflight) )
@@ -301,12 +304,14 @@ int vgic_to_sgi(struct vcpu *v, register_t sgir, enum gic_sgi_mode irqmode, int
     switch ( irqmode )
     {
     case SGI_TARGET_LIST:
+        perfc_incr(vgic_sgi_list);
         break;
     case SGI_TARGET_OTHERS:
         /*
          * We expect vcpu_mask to be 0 for SGI_TARGET_OTHERS and
          * SGI_TARGET_SELF mode. So Force vcpu_mask to 0
          */
+        perfc_incr(vgic_sgi_others);
         vcpu_mask = 0;
         for ( i = 0; i < d->max_vcpus; i++ )
         {
@@ -320,6 +325,7 @@ int vgic_to_sgi(struct vcpu *v, register_t sgir, enum gic_sgi_mode irqmode, int
          * We expect vcpu_mask to be 0 for SGI_TARGET_OTHERS and
          * SGI_TARGET_SELF mode. So Force vcpu_mask to 0
          */
+        perfc_incr(vgic_sgi_self);
         vcpu_mask = 0;
         set_bit(current->vcpu_id, &vcpu_mask);
         break;
@@ -418,7 +424,10 @@ out:
     running = v->is_running;
     vcpu_unblock(v);
     if ( running && v != current )
+    {
+        perfc_incr(vgic_cross_cpu_intr_inject);
         smp_send_event_check_mask(cpumask_of(v->processor));
+    }
 }
 
 void vgic_vcpu_inject_spi(struct domain *d, unsigned int irq)
index 2e95cebac13bb351cf084219c2b42c3f0cf1fac1..848e2c6f7fd9a916aacc3ece767eb2e1fb1b44dc 100644 (file)
@@ -21,6 +21,7 @@
 #include <xen/lib.h>
 #include <xen/timer.h>
 #include <xen/sched.h>
+#include <xen/perfc.h>
 #include <asm/irq.h>
 #include <asm/time.h>
 #include <asm/gic.h>
@@ -35,7 +36,12 @@ static void phys_timer_expired(void *data)
     struct vtimer *t = data;
     t->ctl |= CNTx_CTL_PENDING;
     if ( !(t->ctl & CNTx_CTL_MASK) )
+    {
+        perfc_incr(vtimer_phys_inject);
         vgic_vcpu_inject_irq(t->v, t->irq);
+    }
+    else
+        perfc_incr(vtimer_phys_masked);
 }
 
 static void virt_timer_expired(void *data)
@@ -43,6 +49,7 @@ static void virt_timer_expired(void *data)
     struct vtimer *t = data;
     t->ctl |= CNTx_CTL_MASK;
     vgic_vcpu_inject_irq(t->v, t->irq);
+    perfc_incr(vtimer_virt_inject);
 }
 
 int domain_vtimer_init(struct domain *d)
@@ -196,6 +203,11 @@ static int vtimer_emulate_cp32(struct cpu_user_regs *regs, union hsr hsr)
     struct hsr_cp32 cp32 = hsr.cp32;
     uint32_t *r = (uint32_t *)select_user_reg(regs, cp32.reg);
 
+    if ( cp32.read )
+        perfc_incr(vtimer_cp32_reads);
+    else
+        perfc_incr(vtimer_cp32_writes);
+
     switch ( hsr.bits & HSR_CP32_REGS_MASK )
     {
     case HSR_CPREG32(CNTP_CTL):
@@ -218,6 +230,11 @@ static int vtimer_emulate_cp64(struct cpu_user_regs *regs, union hsr hsr)
     uint32_t *r2 = (uint32_t *)select_user_reg(regs, cp64.reg2);
     uint64_t x;
 
+    if ( cp64.read )
+        perfc_incr(vtimer_cp64_reads);
+    else
+        perfc_incr(vtimer_cp64_writes);
+
     switch ( hsr.bits & HSR_CP64_REGS_MASK )
     {
     case HSR_CPREG64(CNTPCT):
@@ -243,6 +260,11 @@ static int vtimer_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
     register_t *x = select_user_reg(regs, sysreg.reg);
     uint32_t r = (uint32_t)*x;
 
+    if ( sysreg.read )
+        perfc_incr(vtimer_sysreg_reads);
+    else
+        perfc_incr(vtimer_sysreg_writes);
+
     switch ( hsr.bits & HSR_SYSREG_REGS_MASK )
     {
     case HSR_SYSREG_CNTP_CTL_EL0:
index e327c155488ba25df4fce297c4ee4115bd47ae5c..d9f4249652c573946e57c6c9e67a1f26ab859232 100644 (file)
@@ -39,6 +39,7 @@
 #include <xen/ctype.h>
 #include <xen/serial.h>
 #include <asm/mmio.h>
+#include <xen/perfc.h>
 
 #include "vuart.h"
 
@@ -112,6 +113,8 @@ static int vuart_mmio_read(struct vcpu *v, mmio_info_t *info)
     register_t *r = select_user_reg(regs, dabt.reg);
     paddr_t offset = info->gpa - d->arch.vuart.info->base_addr;
 
+    perfc_incr(vuart_reads);
+
     /* By default zeroed the register */
     *r = 0;
 
@@ -130,6 +133,8 @@ static int vuart_mmio_write(struct vcpu *v, mmio_info_t *info)
     register_t *r = select_user_reg(regs, dabt.reg);
     paddr_t offset = info->gpa - d->arch.vuart.info->base_addr;
 
+    perfc_incr(vuart_writes);
+
     if ( offset == d->arch.vuart.info->data_off )
         /* ignore any status bits */
         vuart_print_char(v, *r & 0xFF);
index 96a424522f8135e2a4093c7461ebab913c0e14f9..9f078e1abcf92146172e7c1cad25bfa5a372342c 100644 (file)
@@ -57,7 +57,7 @@ void perfc_printall(unsigned char key)
                 for_each_online_cpu ( cpu )
                 {
                     if ( k > 0 && (k % 4) == 0 )
-                        printk("\n%46s", "");
+                        printk("\n%53s", "");
                     printk("  CPU%02u[%10"PRIperfc"u]", cpu, per_cpu(perfcounters, cpu)[j]);
                     ++k;
                 }
@@ -103,7 +103,7 @@ void perfc_printall(unsigned char key)
                     if ( perfc_info[i].type == TYPE_S_ARRAY ) 
                         sum = (perfc_t) sum;
                     if ( k > 0 && (k % 4) == 0 )
-                        printk("\n%46s", "");
+                        printk("\n%53s", "");
                     printk("  CPU%02u[%10Lu]", cpu, sum);
                     ++k;
                 }
index 9e165db3013c228b62742c382886a28ff28446db..1b5a842ce0af146f40a2891e2c6ad8f919c81dc4 100644 (file)
 #define PAGE_MASK           (~(PAGE_SIZE-1))
 #define PAGE_FLAG_MASK      (~0)
 
+#define NR_hypercalls 64
+
 #define STACK_ORDER 3
 #define STACK_SIZE  (PAGE_SIZE << STACK_ORDER)
 
diff --git a/xen/include/asm-arm/perfc.h b/xen/include/asm-arm/perfc.h
new file mode 100644 (file)
index 0000000..95c4b2b
--- /dev/null
@@ -0,0 +1,21 @@
+#ifndef __ASM_PERFC_H__
+#define __ASM_PERFC_H__
+
+static inline void arch_perfc_reset(void)
+{
+}
+
+static inline void arch_perfc_gather(void)
+{
+}
+
+#endif
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/include/asm-arm/perfc_defn.h b/xen/include/asm-arm/perfc_defn.h
new file mode 100644 (file)
index 0000000..46015f5
--- /dev/null
@@ -0,0 +1,82 @@
+/* This file is legitimately included multiple times. */
+/*#ifndef __XEN_PERFC_DEFN_H__*/
+/*#define __XEN_PERFC_DEFN_H__*/
+
+PERFCOUNTER(invalid_hypercalls, "invalid hypercalls")
+
+PERFCOUNTER(trap_wfi,      "trap: wfi")
+PERFCOUNTER(trap_wfe,      "trap: wfe")
+PERFCOUNTER(trap_cp15_32,  "trap: cp15 32-bit access")
+PERFCOUNTER(trap_cp15_64,  "trap: cp15 64-bit access")
+PERFCOUNTER(trap_cp14_32,  "trap: cp14 32-bit access")
+PERFCOUNTER(trap_cp14_dbg, "trap: cp14 dbg access")
+PERFCOUNTER(trap_cp,       "trap: cp access")
+PERFCOUNTER(trap_smc32,    "trap: 32-bit smc")
+PERFCOUNTER(trap_hvc32,    "trap: 32-bit hvc")
+#ifdef CONFIG_ARM_64
+PERFCOUNTER(trap_smc64,    "trap: 64-bit smc")
+PERFCOUNTER(trap_hvc64,    "trap: 64-bit hvc")
+PERFCOUNTER(trap_sysreg,   "trap: sysreg access")
+#endif
+PERFCOUNTER(trap_iabt,     "trap: guest instr abort")
+PERFCOUNTER(trap_dabt,     "trap: guest data abort")
+PERFCOUNTER(trap_uncond,   "trap: condition failed")
+
+PERFCOUNTER(vpsci_cpu_on,              "vpsci: cpu_on")
+PERFCOUNTER(vpsci_cpu_off,             "vpsci: cpu_off")
+PERFCOUNTER(vpsci_version,             "vpsci: version")
+PERFCOUNTER(vpsci_migrate_info_type,   "vpsci: migrate_info_type")
+PERFCOUNTER(vpsci_migrate_info_up_cpu, "vpsci: migrate_info_up_cpu")
+PERFCOUNTER(vpsci_system_off,          "vpsci: system_off")
+PERFCOUNTER(vpsci_system_reset,        "vpsci: system_reset")
+PERFCOUNTER(vpsci_cpu_suspend,         "vpsci: cpu_suspend")
+PERFCOUNTER(vpsci_cpu_affinity_info,   "vpsci: cpu_affinity_info")
+PERFCOUNTER(vpsci_cpu_migrate,         "vpsci: cpu_migrate")
+
+PERFCOUNTER(vgicd_reads,                "vgicd: read")
+PERFCOUNTER(vgicd_writes,               "vgicd: write")
+PERFCOUNTER(vgicr_reads,                "vgicr: read")
+PERFCOUNTER(vgicr_writes,               "vgicr: write")
+PERFCOUNTER(vgic_sysreg_reads,          "vgic: sysreg read")
+PERFCOUNTER(vgic_sysreg_writes,         "vgic: sysreg write")
+PERFCOUNTER(vgic_sgi_list  ,            "vgic: SGI send to list")
+PERFCOUNTER(vgic_sgi_others,            "vgic: SGI send to others")
+PERFCOUNTER(vgic_sgi_self,              "vgic: SGI send to self")
+PERFCOUNTER(vgic_cross_cpu_intr_inject, "vgic: cross-CPU irq inject")
+PERFCOUNTER(vgic_irq_migrates,          "vgic: irq migration")
+
+PERFCOUNTER(vuart_reads,  "vuart: read")
+PERFCOUNTER(vuart_writes, "vuart: write")
+
+PERFCOUNTER(vtimer_cp32_reads,   "vtimer: cp32 read")
+PERFCOUNTER(vtimer_cp32_writes,  "vtimer: cp32 write")
+
+PERFCOUNTER(vtimer_cp64_reads,   "vtimer: cp64 read")
+PERFCOUNTER(vtimer_cp64_writes,  "vtimer: cp64 write")
+
+PERFCOUNTER(vtimer_sysreg_reads,  "vtimer: sysreg read")
+PERFCOUNTER(vtimer_sysreg_writes, "vtimer: sysreg write")
+
+PERFCOUNTER(vtimer_phys_inject,   "vtimer: phys expired, injected")
+PERFCOUNTER(vtimer_phys_masked,   "vtimer: phys expired, masked")
+PERFCOUNTER(vtimer_virt_inject,   "vtimer: virt expired, injected")
+
+PERFCOUNTER(ppis,                 "#PPIs")
+PERFCOUNTER(spis,                 "#SPIs")
+PERFCOUNTER(guest_irqs,           "#GUEST-IRQS")
+
+PERFCOUNTER(hyp_timer_irqs,   "Hypervisor timer interrupts")
+PERFCOUNTER(phys_timer_irqs,  "Physical timer interrupts")
+PERFCOUNTER(virt_timer_irqs,  "Virtual timer interrupts")
+PERFCOUNTER(maintenance_irqs, "Maintenance interrupts")
+
+/*#endif*/ /* __XEN_PERFC_DEFN_H__ */
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */