xen/arm: Document the erratum #853709 related to Cortex A72
authorMichal Orzel <michal.orzel@arm.com>
Wed, 14 Oct 2020 10:05:41 +0000 (12:05 +0200)
committerStefano Stabellini <sstabellini@kernel.org>
Fri, 19 Mar 2021 19:31:25 +0000 (12:31 -0700)
The Cortex-A72 erratum #853709 is the same as the Cortex-A57
erratum #852523. As the latter is already workaround, we only
need to update the documentation.

Signed-off-by: Michal Orzel <michal.orzel@arm.com>
[julieng: Reworded the commit message]
Reviewed-by: Julien Grall <jgrall@amazon.com>
Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
(cherry picked from commit f776e5fb3ee699745f6442ec8c47d0fa647e0575)

docs/misc/arm/silicon-errata.txt
xen/arch/arm/domain.c

index e15d0923e9432e15477d39f2285ed1ce538819a6..1f18a9df58957cc8de3afdd63333c44b36ddd9ca 100644 (file)
@@ -50,6 +50,7 @@ stable hypervisors.
 | ARM            | Cortex-A57      | #834220         | ARM64_ERRATUM_834220    |
 | ARM            | Cortex-A57      | #1319537        | N/A                     |
 | ARM            | Cortex-A72      | #1319367        | N/A                     |
+| ARM            | Cortex-A72      | #853709         | N/A                     |
 | ARM            | Cortex-A76      | #1165522        | N/A                     |
 | ARM            | Neoverse-N1     | #1165522        | N/A
 | ARM            | MMU-500         | #842869         | N/A                     |
index ac6a419f55c9d277efe4b56cd3c9ccccb1f5b130..c94d2f48f16eb835cfdb3a66c4e0d0ae0984d10c 100644 (file)
@@ -216,7 +216,8 @@ static void ctxt_switch_to(struct vcpu *n)
     WRITE_SYSREG64(n->arch.ttbr1, TTBR1_EL1);
 
     /*
-     * Erratum #852523: DACR32_EL2 must be restored before one of the
+     * Erratum #852523 (Cortex-A57) or erratum #853709 (Cortex-A72):
+     * DACR32_EL2 must be restored before one of the
      * following sysregs: SCTLR_EL1, TCR_EL1, TTBR0_EL1, TTBR1_EL1 or
      * CONTEXTIDR_EL1.
      */
@@ -245,7 +246,8 @@ static void ctxt_switch_to(struct vcpu *n)
 
     /*
      * This write to sysreg CONTEXTIDR_EL1 ensures we don't hit erratum
-     * #852523. I.e DACR32_EL2 is not correctly synchronized.
+     * #852523 (Cortex-A57) or #853709 (Cortex-A72).
+     * I.e DACR32_EL2 is not correctly synchronized.
      */
     WRITE_SYSREG(n->arch.contextidr, CONTEXTIDR_EL1);
     WRITE_SYSREG(n->arch.tpidr_el0, TPIDR_EL0);