x86: Use spec_ctrl_{enter,exit}_idle() in the S3/S5 path

The main purpose of this patch is to avoid opencoding the recovery logic at
the end, but also has the positive side effect of relaxing the SPEC_CTRL
mitigations when working to shut the final CPU down.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Release-acked-by: Juergen Gross <jgross@suse.com>

diff --git a/xen/arch/x86/acpi/power.c b/xen/arch/x86/acpi/power.c
index 0763846548992b2a6d69285b5214cdc265a6242f..bb0d09552cc99e0d32139003eb2aa6d892741ab6 100644 (file)
--- a/xen/arch/x86/acpi/power.c
+++ b/xen/arch/x86/acpi/power.c
@@ -213,7 +213,8 @@ static int enter_state(u32 state)
         error = 0;
 
     ci = get_cpu_info();
-    ci->use_shadow_spec_ctrl = 0;
+    spec_ctrl_enter_idle(ci);
+    /* Avoid NMI/#MC using MSR_SPEC_CTRL until we've reloaded microcode. */
     ci->bti_ist_info = 0;
 
     ACPI_FLUSH_CPU_CACHE();
@@ -257,10 +258,9 @@ static int enter_state(u32 state)
     if ( !recheck_cpu_features(0) )
         panic("Missing previously available feature(s).");
 
+    /* Re-enabled default NMI/#MC use of MSR_SPEC_CTRL. */
     ci->bti_ist_info = default_bti_ist_info;
-    asm volatile (ALTERNATIVE("", "wrmsr", X86_FEATURE_XEN_IBRS_SET)
-                  :: "a" (SPEC_CTRL_IBRS), "c" (MSR_SPEC_CTRL), "d" (0)
-                  : "memory");
+    spec_ctrl_exit_idle(ci);
 
  done:
     spin_debug_enable();