AMD/VPMU: 0xc0010000 - 0xc001007 MSRs are in PMU range
authorBoris Ostrovsky <boris.ostrovsky@oracle.com>
Thu, 11 Aug 2016 11:34:16 +0000 (13:34 +0200)
committerJan Beulich <jbeulich@suse.com>
Thu, 11 Aug 2016 11:34:16 +0000 (13:34 +0200)
We need to check for older PMU MSR range when emulating MSR
accesses for PV guests.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
xen/arch/x86/traps.c

index e822719e95c5107bc072a8a67476f272307d906d..3df0295478e4104174fdbdb938858c9ec9e7997f 100644 (file)
@@ -2900,6 +2900,7 @@ static int emulate_privileged_op(struct cpu_user_regs *regs)
             {
                 vpmu_msr = 1;
         case MSR_AMD_FAM15H_EVNTSEL0...MSR_AMD_FAM15H_PERFCTR5:
+        case MSR_K7_EVNTSEL0...MSR_K7_PERFCTR3:
                 if ( vpmu_msr || (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) )
                 {
                     if ( (vpmu_mode & XENPMU_MODE_ALL) &&
@@ -3027,6 +3028,7 @@ static int emulate_privileged_op(struct cpu_user_regs *regs)
             {
                 vpmu_msr = 1;
         case MSR_AMD_FAM15H_EVNTSEL0...MSR_AMD_FAM15H_PERFCTR5:
+        case MSR_K7_EVNTSEL0...MSR_K7_PERFCTR3:
                 if ( vpmu_msr || (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) )
                 {