[IA64] A fix for itc.d emulation

If natpage, insert into TLB directly.

Signed-off-by: Zhang xiantao <xiantao.zhang@intel.com>

diff --git a/xen/arch/ia64/vmx/vmmu.c b/xen/arch/ia64/vmx/vmmu.c
index 84db1441a1dc21bedebe99e041599d3a1e39d371..3a91956b10187b8b551d7017d2c3399fbaea14c9 100644 (file)
--- a/xen/arch/ia64/vmx/vmmu.c
+++ b/xen/arch/ia64/vmx/vmmu.c
@@ -376,12 +376,14 @@ IA64FAULT vmx_vcpu_itc_d(VCPU *vcpu, UINT64 pte, UINT64 itir, UINT64 ifa)
     if (VMX_DOMAIN(vcpu)) {
         if (__gpfn_is_io(vcpu->domain, gpfn))
             pte |= VTLB_PTE_IO;
-        else
+        else{
+           if ((pte & _PAGE_MA_MASK)!=_PAGE_MA_NAT)
             /* Ensure WB attribute if pte is related to a normal mem page,
              * which is required by vga acceleration since qemu maps shared
              * vram buffer with WB.
              */
-            pte &= ~_PAGE_MA_MASK;
+                pte &= ~_PAGE_MA_MASK;
+       }
     }
     thash_purge_and_insert(vcpu, pte, itir, ifa);
     return IA64_NO_FAULT;