vcpu->arch.arch_vmx.vlapic.vcpu = vcpu;
hvm_vioapic_add_lapic(&vcpu->arch.arch_vmx.vlapic, vcpu);
#endif
- DPRINTK("VLSAPIC inservice base=%lp\n", &VLSAPIC_INSVC(vcpu,0) );
+ DPRINTK("VLSAPIC inservice base=%p\n", &VLSAPIC_INSVC(vcpu,0) );
}
/*
void startup_cpu_idle_loop(void)
{
/* Just some sanity to ensure that the scheduler is set up okay. */
- ASSERT(current->domain == IDLE_DOMAIN_ID);
+ ASSERT(current->domain->domain_id == IDLE_DOMAIN_ID);
raise_softirq(SCHEDULE_SOFTIRQ);
continue_cpu_idle_loop();
{
}
+void audit_domains_key(unsigned char key)
+{
+}
+
void panic_domain(struct pt_regs *regs, const char *fmt, ...)
{
va_list args;
--- /dev/null
+#ifndef __IA64__HARDIRQ__H__
+#define __IA64__HARDIRQ__H__
+
+#define __ARCH_IRQ_STAT 1
+#define HARDIRQ_BITS 14
+#include <linux/hardirq.h>
+
+#define local_softirq_pending() (local_cpu_data->softirq_pending)
+
+#endif
dma.h -> linux/include/asm-ia64/dma.h
fpswa.h -> linux/include/asm-ia64/fpswa.h
fpu.h -> linux/include/asm-ia64/fpu.h
-hardirq.h -> linux/include/asm-ia64/hardirq.h
hdreg.h -> linux/include/asm-ia64/hdreg.h
hw_irq.h -> linux/include/asm-ia64/hw_irq.h
intrinsics.h -> linux/include/asm-ia64/intrinsics.h
+++ /dev/null
-#ifndef _ASM_IA64_HARDIRQ_H
-#define _ASM_IA64_HARDIRQ_H
-
-/*
- * Modified 1998-2002, 2004 Hewlett-Packard Co
- * David Mosberger-Tang <davidm@hpl.hp.com>
- */
-
-#include <linux/config.h>
-
-#include <linux/threads.h>
-#include <linux/irq.h>
-
-#include <asm/processor.h>
-
-/*
- * No irq_cpustat_t for IA-64. The data is held in the per-CPU data structure.
- */
-
-#define __ARCH_IRQ_STAT 1
-
-#define local_softirq_pending() (local_cpu_data->softirq_pending)
-
-#define HARDIRQ_BITS 14
-
-/*
- * The hardirq mask has to be large enough to have space for potentially all IRQ sources
- * in the system nesting on a single CPU:
- */
-#if (1 << HARDIRQ_BITS) < NR_IRQS
-# error HARDIRQ_BITS is too low!
-#endif
-
-extern void __iomem *ipi_base_addr;
-
-void ack_bad_irq(unsigned int irq);
-
-#endif /* _ASM_IA64_HARDIRQ_H */
#define vmx_schedule_tail(next) \
(next)->thread.arch_vmx.arch_vmx_schedule_tail((next))
-#define VMX_DOMAIN(d) d->arch.arch_vmx.flags
+#define VMX_DOMAIN(v) v->arch.arch_vmx.flags
#define ARCH_VMX_IO_WAIT 3 /* Waiting for I/O completion */
#define ARCH_VMX_INTR_ASSIST 4 /* Need DM's assist to issue intr */
#define VMX_DEBUG 1
#if VMX_DEBUG
-#define DBG_LEVEL_0 (1 << 0)
-#define DBG_LEVEL_1 (1 << 1)
-#define DBG_LEVEL_2 (1 << 2)
-#define DBG_LEVEL_3 (1 << 3)
-#define DBG_LEVEL_IO (1 << 4)
-#define DBG_LEVEL_VMMU (1 << 5)
-#define DBG_LEVEL_IOAPIC (1 << 6)
extern unsigned int opt_vmx_debug_level;
-#define VMX_DBG_LOG(level, _f, _a...) \
- if ((level) & opt_vmx_debug_level) \
- printk("[VMX]" _f "\n", ## _a )
-#else
-#define VMX_DBG_LOG(level, _f, _a...)
#endif
-
-#define __vmx_bug(regs) \
- do { \
- printk("__vmx_bug at %s:%d\n", __FILE__, __LINE__); \
- show_registers(regs); \
- domain_crash(current->domain); \
- } while (0)
-
#endif //__ASSEMBLY__
// VPD field offset