[dgit import tarball llvm-toolchain-6.0 1:6.0.1-14 llvm-toolchain-6.0_6.0.1-14.debian.tar.xz]
--- /dev/null
+llvm-toolchain-snapshot (1:3.6~svn214630-1~exp1) experimental; urgency=medium
+
+ * clang is now co-instalable. Available on version 3.4, 3.5 and 3.6
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sat, 02 Aug 2014 12:57:41 +0200
--- /dev/null
+Organization of the repository
+==============================
+
+The debian package for each LLVM point release is maintained as a git branch.
+For example, the 6.0 release lives at in the "6.0" branch.
+
+The current snapshot release is maintained in the "snapshot" branch.
+
+The easiest way to get all branches is probably to have one
+clone per version:
+
+for f in 4.0 5.0 6.0 snapshot; do
+ git clone git@salsa.debian.org:pkg-llvm-team/llvm-toolchain.git -b $f $f
+done
+
+Steps for manually building a snapshot release
+==============================================
+
+1) Retrieve the latest snapshot and create original tarballs.
+
+ Run the orig-tar.sh script,
+
+ $ sh snapshot/debian/orig-tar.sh
+
+ which will retrieve the latest version for each LLVM subproject (llvm,
+ clang, lldb, etc.) from the main development (upstream SVN). and repack it
+ as a set of tarballs.
+
+2) Unpack the original tarballs and apply quilt debian patches.
+
+ From the branches/ directory run the unpack.sh script,
+
+ $ sh unpack.sh
+
+ which will unpack the source tree inside a new directory such as
+ branches/llvm-toolchain-snapshot_3.9~svn268942. Depending on the current
+ snapshot version number and svn release, the directory name will be
+ different.
+
+ Quilt patches will then be applied.
+
+3) Build the binary packages using,
+
+ $ fakeroot debian/rules binary
+
+When debugging, successive builds can be recompiled faster by using tools such
+as ccache (PATH=/usr/lib/ccache:$PATH fakeroot debian/rules binary).
+
+Retrieving a specific branch or release candidate with orig-tar.sh
+==================================================================
+
+When using orig-tar.sh, if you need to retrieve a specific branch, you can pass
+the branch name as the first argument. For example, to get the 6.0 release
+branch at
+ http://llvm.org/svn/llvm-project/{llvm,...}/branches/release_60
+you should use,
+
+ $ sh 6.0/debian/orig-tar.sh release_60
+
+To retrieve a specific release candidate, you can pass the branch name as the
+first argument, and the tag rc number as the second argument. For example, to
+get the 6.0.1 release candidate rc3 at
+ http://llvm.org/svn/llvm-project/{llvm,...}/tags/RELEASE_601/rc3
+you should use,
+
+ $ sh 6.0/debian/orig-tar.sh RELEASE_601 rc3 6.0.1
+
+For a stable release, the syntax is:
+
+ $ sh 6.0/debian/orig-tar.sh RELEASE_600 final 6.0
+
+Additional maintainer scripts
+=============================
+
+The script qualify-clang.sh that is found at the git debian/ directory
+should be used to quickly test a newly built package. It runs a short
+set of sanity-check tests and regression tests.
+
+The script releases/snapshot/debian/prepare-new-release.sh is used when
+preparing a new point release. It automatically replaces version numbers
+in various files of the package.
+
+
+Change in major upstream version
+================================
+TODO update with the git commands
+
+$ svn copy snapshot VERSION
+$ svn commit -m "VERSION branched" VERSION
+$ cd VERSION
+$ sed -i -e '0,/llvm-toolchain-snapshot/s/llvm-toolchain-snapshot/llvm-toolchain-VERSION/' debian/changelog debian/control
+$ svn commit -m "snapshot => VERSION"
+$ cd ../snapshot
+$ emacs debian/prepare-new-release.sh
+# Change the version
+$ bash debian/prepare-new-release.sh
+$ svn commit -m "new snapshot release"
+
+Now, try build build it.
--- /dev/null
+
+Repack of the snapshot release are done with orig-tar.sh which will checkout the sources.
+
+ -- Sylvestre Ledru <sylvestre@debian.org>, Tue, 26 Feb 2013 14:57:56 +0100
+
--- /dev/null
+* add the support of libclang in llvm default (for now, it is
+called libclang1-3.3.so)
+
+* move the header at the right place in libclang-dev
+
+* bootstrap of clang with itself
--- /dev/null
+llvm-toolchain-6.0 (1:6.0.1-14) unstable; urgency=medium
+
+ * debian/patches/947f9692440836dcb8d88b74b69dd379d85974ce.patch:
+ - usptream fix for new glibc 2.31
+
+ -- Gianfranco Costamagna <locutusofborg@debian.org> Mon, 23 Mar 2020 11:59:23 +0100
+
+llvm-toolchain-6.0 (1:6.0.1-13) unstable; urgency=medium
+
+ * Drop -doc packages, in order to reduce rdeps of python-sphinx
+
+ -- Sandro Tosi <morph@debian.org> Sun, 22 Mar 2020 19:32:55 -0400
+
+llvm-toolchain-6.0 (1:6.0.1-12) unstable; urgency=medium
+
+ [ Andreas Beckmann ]
+ * For now, lld doesn't generate shared libs. Removing the files
+ (Closes: #857653, LP: #1829677)
+
+ [ Gianfranco Costamagna ]
+ * Import the Ubuntu delta
+ * Upload to unstable
+
+ [ Matthias Klose ]
+ * (Build-)depend on python2 instead of python.
+ * Fix the build to use python2 instead of python.
+ * Call dh_python2 to rewrite shebangs.
+
+ -- Gianfranco Costamagna <locutusofborg@debian.org> Mon, 20 Jan 2020 10:26:04 +0100
+
+llvm-toolchain-6.0 (1:6.0.1-11) unstable; urgency=medium
+
+ [ Sylvestre Ledru ]
+ * Remove 'Multi-Arch: same' in libclang (Closes: #874248)
+ * Cherry-pick various llvm fixes for Julia (Closes: #919628)
+
+ [ Mo Zhou ]
+ * Rebase and enable D51639-optim-issue.diff .
+ * Remove install-lldb-sb-headers.patch, merged upstream.
+ * Remove empty file: bug-30342.diff
+ * Remove deprecated patch: fix-lldb-server-build. (See 602ceb9ec)
+
+ -- Mo Zhou <cdluminate@gmail.com> Sat, 09 Mar 2019 06:10:15 +0000
+
+llvm-toolchain-6.0 (1:6.0.1-10) unstable; urgency=medium
+
+ * Fix a baseline violation on armhf (Closes: #914268)
+ Thanks to Adrian Bunk
+ doing that for the Julia package.
+
+ [ John Paul Adrian Glaubitz ]
+ * Add patch to fix missing include and library paths on x32
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 23 Jan 2019 23:25:50 +0100
+
+llvm-toolchain-6.0 (1:6.0.1-9.2) unstable; urgency=medium
+
+ * Non-maintainer upload.
+ * debian/patches/D53557-hurd-self-exe-realpath.diff: Fix paths returned by
+ llvm-config (Closes: Bug#911817).
+
+ -- Samuel Thibault <sthibault@debian.org> Wed, 24 Oct 2018 22:44:54 +0000
+
+llvm-toolchain-6.0 (1:6.0.1-9.1) unstable; urgency=medium
+
+ * Non-maintainer upload.
+ * Apply hurd fixes (Closes: #908847).
+ - hurd-lib_Support_Unix_Path.inc.diff
+ - hurd-pathmax.diff
+ - hurd-tools_llvm-shlib_CMakeLists.txt.diff
+
+ -- Samuel Thibault <sthibault@debian.org> Tue, 16 Oct 2018 20:18:39 +0000
+
+llvm-toolchain-6.0 (1:6.0.1-9) unstable; urgency=medium
+
+ [ John Paul Adrian Glaubitz ]
+ * Add patch to fix missing MultiArch include dir
+ on powerpcspe (Closes: #908791)
+
+ [ Gianfranco Costamagna ]
+ * Force polly cmake removal on arch:all because of --fail-missing
+
+ -- John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> Fri, 14 Sep 2018 09:24:02 +0200
+
+llvm-toolchain-6.0 (1:6.0.1-8) unstable; urgency=medium
+
+ [ John Paul Adrian Glaubitz ]
+ * Fix inverted logic in ifeq statement for POLLY_ENABLE (Closes: #908646)
+
+ [ Gianfranco Costamagna ]
+ * Fixup the polly installation failure where polly is not built
+ * Add s390x to polly architectures
+ * Fix typo in rules file
+
+ [ Sylvestre Ledru ]
+ * Disable sse2 on pentium4 arch (Closes: #632472)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 13 Sep 2018 10:04:42 +0200
+
+llvm-toolchain-6.0 (1:6.0.1-7) unstable; urgency=medium
+
+ * Cherry pick a patch from upstream to fix a crash
+ when doing PGO + LTO
+ See upstream bug 38663
+ * Fix an alignment issue
+ See upstream bug 38707 (Closes: #907622)
+ * Cherry pick an upstream issue with x86 mentionned here:
+ https://lists.llvm.org/pipermail/llvm-dev/2018-August/125111.html
+ "A very subtle miscompile due to a bug in EFLAGS copy lowering
+ for X86 was fixed. Chandler suggests maintainers of out-of-tree
+ branches using the X86 backend may want to cherry-pick this fix."
+ https://reviews.llvm.org/rL338481
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 06 Sep 2018 20:51:24 +0200
+
+llvm-toolchain-6.0 (1:6.0.1-6) unstable; urgency=medium
+
+ * Remove libtool flex, bison, dejagnu, tcl, expect,
+ and perl from the build deps (testing)
+
+ [ John Paul Adrian Glaubitz ]
+ * Don't build with ld.gold on powerpcspe
+ * Disable polly on powerpcspe
+ * Cherry-pick upstream patch to make rustc build on ppc
+
+ [ Gianfranco Costamagna ]
+ * Team upload
+ * Upload to unstable
+ * Enable lld on ppc64el
+ * Add liblldb-6.0-dev to python-lldb runtime dependencies, needed to import it
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sun, 26 Aug 2018 14:00:14 +0200
+
+llvm-toolchain-6.0 (1:6.0.1-5exp1) experimental; urgency=medium
+
+ * Enable lld on arm64, mips64el
+ * Enable lldb on mips64el
+
+ -- Gianfranco Costamagna <locutusofborg@debian.org> Fri, 17 Aug 2018 17:36:03 +0200
+
+llvm-toolchain-6.0 (1:6.0.1-5) unstable; urgency=medium
+
+ * Cherry-pick a patch from 7 to fix an issue with Julia
+ on powerpc - PowerPC-Make-AddrSpaceCast-noop.diff
+ (Closes: #906314)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Fri, 17 Aug 2018 08:49:22 +0200
+
+llvm-toolchain-6.0 (1:6.0.1-4) unstable; urgency=medium
+
+ * Disable force-gcc-header-obj.diff as it is introducing
+ some regressions in the search headers
+ (Closes: #903709)
+ * Standards-Version: 4.2.0
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 15 Aug 2018 15:25:42 +0200
+
+llvm-toolchain-6.0 (1:6.0.1-3) unstable; urgency=medium
+
+ * Backport to fix a miscompilation issue with rust.
+ See https://github.com/rust-lang/rust/issues/52694
+ and https://github.com/rust-lang/llvm/pull/106
+
+ [ Dimitri John Ledkov ]
+ * Enable lldb on ppc64el LP: #1777136
+
+ [ Lumin ]
+ * backport two upstream patches to fix julia miscompiling (Closes: #905397)
+ llvm-D49832-SCEVPred.patch, llvm-rL323946-LSRTy.patch
+
+ [ Gianfranco Costamagna ]
+ * Team Upload to unstable
+
+ -- Gianfranco Costamagna <locutusofborg@debian.org> Thu, 09 Aug 2018 10:06:11 +0200
+
+llvm-toolchain-6.0 (1:6.0.1-2) unstable; urgency=medium
+
+ * Bump std-version to 4.1.4, no changes required.
+
+ -- Gianfranco Costamagna <locutusofborg@debian.org> Wed, 27 Jun 2018 16:24:20 +0200
+
+llvm-toolchain-6.0 (1:6.0.1-1) unstable; urgency=medium
+
+ * New stable release
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 27 Jun 2018 08:52:37 +0200
+
+llvm-toolchain-6.0 (1:6.0.1~+rc3-1~exp1) experimental; urgency=medium
+
+ * New testing release
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Fri, 15 Jun 2018 18:28:35 +0200
+
+llvm-toolchain-6.0 (1:6.0.1~+rc2-1~exp1) experimental; urgency=medium
+
+ * New testing release
+ * Enable WebAssembly & AVR as experimental archs (Closes: #899202)
+ * d/p/force-gcc-header-obj.diff Fix the detection of the objc path
+
+ [ Gianfranco Costamagna ]
+ * Add ubuntu cosmic to Ubuntu supported releases
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 09 May 2018 14:23:49 +0200
+
+llvm-toolchain-6.0 (1:6.0.1~+rc1-1~exp2) experimental; urgency=medium
+
+ * Add python-yaml as dep for clang-tidy (Closes: #890514)
+
+ [ Peter Wu ]
+ * Make CMake find_package(Clang) work. Fixes upstream bug
+ https://bugs.llvm.org/show_bug.cgi?id=37128
+ - Move Clang*.cmake back to /usr/lib/llvm-X.Y/lib/cmake/clang and install a
+ symlink in /usr/lib/cmake/clang-X.Y.
+ - Ensure that the LLVM installation prefix is correctly discovered despire
+ symlinks (replaces fix-cmake-config-prefix.diff).
+ - Create /usr/lib/llvm-X.Y/bin/clang-X.Y symlink as required by
+ ClangTargets-relwithdebinfo.cmake.
+ - Remove useless LLVM_CMAKE_DIR sed command that did not match anything.
+ - Ignore missing binaries in ClangTargets-relwithdebinfo.cmake.
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Mon, 07 May 2018 23:27:26 +0200
+
+llvm-toolchain-6.0 (1:6.0.1~+rc1-1~exp1) experimental; urgency=medium
+
+ * New snapshot release
+ * Fix a typo in the debci
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 26 Apr 2018 08:02:09 +0200
+
+llvm-toolchain-6.0 (1:6.0-3) unstable; urgency=medium
+
+ * Remove sysconf_interceptor_bypass_test.cc because it makes
+ Debian unstable and Ubuntu bionic freeze
+ * Remove the info text from the manpages (Closes: #894734)
+
+ [ Reshabh Sharma ]
+ * Enable autopkgtest for amd64 & i386 on the llvm test suite
+ (Closes: #774294)
+
+ [ Nicholas D Steeves ]
+ * Fix the lintian error 'privacy-breach-uses-embedded-file'
+ (Closes: #829361)
+
+ [ Athos Ribeiro ]
+ * Create symlink to run-clang-tidy-X.Y.py to remove its .py extension
+ (Closes: #892089)
+
+ [ David Tenty ]
+ * Migrate to automatic debug packages (Closes: #893267)
+
+ [ Nishanth Aravamudan ]
+ * debian/patches/install-lldb-sb-headers.patch: Install lldb's
+ SB headers (pr36630). Thanks to Pavel Labath <labath@google.com>.
+ (LP: #1761009) (Closes: #895051)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Tue, 24 Apr 2018 23:24:44 +0200
+
+llvm-toolchain-6.0 (1:6.0.1-1~exp1) experimental; urgency=medium
+
+ * preparation of the new release
+ * Remove sysconf_interceptor_bypass_test.cc because it makes
+ Debian unstable and Ubuntu bionic freeze
+
+ [ David Tenty ]
+ * Migrate to automatic debug packages (Closes: #893267)
+
+ [ Nishanth Aravamudan ]
+ * debian/patches/install-lldb-sb-headers.patch: Install lldb's
+ SB headers (pr36630). Thanks to Pavel Labath <labath@google.com>.
+ (LP: #1761009) (Closes: #895051)
+
+ -- David Tenty <dtenty@ryerson.ca> Sat, 31 Mar 2018 21:11:28 +0000
+
+llvm-toolchain-6.0 (1:6.0-2) unstable; urgency=medium
+
+ * clang-tidy-6.0: depends on libclang-common-6.0-dev
+ (Closes: #891999)
+ * clang-tidy-6.0 also depends on clang-tools-6.0 for, at least
+ clang-apply-replacements
+ * Remove a bunch of old unused patches
+ * Fix debian-watch-uses-insecure-uri as upstream has now https
+ * Standards-Version updated to 4.1.3
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Mon, 05 Mar 2018 09:58:10 +0100
+
+llvm-toolchain-6.0 (1:6.0-1) unstable; urgency=medium
+
+ * New upstream release
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Fri, 02 Mar 2018 13:28:19 +0100
+
+llvm-toolchain-6.0 (1:6.0~+rc3-1) unstable; urgency=medium
+
+ [ Sylvestre Ledru ]
+ * New snapshot release
+ * Move the VCS to git.
+ Many thanks to James Clarke for doing the conversion
+ * Create the directory before having the manpages generated
+
+ [ John Paul Adrian Glaubitz ]
+ * Add proposed upstream patch by James Clarke to add the
+ missing __tls_get_addr symbol to the symbol table for
+ TLS calls on SPARC (Closes: #890401)
+
+ [ James Clarke ]
+ * Disable LLDB on powerpcspe
+
+ -- James Clarke <jrtc27@debian.org> Mon, 26 Feb 2018 16:07:18 +0000
+
+llvm-toolchain-6.0 (1:6.0~+rc2-1) unstable; urgency=medium
+
+ * New snapshot release
+ - should fix the FTBFS on arm64 (Closes: #888877)
+ * Also ignore comdat.ll test failure in silent-gold-test.diff. see
+ https://bugs.llvm.org/show_bug.cgi?id=36166
+ * Remove the python-lldb-6.0 dep to liblldb-6.0-dev to remove the
+ circular dependency (Closes: #876015)
+ * Mark liblldb-6.0-dbg conflict with liblldb-7-dbg
+ (Closes: #888057)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 07 Feb 2018 23:13:54 +0100
+
+llvm-toolchain-6.0 (1:6.0~+rc1-1) unstable; urgency=medium
+
+ * New snapshot release
+ * Update of the clang-tools-X.Y description
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 18 Jan 2018 09:26:04 +0100
+
+llvm-toolchain-6.0 (1:6.0~svn321745-1~exp1) experimental; urgency=medium
+
+ * Upload the new package (upstream just branched)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 03 Jan 2018 20:03:12 +0100
+
+llvm-toolchain-snapshot (1:6.0~svn321385-1) unstable; urgency=medium
+
+ * Snapshot upload before rc1 (January)
+ * Create clang-tools-6.0 and move the various clang tools into it
+ clang-tools-6.0 depends on clang-6.0. This might affect some packages.
+ (Closes: #836397)
+ * Bring back the libedit support in lldb
+ Fix upstream bug https://bugs.llvm.org/show_bug.cgi?id=35291
+ * Also ship ld64.lld and wasm-ld in the lld-X.Y package
+ * Update d/rules to reflect the move of libfuzzer into compiler-rt
+ * Update of the copyright file (Closes: #878502)
+ Thanks to Nicholas D Steeves for the work
+ * Try to fix the mipsel FTBFS (Closes: #877567)
+ I am trying the first option from the bug:
+ - gsplit-dward on 32 bits archs
+ - -g everywhere
+ Many thanks to Adrian Bunk for that
+ * Use ?= for some variables declarations
+ * Remove the hardcoded declarations of llvm version in debian/rules
+ * add /usr/lib/cuda to the CUDA toolkit search paths
+ Thanks to Andreas Beckmann for the patch (Closes: #882505) (LP: #1706326)
+ * Fix the fix-scan-view-path.diff path
+ * Move libomp-dev from Suggests to Recommends (Closes: #882781)
+ * Add a symlink to fix lldb-X.Y (Closes: #881993)
+ * Remove update-cuda-search-path.patch (applied upstream)
+ * Also install usr/bin/lldb-test-6.0
+ * liblld-6.0-dev depends on liblld-6.0 (Closes: #856545)
+ * Add new symbols for libclang1:
+ - clang_CXIndex_setInvocationEmissionPathOption
+ - clang_CXXRecord_isAbstract
+ - clang_Cursor_getObjCManglings
+ - clang_getCursorTLSKind
+ * add test-keep-alive.diff to improve the keep alive for some
+ archs like mips*
+ * Standards-Version: 4.1.1
+ * remove liblld-6.0-dbg for now
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Fri, 22 Dec 2017 21:41:17 +0100
+
+llvm-toolchain-snapshot (1:6.0~svn315736-1) unstable; urgency=medium
+
+ * New snapshot
+ * Ship liblldMinGW lld lib
+ * Ship clang-refactor & clang-func-mapping in clang-X.Y
+ * Remove the -Wl option to call gold instead of the normal linker
+ (Closes: #876787)
+ * Force the deactivation of ocaml until the transition is done
+ * Standards Version 4.1.0
+
+ [ Gianfranco Costamagna ]
+ * Enable ocaml on release architectures.
+ * Add NDEBUG flag, lost in the -g -> -g1 switch
+
+ [ Matthias Klose ]
+ * Link with --no-keep-files-mapped --no-map-whole-files when using gold.
+ * build using gold on arm64 and s390x. For backports, arm64 might still
+ need the BFD linker, and building with only one or two processes in
+ parallel.
+ * On amd64, s390x, arm64 and ppc64el, build with -g1 instead of -g.
+ * Set CMAKE_CXX_FLAGS_RELWITHDEBINFO and pass opt_flags.
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Mon, 11 Sep 2017 22:27:20 +0200
+
+llvm-toolchain-snapshot (1:6.0~svn311834-2) unstable; urgency=medium
+
+ * Fix the FTBFS because of -gsplit-dwarf:
+ - Only enable it on archs which needs it
+ - Only enable it when gcc supports it correctly
+ * Fail the build if the arch + gcc has a broken gsplit-dwarf support
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 31 Aug 2017 19:14:53 +0200
+
+llvm-toolchain-snapshot (1:6.0~svn311834-1) unstable; urgency=medium
+
+ * Link LLDB with -latomic on powerpcspe (Closes: #872267)
+ * Fix the C++ include path order (Closes: #859083)
+ * Disable -gsplit-dwarf when using gcc 7 for causing a linking issue
+ See https://bugs.llvm.org/show_bug.cgi?id=34140
+ (Closes: #853525)
+ * clang was producing unusable binaries on armv5tel (Closes: #873307)
+ Thanks to Adrian Bunk for the patch
+ * With Ubuntu Trusty (for apt.llvm.org), the build fails
+ on internal compiler error: in output_index_string, at dwarf2out.c:218
+ force the usage of gcc 4.9
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sat, 26 Aug 2017 22:35:00 +0200
+
+llvm-toolchain-snapshot (1:6.0~svn310776-1) unstable; urgency=medium
+
+ * We moved from 5.0 to 6.0
+ * Ship the opt-viewer new program as part of llvm-6.0 tools
+ * ld.lld manpage wasn't installed
+ * Disable the clang-fix-cmpxchg8-detection-on-i386.patch patch
+ because breaks the build with
+ 'error: 'isCmpXChg8Supported' was not declared in this scope'
+ * Remove usr/bin/liblldb-intel-mpxtable.so-6.0 as it seems to be removed
+ from usptream
+ * Force the usage of gcc 6 until the link issues with gcc 7 are fixed
+ https://bugs.llvm.org/show_bug.cgi?id=34140
+
+ [ Katsuhiko Nishimra ]
+ * Ensure /usr/bin/g++-$(GCC_VERSION) exists (Closes: #871591)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 27 Jul 2017 23:16:06 +0200
+
+llvm-toolchain-snapshot (1:5.0~svn305653-1) unstable; urgency=medium
+
+ [ Gianfranco Costamagna ]
+ * Re-add clang-doc documentation
+
+ [ Sylvestre Ledru ]
+ * New snapshot release
+ * Fix a hurd PATH_MAX issue
+ * Transform the lldb swig check from a error to a warning
+ * Add libomp-dev to the suggests of clang
+ * Add Provides on python-lldb-x.y & python-clang-x.y & libllvm-x.y-ocaml-dev
+ to avoid the recurring problem about conflicts
+ (Closes: #835546, #863739, #863742)
+ * Standards-Version => 4.0.0
+ * Generate the llvm-tblgen, clang-change-namespace, clang-offload-bundler
+ lld, clang++, clang-check, clang-cpp & clang-import-test manpages
+ * Remove the --no-discard-stderr option from help2man calls
+ * use -DPOLLY_BUNDLED_JSONCPP=OFF & add pkg-config as a dep (to help find
+ the files)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Fri, 09 Jun 2017 12:04:56 +0200
+
+llvm-toolchain-snapshot (1:5.0~svn302368-1~exp1) experimental; urgency=medium
+
+ * Only enable libfuzzer for Linux kernel.
+ Thanks to Pino Toscano for the patch
+ * Add option -DPOLLY_BUNDLED_JSONCPP=ON
+ to use the system lib instead of the patch d/p/use-deb-json.diff
+ * New symbols added in libclang
+ - clang_EvalResult_getAsLongLong
+ - clang_EvalResult_getAsUnsigned
+ - clang_EvalResult_isUnsignedInt
+ - clang_TargetInfo_dispose
+ - clang_TargetInfo_getPointerWidth
+ - clang_TargetInfo_getTriple
+ - clang_Type_isTransparentTagTypedef
+ - clang_getAllSkippedRanges
+ - clang_getTranslationUnitTargetInfo
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sun, 07 May 2017 12:13:43 +0200
+
+llvm-toolchain-snapshot (1:5.0~svn298899-1) unstable; urgency=medium
+
+ * Limit the archs where the ocaml binding is built
+ Should fix the FTBFS
+ Currently amd64 arm64 armel armhf i386
+ * d/p/add_symbols_versioning.patch removed (applied upstream)
+ * Really fix "use versioned symbols" for llvm
+ Thanks to Julien Cristau for the patch (Closes: #849098)
+ * Explicit the dep of clang-tidy on same version of llvm to avoid
+ undefined symbols
+ * Add override_dh_makeshlibs for the libllvm or liblldb versions
+ Thanks to Julien Cristau for the patch
+ * change the min version of the libclang1 symbols to 1:4.0-3~
+ * Fix the symlink on scan-build-py
+ * add libncurses in the list of build deps (Closes: #861170)
+
+ [ Rebecca N. Palmer ]
+ * Use versioned symbols (Closes: #848368)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sun, 09 Apr 2017 10:11:56 +0200
+
+llvm-toolchain-snapshot (1:5.0~svn294583-1~exp1) experimental; urgency=medium
+
+ * New snapshot release
+ * New library liblldb-intel-mpxtable.so
+ * Fix the incorrect symlink to scan-build-py (Closes: #856869)
+ * Explicit the dep of clang-format on same version of llvm to avoid
+ undefined symbols
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Mon, 16 Jan 2017 09:03:48 +0100
+
+llvm-toolchain-snapshot (1:5.0~svn292017-1~exp1) experimental; urgency=medium
+
+ * New snapshot release
+ snapshot is now 5.0
+ * d/p/silent-amdgpu-test-failing.diff silent amdgpu tests failing
+ (see upstream bug 31610)
+ * d/p/lldb-server-link-issue.patch removed, merged upstream
+ * Also install python-lldb-5.0 when installing lldb-5.0 (Closes: #851171)
+ * Bring back the content of llvm-5.0-doc (Closes: #844616)
+ * Bring back the content of llvm-4.0-doc (Closes: #844616)
+ * d/p/pthread-link.diff Hardcode like to pthread which was missing for
+ libclang
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sat, 14 Jan 2017 16:36:51 +0100
+
+llvm-toolchain-snapshot (1:4.0~svn291344-1) unstable; urgency=medium
+
+ * New snapshot release
+ * Disable libedit usage in lldb because of garbage (Closes: #846616, #850111)
+ * Build lld
+ - d/p/lld-arg-cmake-issue.diff fixes upstream bug #27685
+ * ship clang-tblgen
+ * Run clang extra test suite
+ * Fix the detection of lldb-server
+ * Fix the run of the check-lldb target
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sat, 07 Jan 2017 12:24:32 +0100
+
+llvm-toolchain-snapshot (1:4.0~svn290810-1) unstable; urgency=medium
+
+ * New snapshot release
+ * d/p/kfreebsd-support.diff removed (applied upstream)
+ * debian/orig-tar.sh: less verbose
+ * d/p/lldb-missing-install.diff: For the install
+ of lldb-server and lldb-argdumper as they are not always installed
+ * Ship new binary in clang-X.Y: clang-import-test
+ * New symbols in libclang1:
+ - clang_EvalResult_getAsLongLong
+ - clang_EvalResult_getAsLongLong
+ - clang_EvalResult_isUnsignedInt
+ * Fix a regression in the test run for the code coverage
+ * Silent ThinLTO/X86/autoupgrade.ll, fails with code coverage (and maybe others)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Mon, 02 Jan 2017 13:51:06 +0100
+
+llvm-toolchain-snapshot (1:4.0~svn286225-1) unstable; urgency=medium
+
+ * New snapshot release
+ * Remove the info section from the generated manpages (Closes: #846269)
+
+ [ Kai Wasserbäch ]
+ * debian/patches/{0003-Debian-version-info-and-bugreport.patch,
+ 0044-soname.diff,23-strlcpy_strlcat_warning_removed.diff,
+ 26-set-correct-float-abi.diff,atomic_library_[12].diff,
+ fix-clang-path-and-build.diff,fix-lldb-server-build,lldb-libname.diff,
+ lldb-soname.diff,mips-fpxx-enable.diff,removeduplicatedeclaration.diff}:
+ Refreshed.
+ * debian/patches/{silent-gold-utils,kfreebsd-support}.diff: Updated.
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Tue, 08 Nov 2016 12:19:55 +0100
+
+llvm-toolchain-snapshot (1:4.0~svn282142-1~exp1) experimental; urgency=medium
+
+ * The libstdc++-6-dev & libobjc-6-dev are only install with clang-X.Y
+ and libclang-X.Y-dev and no longer with libclang1-X.Y
+ (Closes: #841309)
+ * Fix the VCS-* fields
+
+ [ Kai Wasserbäch ]
+ * debian/patches/{23-strlcpy_strlcat_warning_removed.diff,
+ 0003-Debian-version-info-and-bugreport.patch, atomic_library_[12].diff,
+ python-clangpath.diff,removeduplicatedeclaration.diff,
+ fix-clang-path-and-build.diff,mips-fpxx-enable.diff}: Refreshed.
+ * debian/patches/{silent-more-tests.diff,silent-MCJIIT-tests.diff}: Updated.
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Mon, 24 Oct 2016 10:45:07 +0200
+
+llvm-toolchain-3.9 (1:3.9-6) unstable; urgency=medium
+
+ * Fix segfaults in the memory sanitizers (Closes: #842642)
+ Caused by the newer glibc. Many thanks for Nobert Lange for everything
+ * Enable the sanitizers testsuite
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Fri, 11 Nov 2016 17:01:38 +0100
+
+llvm-toolchain-3.9 (1:3.9-5) unstable; urgency=medium
+
+ * d/p/0011-SimplifyCFG-Hoisting-invalidates-metadata.patch: Also apply bug 29163
+ to fix some issues in rust (Closes: #842956)
+ Many thanks to Ximin Luo for the investigation
+
+ * libclang-common-4.0-dev: missing multilib binaries for the sanitizer
+ libraries (Closes: #841923)
+ Many thanks to Norbert Lange for the changes
+
+ [ Pauli ]
+ * d/p/clang-fix-cmpxchg8-detection-on-i386.patch:
+ libcxx atomic tests for old i386 fail with wrong Atomic inline width.
+ Needed for libc++
+ (See https://llvm.org/bugs/show_bug.cgi?id=19355)
+ * d/p lldb-addversion-suffix-to-llvm-server-exec.patch:
+ Fix the lldb-server call in some cases
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Fri, 04 Nov 2016 17:18:07 +0100
+
+llvm-toolchain-3.9 (1:3.9-4) unstable; urgency=medium
+
+ * LLVMConfig.cmake was installed into wrong location
+ Install a symlink from lib/cmake/llvm to share/llvm/cmake
+ (Closes: #839234)
+ * Fix a path issue in scan-view. Thanks Riccardo Magliocchetti
+ (Closes: #838572)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Mon, 31 Oct 2016 10:47:52 +0100
+
+llvm-toolchain-3.9 (1:3.9-3) unstable; urgency=medium
+
+ [ Sylvestre Ledru ]
+ * The libstdc++-6-dev & libobjc-6-dev are only install with clang-X.Y
+ and libclang-X.Y-dev and no longer with libclang1-X.Y
+ (Closes: #841309)
+
+ [ Gianfranco Costamagna ]
+ * Team upload
+ * d/p/drop-wrong-hack-arm64.patch:
+ - drop hack that was preventing the package from building on
+ non-amd64 64bit architectures:
+
+ -- Gianfranco Costamagna <locutusofborg@debian.org> Thu, 27 Oct 2016 11:45:28 +0200
+
+llvm-toolchain-snapshot (1:4.0~svn280796-1~exp1) experimental; urgency=medium
+
+ * Merge clang-include-fixer-4.0 into clang-4.0. Don't think
+ it deserves it own package
+ * python-lldb-4.0 archs "any" to a list like others pkg
+ * Fix a version issue with run-clang-tidy-4.0.py
+ * Also install clang-change-namespace-4.0
+
+ [ Kai Wasserbäch ]
+ * debian/clang-X.Y.install.in: Added clang-cpp.
+ * debian/patches: Refreshed.
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Fri, 02 Sep 2016 13:11:56 +0200
+
+llvm-toolchain-3.9 (1:3.9-1) unstable; urgency=medium
+
+ * New stable release
+ * Port to kfreebsd. Many thanks to Pino Toscano
+ (Closes: #835665)
+ * clang_getAllSkippedRanges in the list of libclang1 symbols
+ * Try to disable the execution of the testsuite for scan-build & coverity
+ for real
+ * Also ship clang-reorder-fields as part of the clang-4.0 package
+ * Build lldb on arm64. Hopefully, works.
+ * New snapshot release
+ * Tentative fix for lldb-server build
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 07 Sep 2016 12:02:12 +0200
+
+llvm-toolchain-snapshot (1:4.0~svn279916-1) unstable; urgency=medium
+
+ * Snapshot is now 4.0
+ * Introduce clang-include-fixer-4.0
+ * Fix the usage of jsoncpp in polly. Thanks to James Clarke for the patch
+ (Closes: #835607)
+ * Fix the renaming of the manpages (Closes: #834077)
+ * Use the manpage from clang.rst instead of help2man
+ * Disable the build of lldb on mips64el, ppc64 and s390x for real
+ * Add symlink from ./build to ../share and ../lib etc
+ Thanks to Ximin Luo for the patch (Closes: #834144)
+ * Sync the 3.9 changes into 4.0
+ * Fix the cmake paths in llvm-4.0-dev deb package. Thanks to Brad King
+ for the patch (Closes: #819072)
+ * Bring back the lto (gone with the cmake migration)
+ (Closes: #819333) (upstream: #27223)
+ * LLVMConfig.cmake is now installed to <prefix>/lib/cmake/llvm instead of
+ <prefix>/share/llvm/cmake
+ Thanks to Brad King of the fix
+ * Disable lldb on sparc64 (Closes: #832371)
+ * Also install clang-rename.el & clang-rename.py in clang-4.0
+ * scan-build llvm results are built using --show-description
+ * Generate manpages for lli, lldb-mi & git-clang-format
+ * Fix some lintian overrides
+ * Generate more manpages
+ * Remove some garbage from the manpages (Closes: #815991, #804347)
+ * Disable -gsplit-dwarf on Ubuntu precise
+ * Update the coverity configuration (Debian has moved to gcc 6)
+ * remove compiler-rt-path.diff (file removed upstream, probably because
+ we moved to cmake)
+ * Ship clang-offload-bundler in clang 4.0
+ * Set the correct Conflicts for python-clang-4.0, python-lldb-4.0
+ (Closes: #832410)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sat, 27 Aug 2016 14:19:41 +0200
+
+llvm-toolchain-snapshot (1:4.0~svn275970-1~exp1) experimental; urgency=medium
+
+ * New snapshot release
+ * Bring back llvm-4.0-tools to life
+ * ship clang-tblgen & yaml-bench as part of the libclang-common-X.Y-dev
+ package
+
+ * amd64 llvm testsuite is green, bring back the failure in case of error
+ * Fix the cmake paths in llvm-3.9-dev deb package. Thanks to Brad King
+ for the patch (Closes: #819072)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Mon, 25 Jul 2016 12:18:52 +0200
+
+llvm-toolchain-3.9 (1:3.9~svn275918-1~exp1) experimental; urgency=medium
+
+ * New snapshot release
+ * Silent test CodeGen/SPARC/LeonInsertNOPsDoublePrecision.ll
+ * ship lli-child-target as part of the llvm-X.Y-runtime package
+ * Bring back llvm-3.9-tools to life
+ * ship clang-tblgen & yaml-bench as part of the libclang-common-X.Y-dev
+ package
+ * ship lli-child-target as part of the llvm-X.Y-runtime package
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Tue, 19 Jul 2016 15:34:08 +0200
+
+llvm-toolchain-snapshot (1:3.9~svn274438-1) unstable; urgency=medium
+
+ * Remove the autoconf section
+ * Bring back the removal of the build dir
+ * Fix the coverage builds (didn't allow several cflags)
+ * Set the correct conflicts on python-lldb-3.8 (Closes: #817873)
+ * Set the correct conflicts on python-clang-3.8 (Closes: #817872)
+ * remove llvm26003-sanitizer-check-env.diff (merged upstream)
+ * Do not fail the build if the manpages cannot be built (failing on
+ Ubuntu precise)
+ * Install libfindAllSymbols.a as part of libclang-X.Y-dev
+ * Ship scan-build-py
+ * Use the libjsoncpp library embedded (fails to link otherwise)
+ * Standards-Version 3.9.8
+ * cmake files moved from usr/lib/llvm-3.9/share/llvm/cmake/
+ to usr/lib/llvm-3.9/lib/cmake/llvm/
+ (upstream change)
+ * Add a symlink from usr/lib/llvm-3.9/share/llvm/cmake
+ pointing to usr/share/llvm-3.9/cmake
+ * Disable the run of lldb testsuite because of LLVM_LINK_LLVM_DYLIB=ON:
+ https://llvm.org/bugs/show_bug.cgi?id=28127
+ * Add -gsplit-dwarf to CXXFLAGS to workaround the memory allocation
+ issue on i386
+ * Ignore the lintian override about embedded-library for json.
+ Doesn't link otherwise
+ * Fix the soname of libclang and libLLVM. Might cause some breakage with
+ existing app but no choice...
+
+ [ Pablo Oliveira ]
+ * Add python-six as a dependency of python-lldb (Closes: #825371)
+ (thanks to Askar Safin)
+ * Fix lldb symlinks
+ * Fix missing _lldb.so import during lldb testsuite
+
+ [ Ed Schouten ]
+ * Preparation of the support of lld (not ready yet)
+
+ [ Kai Wasserbäch ]
+ * debian/rules:
+ - Ensure ld-gold is used. CMake invokes the linker through g++ most of the
+ time, therefore we need to set -Wl,-fuse-ld=gold.
+ - Remove unused variable "confargs".
+
+ [ Brad King ]
+ * Install cmake files in usr/share/llvm-@LLVM_VERSION@/cmake/ instead of
+ usr/share/llvm-@LLVM_VERSION@/cmake/
+ * Also install libLLVM-3.8.so.1 as a symlink
+ * debian/patches/fix-cmake-config-prefix.diff:
+ cover the CMake build system too
+ (Closes: #819072)
+
+ [ Alexis La Goutte ]
+ * Fix an issue with scan-view (Closes: #825101)
+
+ [ YunQiang Su ]
+ * Enable FPXX by default on mips/mipsel (Closes: #826749)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sat, 02 Jul 2016 20:46:05 +0200
+
+llvm-toolchain-snapshot (1:3.9~svn260851-1) unstable; urgency=medium
+
+ * New snapshot
+ * Switch to 3.9 (remove lldb-3.9-dev as it was a transitionnal pkg)
+ * Update the clang description for something more accurate (C++-11, 14, etc)
+ * Cmake migration. Done by Andrew Wilkins. Many thanks to him
+ - Update patches to set SONAME in CMake build
+ - Create symlinks with ".links", don't install from build tree
+ - Remove LLVM-internal tools (lit, FileCheck, not, tblgen, etc.)
+ - Remove llvm-X.Y-tools package, because it contained only
+ internal tools that are not intended for distribution.
+ - Remove autotools-specific artifacts from packages.
+ - Remove "dummy" documentation artifacts from llvm-X.Y-docs
+ package. Not built/installed by CMake, not useful.
+ - Update control/rules to support CMake
+ - Patch LLDB SWIG interfaces to workaround a bug in SWIG
+ See https://llvm.org/bugs/show_bug.cgi?id=25468
+ - add missing files to clang-format
+ - Add patch to fix sanitizer lit invocation
+ - removed LLVM-internal tools (lit, FileCheck, not, *-tblgen, etc.);
+ not installed by CMake, not intended for distribution
+ - removed llvm-X.Y-tools (contained only internal tools)
+ - removed autotools-specific artifacts (configure, Makefile, etc.)
+ - removed dummy documentation files
+ * Sync against 3.8
+ * Disable "Sphinx warnings treated as errors"
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Tue, 08 Mar 2016 09:50:29 +0100
+
+llvm-toolchain-3.8 (1:3.8-1) unstable; urgency=medium
+
+ * New upstream release
+ * Install a missing library to unbreak lldb (Closes: #815809)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 03 Mar 2016 21:16:21 +0100
+
+llvm-toolchain-3.8 (1:3.8~+rc3-1~exp1) experimental; urgency=medium
+
+ * New snapshot release
+ * Update the clang description for something more accurate (C++-11, 14, etc)
+ * Update debian/orig-tar.sh to remove autoconf/config.sub autoconf/config.guess
+ in polly
+
+ [ Matthias Klose ]
+ * clang-tidy-3.8: Remove Breaks/Replaces on clang-modernize-3.8.
+ * Disable lldb on s390x.
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 25 Feb 2016 14:26:14 +0100
+
+llvm-toolchain-3.8 (1:3.8~+rc2-1~exp1) experimental; urgency=medium
+
+ * New snapshot release
+ * Remove build-llvm/ after the install step to save space.
+ Most of the rc1 builds failed because of hd space.
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 03 Feb 2016 08:59:32 +0100
+
+llvm-toolchain-3.8 (1:3.8~+rc1-1~exp1) experimental; urgency=medium
+
+ * New snapshot release
+ * Cmake migration. Done by Andrew Wilkins. Many thanks to him
+ - Update patches to set SONAME in CMake build
+ - Create symlinks with ".links", don't install from build tree
+ - Remove LLVM-internal tools (lit, FileCheck, not, tblgen, etc.)
+ - Remove llvm-X.Y-tools package, because it contained only
+ internal tools that are not intended for distribution.
+ - Remove autotools-specific artifacts from packages.
+ - Remove "dummy" documentation artifacts from llvm-X.Y-docs
+ package. Not built/installed by CMake, not useful.
+ - Update control/rules to support CMake
+ - Patch LLDB SWIG interfaces to workaround a bug in SWIG
+ See https://llvm.org/bugs/show_bug.cgi?id=25468
+ - add missing files to clang-format
+ - Add patch to fix sanitizer lit invocation
+ - removed LLVM-internal tools (lit, FileCheck, not, *-tblgen, etc.);
+ not installed by CMake, not intended for distribution
+ - removed llvm-X.Y-tools (contained only internal tools)
+ - removed autotools-specific artifacts (configure, Makefile, etc.)
+ - removed dummy documentation files
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 20 Jan 2016 16:09:01 +0100
+
+llvm-toolchain-3.8 (1:3.8.1-8) unstable; urgency=medium
+
+ * Disable the usage of ld gold on powerpc (Closes: #833583)
+ * Revert drop-avx512-from-skylake.diff, it is causing some regressions in the
+ testsuite
+ * Disable lldb on ppc64
+ * libfuzzer depends on the same version of clang (Closes: #833564)
+ * Use filter into of findstring in the gold usage. Thanks Doko for the
+ suggestion
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sun, 07 Aug 2016 14:10:09 +0200
+
+llvm-toolchain-3.8 (1:3.8.1-7) unstable; urgency=medium
+
+ * Fix the detection of gcc. This broke the build on the latest unstable
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Fri, 05 Aug 2016 09:55:15 +0200
+
+llvm-toolchain-3.8 (1:3.8.1-6) unstable; urgency=medium
+
+ * Ship libFuzzer in its own package (libfuzzer-X.Y-dev) (Closes: #820159)
+ * Sync from Ubuntu. Many thanks to Matthias Klose
+ - drop-avx512-from-skylake.diff: Don't enable AVX512 on Skylake, as it's
+ a server cpu feature and breaks llvmpipe on workstations.
+ - Remove the build tree before calling dh_strip; at least the amd64 buildd
+ runs out of diskspace at this step.
+ - Add support for gcc's attribute abi_tag (needed for compatibility with
+ GCC 5's libstdc++); taken from the trunk (Closes: #797038)
+ (LP: #1510042, #1488254)
+ D17567-PR23529-Sema-part-of-attrbute-abi_tag-support.diff
+ D18035-PR23529-Mangler-part-of-attrbute-abi_tag-support.diff
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 28 Jul 2016 11:15:04 +0200
+
+llvm-toolchain-3.8 (1:3.8.1-5) unstable; urgency=medium
+
+ [ Gianfranco Costamagna ]
+ * Try to fix mips64el build, by enabling the same
+ packages as the mips and mipsel versions
+ * Link mips* with latomic.
+
+ [ Sylvestre Ledru ]
+ * Disable lldb on sparc64 (Closes: #832371)
+ * Hopefully fix the FTBFS on armel
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 27 Jul 2016 22:49:09 +0200
+
+llvm-toolchain-3.8 (1:3.8.1-4) unstable; urgency=medium
+
+ * Fix the FTBFS under mips/mipsel? (enable the link against atomic)
+ (Closes: #820537)
+ * Bring back llvm-3.8-tools to life
+ * ship clang-tblgen & yaml-bench as part of the libclang-common-X.Y-dev
+ package
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 20 Jul 2016 10:20:46 +0200
+
+llvm-toolchain-3.8 (1:3.8.1-3) unstable; urgency=medium
+
+ * Add -gsplit-dwarf to CXXFLAGS to workaround the memory allocation
+ issue on i386 (hopefully)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sat, 02 Jul 2016 20:59:08 +0200
+
+llvm-toolchain-3.8 (1:3.8.1-2) unstable; urgency=medium
+
+ [ Sylvestre Ledru ]
+ * Add a symlink from usr/lib/llvm-3.8/share/llvm/cmake
+ pointing to usr/share/llvm-3.8/cmake
+
+ [ Gianfranco Costamagna ]
+ * Remove python-lldb-3.8 where liblldb-3.8-dev is not built
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Tue, 28 Jun 2016 14:44:48 +0200
+
+llvm-toolchain-3.8 (1:3.8.1-1) unstable; urgency=medium
+
+ * New maintenance release
+
+ [ Kai Wasserbäch ]
+ * debian/rules: Ensure ld-gold is used. CMake invokes the linker through
+ g++ most of the time, therefore we need to set -Wl,-fuse-ld=gold.
+
+ [ Brad King ]
+ * Followup to fix the cmake install (Closes: #819072)
+
+ [ YunQiang Su ]
+ * Enable FPXX by default on mips/mipsel (Closes: #826749)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 23 Jun 2016 08:49:29 +0200
+
+llvm-toolchain-3.8 (1:3.8.1~+rc1-1~exp1) experimental; urgency=medium
+
+ * New RC release
+ * Improve the cmake detection (used for llvm.org/apt)
+ * Standards-Version updated to 3.9.8
+ * Ignore outdated-autotools-helper-file
+
+ [ Brad King ]
+ * Install cmake files in usr/share/llvm-@LLVM_VERSION@/cmake/ instead of
+ usr/share/llvm-@LLVM_VERSION@/cmake/
+ * Also install libLLVM-3.8.so.1 as a symlink
+ * debian/patches/fix-cmake-config-prefix.diff:
+ cover the CMake build system too
+ (Closes: #819072)
+
+ [ Pablo Oliveira ]
+ * Fix python-lldb dependencies and make proper symlinks to libLLVM
+ and liblldb as suggested by Graham Inggs (Closes: #821022)
+ * Fix liblldb suffix in lldb/scripts/Python/finishSwigPythonLLDB.py
+ (Closes: #813798)
+ * Fix LLVM bug 26158 - clang packages don't provide man pages
+ * Add python-six as a dependency of python-lldb (thanks to Askar Safin).
+
+ [ Gianfranco Costamagna ]
+ * Make python-lldb-3.8 depend on lldb-3.8-dev, to pick all
+ the required dependencies
+ * Unbreak circular dependency by Suggesting the python binding from
+ liblldb-3.8-dev
+
+ [ Alexis La Goutte ]
+ * Fix an issue with scan-view (Closes: #825101)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 26 May 2016 17:30:00 +0200
+
+llvm-toolchain-3.8 (1:3.8-2) unstable; urgency=medium
+
+ * Team upload.
+ * Disable polly on s390x and fix polly check.
+ * Fix VCS fields.
+
+ [ Sylvestre Ledru ]
+ * Fix txt file installation issue, by putting a README.txt file
+ with some explanation.
+
+ [ Graham Inggs ]
+ * Tighten llvm dev dependency (Closes: #814142).
+
+ -- Gianfranco Costamagna <locutusofborg@debian.org> Mon, 07 Mar 2016 10:56:05 +0100
+
+llvm-toolchain-3.8 (1:3.8-1) unstable; urgency=medium
+
+ * New upstream release
+ * Install a missing library to unbreak lldb (Closes: #815809)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 03 Mar 2016 21:16:21 +0100
+
+llvm-toolchain-3.8 (1:3.8~+rc3-1~exp1) experimental; urgency=medium
+
+ * New snapshot release
+ * Update the clang description for something more accurate (C++-11, 14, etc)
+ * Update debian/orig-tar.sh to remove autoconf/config.sub autoconf/config.guess
+ in polly
+
+ [ Matthias Klose ]
+ * clang-tidy-3.8: Remove Breaks/Replaces on clang-modernize-3.8.
+ * Disable lldb on s390x.
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 25 Feb 2016 14:26:14 +0100
+
+llvm-toolchain-3.8 (1:3.8~+rc2-1~exp1) experimental; urgency=medium
+
+ * New snapshot release
+ * Remove build-llvm/ after the install step to save space.
+ Most of the rc1 builds failed because of hd space.
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 03 Feb 2016 08:59:32 +0100
+
+llvm-toolchain-3.8 (1:3.8~+rc1-1~exp1) experimental; urgency=medium
+
+ * New snapshot release
+ * Cmake migration. Done by Andrew Wilkins. Many thanks to him
+ - Update patches to set SONAME in CMake build
+ - Create symlinks with ".links", don't install from build tree
+ - Remove LLVM-internal tools (lit, FileCheck, not, tblgen, etc.)
+ - Remove llvm-X.Y-tools package, because it contained only
+ internal tools that are not intended for distribution.
+ - Remove autotools-specific artifacts from packages.
+ - Remove "dummy" documentation artifacts from llvm-X.Y-docs
+ package. Not built/installed by CMake, not useful.
+ - Update control/rules to support CMake
+ - Patch LLDB SWIG interfaces to workaround a bug in SWIG
+ See https://llvm.org/bugs/show_bug.cgi?id=25468
+ - add missing files to clang-format
+ - Add patch to fix sanitizer lit invocation
+ - removed LLVM-internal tools (lit, FileCheck, not, *-tblgen, etc.);
+ not installed by CMake, not intended for distribution
+ - removed llvm-X.Y-tools (contained only internal tools)
+ - removed autotools-specific artifacts (configure, Makefile, etc.)
+ - removed dummy documentation files
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 20 Jan 2016 16:09:01 +0100
+
+llvm-toolchain-snapshot (1:3.8~svn255217-1~exp1) experimental; urgency=medium
+
+ * New snapshot release
+ * Fix an install issue with clang-tidy
+ * clang-modernize has been removed. Long live to clang-tidy, its
+ replacement
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 10 Dec 2015 05:18:29 +0100
+
+llvm-toolchain-snapshot (1:3.8~svn254193-2) UNRELEASED; urgency=medium
+
+ * disable lldb and polly on powerpc, currently ftbfs.
+ setting the lldb archs in debian/control in just one
+ place would be appreciated.
+ * quoting fixes in debian/rules, when make macros
+ are empty
+ Thanks to Doko for the two previous changes (Closes: #806729)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Mon, 30 Nov 2015 15:34:12 +0100
+
+llvm-toolchain-snapshot (1:3.8~svn254193-1) unstable; urgency=medium
+
+ * New snapshot release
+ * Remove some warnings in the manpages generation (Closes: #795310)
+ * Also ship sancov in clang-3.8
+ * Fix the links to scan-build-3.8 & scan-view-3.8
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Tue, 20 Oct 2015 14:07:06 +0200
+
+llvm-toolchain-snapshot (1:3.8~svn250696-1) unstable; urgency=medium
+
+ * Remove macho-dump from LLVM (removed by upstream r248302)
+ * Introduce clang-tidy-3.8 as a separate package. Replaces clang-modernize
+ * Ship run-clang-tidy.py & clang-tidy-diff.py in clang-tidy-3.8
+ * Remove cpp11-migrate-3.8 package. Has been replaced by clang-modernize
+ for a while (which will be replaced by clang-tidy)
+ * Add three new symbols in libclang1
+ - clang_CompileCommand_getFilename@Base
+ - clang_CompileCommand_getMappedSourceContent@Base 3.8
+ - clang_CompileCommand_getMappedSourcePath@Base 3.8
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Mon, 21 Sep 2015 13:16:35 +0200
+
+llvm-toolchain-snapshot (1:3.8~svn247576-1) unstable; urgency=medium
+
+ [ Sylvestre Ledru ]
+ * New snapshot release
+ * Remove CVE-2015-2305.patch. Already fixed upstream in a different
+ way
+ * remove patches merge upstream
+ - lit-lang.diff
+ - locale-issue-ld.diff
+ * Also generate liblldb-3.8-dbg
+ * Select LLVM OpenMP as the default backend
+
+ [ Gianfranco Costamagna ]
+ * d/control: Add more conflicting packages (python-clang and python-lldb)
+ (Closes: #796811, #796843)
+ * Remove an obsolete declaration about dragonegg
+ (cherry-pick from 3.7 branch)
+
+ [ James Price ]
+ * d/p/fix-cmake-config-prefix.diff: fix cmake path,
+ needs a change after upstream revision r241080
+ (Addresses: #794905)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Mon, 14 Sep 2015 18:29:09 +0200
+
+llvm-toolchain-snapshot (1:3.8~svn245286-1) unstable; urgency=medium
+
+ * New snapshot release (3.7 => 3.8)
+ No need to rename libllvm as 3.8 was not part of the debian archive
+
+ [ Gianfranco Costamagna ]
+ * Fix VCS fields.
+ * d/p/CVE-2015-2305.patch, fix security issue on regcomp.c
+ * Fix many lintian warning/errors
+ - copyright fixes
+ - control files
+ - disabled ocaml documentation
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Tue, 18 Aug 2015 14:28:36 +0200
+
+llvm-toolchain-snapshot (1:3.7~svn231060-1~exp2) UNRELEASED; urgency=medium
+
+ * Reflect upstream changes wrt vim package. Split the files into different
+ directories
+ * Disable the patch force-gcc-header-obj.diff. Seems to cause bug #23556
+ * Fix the CMake build. thanks to Paweł Bylica for the fix.
+ Fix upstream bug #23352
+ * No longer building some clang help page, removing them
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Tue, 21 Apr 2015 09:41:41 +0200
+
+llvm-toolchain-snapshot (1:3.7~svn231060-1~exp1) experimental; urgency=medium
+
+ * New snapshot release
+ * Force the version of clang in the analyzer scripts
+ clang-analyzer-force-version.diff
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Tue, 03 Mar 2015 09:19:38 +0100
+
+llvm-toolchain-snapshot (1:3.7~svn230857-1) unstable; urgency=medium
+
+ * New snapshot release
+ * Support of gcc 5.0 (Closes: #777988)
+ * compiler-rt-i586.diff: fix a build issue of compiler-rt under i386
+ * lldb-gdbserver & lldb-platform have been merged into lldb-server
+ * Bring back polly and remove libcloog-isl-dev & libisl-dev as build deps
+ (shipped in the polly source tree)
+ * Set the correct conflicts (Closes: #777580, #777581, #777582)
+ * lit-lang.diff: Force the call to ld to be in english
+ (was failing with a french locale)
+ * silent-MCJIIT-tests.diff: enable some tests and silents some other
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sat, 28 Feb 2015 18:44:59 +0100
+
+llvm-toolchain-snapshot (1:3.7~svn227076-1) unstable; urgency=medium
+
+ * New snapshot release
+ * Switch to version 3.7
+ * Standards-Version updated to 3.9.6
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Mon, 26 Jan 2015 09:23:41 +0100
+
+llvm-toolchain-snapshot (1:3.6~svn224810-1) unstable; urgency=medium
+
+ * New snapshot release
+ * Update library filename declaration 3.5 => 3.6 (Closes: #772006)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Fri, 05 Dec 2014 17:46:56 -0800
+
+llvm-toolchain-snapshot (1:3.6~svn221998-1~exp1) experimental; urgency=medium
+
+ * Disable ocaml binding. Needs libctypes-ocaml 0.3.3 which is not available
+ * libllvm*.a is not longer built
+ * Update of the libclang symbols
+ * Improve the copyright file. Thanks to Dann Frazier (Closes: #766778)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Tue, 04 Nov 2014 14:43:28 +0100
+
+llvm-toolchain-snapshot (1:3.6~svn218612-1) unstable; urgency=medium
+
+ * Fix my screw up. Add .1 to the libclang soname to make
+ dpkg-shlibdeps happy
+ * Remove useless dependency on doxygen
+ * scan-build could not find clang binary (Closes: #758998)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Fri, 26 Sep 2014 17:05:26 +0200
+
+llvm-toolchain-snapshot (1:3.6~svn218446-1) unstable; urgency=medium
+
+ * New snapshot release
+ * Upload in unstable
+ * Disable the co-instability of lldb & python-lldb
+ (Python stuff conflicts)
+ * Fix bad dependencies on lldb 3.6
+ * Refresh of the list of symbol in libclang
+ * Try to workaround the FTBFS under ppc64el (create an empty directory)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 24 Sep 2014 14:20:49 +0200
+
+llvm-toolchain-snapshot (1:3.6~svn216933-1~exp1) experimental; urgency=medium
+
+ * New snapshot release
+ * sync from 1:3.5~+rc4-2~exp1
+ * libclang-3.6.so should be used instead libclang.so. Update the soname
+ to match the new lib name (Closes: #759538)
+ * Rename liblldb.so to liblldb-3.6.so + update of the soname.
+ * python-clang-3.6 description updated
+ * liblldb-3.6 and python-lldb-3.6 added
+ * lldb-3.6-dev renamed to liblldb-3.6-dev to match the previous changes
+ * Manpages for llvm-ranlib, clang-apply-replacements, pp-trace and clang-tidy
+ added
+ * clang-3.6 should depends on binutils (for ld, at least)
+ (Closes: #751030)
+ * clang/www/analyzer/scripts/dbtree.js removed
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sat, 30 Aug 2014 18:09:20 +0200
+
+llvm-toolchain-snapshot (1:3.6~svn215195-3) unstable; urgency=medium
+
+ * Just like in 3.4 & 3.5, bring back lldb & lldb-dev under mips & mipsel
+ * Ship clang-rename/clang-rename-3.6
+ * Disable libstdc++-header-i386.diff & include-target.diff (merged upstream)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Mon, 18 Aug 2014 09:02:30 +0200
+
+llvm-toolchain-snapshot (1:3.6~svn215195-2) unstable; urgency=medium
+
+ * try to build lldb-mi under kfreebsd (kfreebsd-lldb-mi.diff)
+ * kfreebsd-lldb-gdbserver.diff removed (applied upstream)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Mon, 11 Aug 2014 08:44:13 +0200
+
+llvm-toolchain-snapshot (1:3.6~svn215195-1) unstable; urgency=medium
+
+ * Upload in unstable
+ * Enable compressed debug sections (Closes: #757002)
+ * Force scan-build to use the same version of clang
+ * Old JIT has been removed. 0050-powerpcspe-fp.diff is useless
+ * try to build lldb-gdbserver under kfreebsd (kfreebsd-lldb-gdbserver.diff)
+ * Second try to fix build under HURD (hurd-EIEIO-undef.diff)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Mon, 04 Aug 2014 13:36:15 +0200
+
+llvm-toolchain-3.4 (1:3.4.2-8) unstable; urgency=medium
+
+ * Try to bring back lldb-3.4-dev on mips & mipsel (Closes: #758314)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sat, 16 Aug 2014 22:39:13 +0200
+
+llvm-toolchain-3.4 (1:3.4.2-7) unstable; urgency=medium
+
+ * Upload in unstable
+ * Try to bring back lldb on mips & mipsel
+ * Force scan-build to use the same version of clang
+ * Try to fix hurd (hurd-EIEIO-undef.diff)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Tue, 05 Aug 2014 14:40:05 +0200
+
+llvm-toolchain-3.5 (1:3.5~+rc4-1) unstable; urgency=medium
+
+ * New snapshot release
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 27 Aug 2014 23:09:59 +0200
+
+llvm-toolchain-3.5 (1:3.5~+rc3-1) unstable; urgency=medium
+
+ * New snapshot release
+ * Cherry-pick to commit from upstream (revisions 214906 214907)
+ to improve the gcc compat
+ * Remove scan-build-clang-path.diff (applied upstream)
+ * Just like in 3.4, bring back lldb & lldb-dev under mips & mipsel
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 20 Aug 2014 23:43:06 +0200
+
+llvm-toolchain-3.5 (1:3.5~+rc2-1) unstable; urgency=medium
+
+ * Fix the version
+ * try to build lldb-gdbserver under kfreebsd (kfreebsd-lldb-gdbserver.diff)
+ * Second try to fix build under HURD (hurd-EIEIO-undef.diff)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Fri, 08 Aug 2014 10:42:13 +0200
+
+llvm-toolchain-3.5 (1:3.5~+rc2-1~exp1) unstable; urgency=medium
+
+ * New snapshot release
+ * Enable compressed debug sections (Closes: #757002)
+ * Force scan-build to use the same version of clang
+ * Bring back scan-build-search-path.diff (Closes: #757219)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Mon, 04 Aug 2014 13:35:35 +0200
+
+llvm-toolchain-snapshot (1:3.6~svn214630-1~exp1) experimental; urgency=medium
+
+ * New snapshot release (3.5 => 3.6)
+ * Co installation of clang (Closes: #736057)
+ - scan-build => scan-build-3.6
+ - scan-view => scan-view-3.6
+ - asan_symbolize => asan_symbolize-3.6
+ * Refresh of the patches
+ * Install yaml2obj, obj2yaml & verify-uselistorder in llvm-3.6
+ * Remove of pollycc
+ * clang alternatives are managed by llvm-defaults
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 31 Jul 2014 18:12:59 +0200
+
+llvm-toolchain-3.5 (1:3.5~+rc1-2) unstable; urgency=medium
+
+ * Sync with 3.4 svn to retrieve some changes:
+ * Replace $(CURDIR)/debian/tmp by a variable
+ * Move the polly installation in the dh_auto_install rules instead
+ of using *.install files. In llvm.org/apt/, I have to sometime disable
+ polly
+ * hurd-EIEIO-undef.diff: try to undef an errno.h to fix the ftbfs
+ * clang-X suggests clang-X-doc (Closes: #755922)
+ * Manage all files using .in mechanism. It will simplify the upgrade of
+ version
+ * Disable lldb for ppc64el. Thanks to Dimitri John Ledkov (Closes: #756380)
+ * Fix the FTBFS under PowerPC. Thanks to Dimitri John Ledkov for the patch
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 24 Jul 2014 11:42:56 +0200
+
+llvm-toolchain-3.5 (1:3.5~+rc1-1) unstable; urgency=medium
+
+ * First RC release of the 3.5 llvm toolchain
+ * Apply lldb-kfreebsd.diff patch to fix FTBFS under KFreeBSD
+ Thanks to Ed Maste
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 23 Jul 2014 08:57:59 +0200
+
+llvm-toolchain-snapshot (1:3.5~svn213451-1) unstable; urgency=medium
+
+ * New snapshot release
+ * If the version of gcc is too old, force the usage of gcc 4.8
+ * Clang will now show the full version. Example: 3.5.0-svn213052-1~exp1
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sat, 19 Jul 2014 15:27:11 +0200
+
+llvm-toolchain-snapshot (1:3.5~svn211669-2) unstable; urgency=medium
+
+ * Remove useless dependency on g++
+ * Use the option stable '-analyzer-config stable-report-filename=true'
+ to the llvm scan-build reports
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sun, 29 Jun 2014 19:13:05 +0200
+
+llvm-toolchain-snapshot (1:3.5~svn211669-1) unstable; urgency=medium
+
+ * New snapshot release
+ * Fix CVE-2014-2893 (Closes: #744817)
+ * Merge with 3.4/debian
+ * Ship lldb-mi in lldb
+ * Remove scan-build-fix-clang-detection.diff (applied upstream)
+ * Ship the compiler-rt static libraries
+ * Running tests respect DEB_BUILD_OPTIONS=parallel=X
+ (Closes: #751943)
+ * Fix FTBFS on powerpc and powerpcspe (Closes: #733890)
+ * Broken library symlink fixed in lldb-3.5 (Closes: #715130)
+ * Fix --use-cc when no absolute path is provided (Closes: #748777)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 25 Jun 2014 07:58:03 +0200
+
+llvm-toolchain-snapshot (1:3.5~svn209039-2) unstable; urgency=medium
+
+ * Provide a link as compatibility with previous lib name (Closes: #748569)
+ * Be less permissive when installing lldb. Remove duplication of the install
+ of liblldb.so.1
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sun, 18 May 2014 20:01:40 +0200
+
+llvm-toolchain-snapshot (1:3.5~svn209039-1) unstable; urgency=medium
+
+ * New snapshot release
+ * Fix the cmake install patch
+ * Disable profile_rt.diff for now
+ * Refresh of libclang1-3.5.symbols
+ * Fix path to /usr/lib/clang/3.5.0/ (Closes upstream #19088)
+ * Fix the wrong dependency declaration on llvm-3.5-tools
+ * Add gnustep & gnustep-devel as suggests of clang-3.5
+ * Add libc6-dev as an explicit dependency of clang-3.5
+ * Build with dh_install --fail-missing
+ * Start to use /usr/bin/foo-X.Y. First step to have several clang versions
+ installed together
+ * Add some missing files:
+ - lli-child-target - llvm-3.5-runtime
+ - count - llvm-3.5-tools
+ - html.tar.gz - llvm-3.5-doc
+ - ocamldoc.tar.gz - llvm-3.5-doc
+ - BugpointPasses.so - llvm-3.5-dev
+ - liblldb* - lldb-3.5-dev
+ - clang-apply-replacements - clang-3.5
+ - clang-tidy - clang-3.5
+ - clang-query - clang-3.5
+ - pp-trace - clang-3.5
+ - lldb-platform - lldb-3.5
+ - lldb-gdbserver - lldb-3.5
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Fri, 16 May 2014 23:23:50 +0200
+
+llvm-toolchain-3.4 (1:3.4.2-2) unstable; urgency=medium
+
+ * Improve the CVE-2014-2893 fix (Closes: #744817)
+ * Add a check to avoid an error on arch where compiler-rt is not available
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Mon, 16 Jun 2014 23:00:47 +0200
+
+llvm-toolchain-3.4 (1:3.4.2-1) unstable; urgency=medium
+
+ * New upstream release
+ * Add build conflict on libllvm-3.5-ocaml-dev
+ * Also disable lldb tests under armel (like armhf). Timeout
+ * Update of the repack script
+ * Use llvm-3.4-dev.links.in to manage the symlinks
+ * Fix the soname of liblldb.so to see it treated as a real library
+ (Closes: #750868)
+ * Switch to the default gcc/g++ compiler. Currently 4.9 (Closes: #751322)
+ * Fixes CVE-2014-2893 (Closes: #744817)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Fri, 06 Jun 2014 15:55:57 +0200
+
+llvm-toolchain-3.4 (1:3.4.1-4) unstable; urgency=medium
+
+ * Be less permissive when installing lldb. Remove duplication of the install
+ of liblldb.so.1
+ * Add symlinks lldb-3.4, lldb-platform-3.4 & lldb-gdbserver-3.4 without 3.4
+ * Clang was unusable with libstdc++ from gcc 4.9 (Closes: #744792)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sun, 18 May 2014 20:18:19 +0200
+
+llvm-toolchain-3.4 (1:3.4.1-3) unstable; urgency=medium
+
+ * Fix path for arch without support of compiler-rt. Should fix most of the
+ FTBFS
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Fri, 16 May 2014 15:27:37 +0200
+
+llvm-toolchain-3.4 (1:3.4.1-2) unstable; urgency=medium
+
+ * Fix the soname. No changes in the ABI, so, no need to update the soname
+ (Closes: #747701)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sun, 11 May 2014 17:29:22 +0200
+
+llvm-toolchain-3.4 (1:3.4.1-1) unstable; urgency=medium
+
+ * New upstream release. Note that only LLVM & Clang had a new release.
+ I just copied the 3.4 tarballs for clang-extra-tools, polly, lldb and
+ compiler-rt.
+ * Symlink for current build mode missing (Closes upstream #18836)
+ * Add link usr/lib/llvm-3.4/ to usr/lib/llvm-3.4/build/Debug+Asserts
+ * Backport of a r201586 from upstream. scan-build was failing on some project
+ like firefox build system. (Yeh, advantage to be the packager of a software
+ that I use ;) ). See scan-build-fix-clang-detection.diff
+ * Fix the version in the symbol list (libclang1-3.4.symbols)
+ * Update the path regarding upstream changed (3.4 => 3.4.1)
+ (Patch improved also by Martin Nowack)
+ * Remove generated file libllvm3.4.install
+ * Add gnustep & gnustep-devel as suggests of clang-3.4
+ * Add libc6-dev as an explicit dependency of clang-3.4
+ * Build with dh_install --fail-missing
+ * Start to use /usr/bin/foo-X.Y. First step to have several clang versions
+ installed together
+ * Add some missing files:
+ - lli-child-target - llvm-3.4-runtime
+ - count - llvm-3.4-tools
+ - html.tar.gz - llvm-3.4-doc
+ - ocamldoc.tar.gz - llvm-3.4-doc
+ - BugpointPasses.so - llvm-3.4-dev
+ - liblldb* - lldb-3.4-dev
+ - lldb-platform-3.4 - lldb-3.4
+ - clang-apply-replacements - clang-3.4
+ - clang-tidy - clang-3.4
+ - pp-trace - clang-3.4
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Fri, 09 May 2014 19:57:33 +0200
+
+llvm-toolchain-snapshot (1:3.5~svn200375-1) unstable; urgency=medium
+
+ * New snapshot release
+ * polly unnopstream is now using the isl trunk. Disabling it for now.
+ * Only explicit the link against atomic when running mips & mipsel
+ * Fix the cindex.py declaration (3.3 => 3.5). Closes upstream bug #18365
+ * Bring back the dependency on gcc 4.8. It breaks the nightly snapshot
+ packages and it should be the norm now...
+
+ [ Martin Nowack ]
+ * Fixed build directory for llvm-config
+ * Add Unittests for running tests for llvm-based projects
+ * Install FileCheck and not for testing
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 29 Jan 2014 07:36:29 -0800
+
+llvm-toolchain-snapshot (1:3.5~svn199601-1) unstable; urgency=low
+
+ * New snapshot release
+ * Update clang-format declaration from 3.4 => 3.5. Closes upstream bug #18451
+ * Fix the cindex.py declaration (3.3 => 3.5). Closes upstream bug #18365
+ * Force gcc 4.8. LLVM & Co are now in C++ 11.
+ * Also make clang-3.5 breaks/replaces clang. Conflicts on
+ /usr/share/clang/scan-view/ScanView.py (Closes: #730266)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 15 Jan 2014 15:08:03 +0100
+
+llvm-toolchain-snapshot (1:3.5~svn197556-1) unstable; urgency=low
+
+ * New snapshot release
+ * Merge changes from 1:3.4~+rc3-1
+ * Disable much of the display of the lldb display
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Tue, 17 Dec 2013 12:02:52 +0100
+
+llvm-toolchain-snapshot (1:3.5~svn195337-1) unstable; urgency=low
+
+ * Sync from 3.4~+rc2-1
+ * Make lldb 3.5 also conflict with 3.4 (Closes: #730163)
+ * Make python-clang 3.5 also conflict with 3.4 (Closes: #730164)
+ * Fix a FTBFS with clang
+ * Refresh the /usr/include/clang mess
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Tue, 10 Dec 2013 09:57:15 +0100
+
+llvm-toolchain-snapshot (1:3.5~svn195337-1) unstable; urgency=low
+
+ * Switch from 3.4 to 3.5
+ * Remove patch 0046-Revert-Patch-to-set-is_stmt-a-little-better-for-prol.patch
+ Useless now and missleading
+ * Standards-Version updated to 3.9.5
+ * kfreebsd.diff remove (applied upstream)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 20 Nov 2013 21:24:28 +0100
+
+llvm-toolchain-3.4 (1:3.4-2) unstable; urgency=medium
+
+ * Only explicit the link against atomic when running mips & mipsel
+ * Fix the cindex.py declaration (3.3 => 3.5). Closes upstream bug #18365
+ * Bring back the dependency on gcc 4.8. It breaks the nightly snapshot
+ packages and it should be the norm now...
+ * Introduce llvm-3.4-tools to contain the new files needed by Martin
+
+ [ Matthias Klose ]
+ * Disable the lldb build for AArch64.
+ * Don't run the lldb tests on armhf (time out on the buildd).
+
+ [ Martin Nowack ]
+ * Fixed build directory for llvm-config
+ * Add Unittests for running tests for llvm-based projects
+ * Install FileCheck and not for testing
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Tue, 11 Feb 2014 11:19:21 +0100
+
+llvm-toolchain-3.4 (1:3.4-1) unstable; urgency=medium
+
+ * New upstream release
+ * Remove explicit dep on gcc 4.8
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Fri, 20 Dec 2013 18:36:58 +0100
+
+llvm-toolchain-3.4 (1:3.4~+rc3-1ubuntu4) trusty; urgency=medium
+
+ * Rebuild for ocaml-4.01.
+
+ -- Matthias Klose <doko@ubuntu.com> Mon, 23 Dec 2013 12:11:17 +0000
+
+llvm-toolchain-3.4 (1:3.4~+rc3-1ubuntu3) trusty; urgency=low
+
+ * Bring over Ubuntu changes from 3.3:
+ - Revert to using the static copy of libjsoncpp, since the shared
+ library lacks sane versioning, and this is only a few thousand
+ lines of cargo-culted code from a reasonably stagnant upstream.
+ - Drop lcov build-dep to avoid pulling it into main, due to its
+ being fundamentally incompatibe with our newer GCC versions.
+
+ -- Matthias Klose <doko@ubuntu.com> Fri, 20 Dec 2013 12:59:01 +0100
+
+llvm-toolchain-3.4 (1:3.4~+rc3-1ubuntu2) trusty; urgency=low
+
+ * Don't run the lldb tests on armhf (time out on the buildd).
+
+ -- Matthias Klose <doko@ubuntu.com> Wed, 18 Dec 2013 12:29:56 +0100
+
+llvm-toolchain-3.4 (1:3.4~+rc3-1ubuntu1) trusty; urgency=low
+
+ * Disable the lldb build for AArch64.
+ * Build-depend on gcc-multilib on amd64 and i386.
+
+ -- Matthias Klose <doko@ubuntu.com> Tue, 17 Dec 2013 18:44:50 +0100
+
+llvm-toolchain-3.4 (1:3.4~+rc3-1) unstable; urgency=low
+
+ * New testing upstream release
+ * Relative call in the chroot without proc failed.
+ See: fix-an-issue-in-chroot-witout-proc.diff
+ * Bring back lldb-link-atomic.diff to make sure lldb builds under
+ powerpc
+ * Also limit the number of archs for liblldb-dev
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Tue, 17 Dec 2013 11:27:40 +0100
+
+llvm-toolchain-3.4 (1:3.4~+rc2-3) unstable; urgency=low
+
+ * Fix the bad declaration on the lldb desactivation
+ * Also disable lldb under powerpc
+ * Hopefully, fix lldb under Kfreebsd-* (thanks to Ed Maste if it works)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 04 Dec 2013 23:53:49 +0100
+
+llvm-toolchain-3.4 (1:3.4~+rc2-2) unstable; urgency=low
+
+ * Add the Ocaml ABI dependency (Closes: #731344)
+ * Disable LLDB also for ia64, mips & mipsel
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 04 Dec 2013 15:37:39 +0100
+
+llvm-toolchain-3.4 (1:3.4~+rc2-1) unstable; urgency=low
+
+ * New testing upstream release
+ * 0047-version-name.diff ocamldoc.diff removed (applied upstream)
+ * r600 is now compiled by default (remove the configure arg)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Tue, 03 Dec 2013 10:25:59 +0100
+
+llvm-toolchain-3.4 (1:3.4~+rc1-3) unstable; urgency=low
+
+ * Remove the usage of --with-c-include-dirs, --with-cxx-include-root,
+ --with-cxx-include-arch and --with-cxx-include-64bit-dir
+ It was blocking the automatic detection of the path of clang.
+ In particular in the context of the usage of -target.
+ However, it does not completely fix the detection of the i386 C++ path.
+ See the next item.
+ (Closes: #729933)
+ * Bring back the path to libstdc++ under i386. Still not fixed upstream
+ (Closes: #730857)
+ * Define also MAXPATHLEN in Path.inc for HURD.
+ * Silent the trillion of warnings in the LLDB Python wrapper (swig generated)
+ See silent-swig-warning.diff
+ * Silent some i386 tests failing (it is expected)
+ See silent-MCJIIT-tests.diff
+ * Make lldb 3.4 also conflict with 3.5 (Closes: #730163)
+ * Make python-clang 3.4 also conflict with 3.5 (Closes: #730164)
+ * Port LLVM to mips64el. Thanks to YunQiang Su. Initially done for
+ 3.3 and ported on the 3.4 (Closes: #730808)
+ * If we get an unexpected pass, do not break the tests
+ do-not-fail-on-unexpected-pass.diff (I am disabling some tests)
+ * Fix the path detection of the objective h headers.
+ * Also add usr/lib/llvm-3.4/lib/clang/3.4/include =>
+ usr/lib/clang/3.4/include symlink to simplify the path detection
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sun, 01 Dec 2013 17:49:46 +0100
+
+llvm-toolchain-3.4 (1:3.4~+rc1-2) unstable; urgency=low
+
+ * Force the build to gcc 4.8... gcc 4.6 used on some Debian archs does not
+ support some C++ features.
+ * Fail the build when llvm tests are failing under amd64 + i386. More to come.
+ * Fix a libclang.so.1 issue during the clang tests
+ * Improve the patch 23-strlcpy_strlcat_warning_removed.diff
+ (also remove the tests)
+ * Make lldb 3.4 also conflict with 3.5 (Closes: #730163)
+ * Make python-clang 3.4 also conflict with 3.5 (Closes: #730164)
+ * Remove usr/lib/llvm-3.4/build/autoconf/LICENSE.TXT
+ * silent warning "manpage-has-useless-whatis-entry" in lldb-3.4
+ * silent warning "package-name-doesnt-match-sonames libclang1"
+ * Refresh patch kfreebsd_v2.diff to, maybe, fix lldb build under kfreebsd.
+ Thanks to Ed Maste for the patch.
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Tue, 26 Nov 2013 18:32:49 +0100
+
+llvm-toolchain-3.4 (1:3.4~+rc1-1) unstable; urgency=low
+
+ * New testing upstream release
+ * kfreebsd.diff removed. Applied upstream
+ * Remove patch 0046-Revert-Patch-to-set-is_stmt-a-little-better-for-prol.patch
+ Useless now and missleading
+ * Branch from llvm-toolchain-snapshot
+ * Standards-Version updated to 3.9.5
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 20 Nov 2013 21:24:28 +0100
+
+llvm-toolchain-snapshot (1:3.4~svn194079-1) unstable; urgency=low
+
+ * New snapshot release
+ * Also install clang 3.4 examples (clang-3.4-examples) (Closes: #728260)
+ * Move c-index-test* from llvm-3.4 => clang-3.4. It was triggering an
+ unnecessary dependency from llvm-3.4 to libclang
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Fri, 01 Nov 2013 05:19:55 +0100
+
+llvm-toolchain-snapshot (1:3.4~svn193628-1) unstable; urgency=low
+
+ * New snapshot release
+ - Fix the scan-build warning (Closes: #725332)
+ * Merge changes from the 3.3 branch (see 1:3.3-12)
+ * Add lldb-3.4-dev package
+ * Remove mipsel-ftbfs.diff (applied upstream)
+ * Add support of coverity checker (non-free and not packaged)
+ * libprofile_rt and runtime has been removed upstream (r191835)
+ Features are provided by compiler-rt
+ * Update the build dependency from tcl8.5 to tcl (Closes: #725954)
+ * clang-modernize-3.4 was not coinstallable with clang 3.4
+ (Closes: #724245)
+ * The package wasn't cleaned correctly (Closes: #722155)
+ * libtinfo-dev is now a dependency of llvm-3.4-dev (Closes: #727129)
+ * Install libclang.so in /usr/lib/*/libclang-3.4.so
+ * Install libclang.so.1 in /usr/lib/*/libclang-3.4.so.1
+ * Also ship the python clang binding (python-clang-3.4)
+ * Enable polly if the dependencies are OK (only Debian unstable for now)
+ * Bring back /usr/lib/llvm-3.4/lib/libclang.so (libclang-3.4-dev) and
+ /usr/lib/llvm-3.4/lib/libclang.so.1 (libclang1-3.4)
+ * Honor the option "nocheck"
+ * Disable the build of lldb under HURD
+ * Ship the lldb headers into lldb-X.Y-dev (Closes: #723743)
+ I might create a liblldb-X.Y library at some point but I think it is too
+ early.
+ * Update the build dependency from tcl8.5 to tcl (Closes: #725953)
+ * Update of the clang descriptions (Closes: #727684)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Tue, 29 Oct 2013 17:56:18 +0100
+
+llvm-toolchain-snapshot (1:3.4~svn190846-1) unstable; urgency=low
+
+ * New snapshot release
+ * Merge changes from the 3.3 branch (see 1:3.3-9)
+ * Remove ia64-fix.diff (applied upstream)
+ * cpp11-migrate renamed to clang-modernize
+ * lldb-3.4 is back to Architectures: any
+ * Patch lldb-hurd.diff removed (applied upstream)
+ * Directory www/ from tarballs polly & lldb removed
+ * Update of the description of LLVM packages
+ (LLVM no longer mean Low Level Virtual Machine)
+
+ [ Luca Falavigna ]
+ * debian/control:
+ - Add llvm-3.4-dev to lldb-3.4 Depends field.
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 05 Sep 2013 12:04:35 +0200
+
+llvm-toolchain-3.3 (1:3.3-9) unstable; urgency=low
+
+ [ Luca Falavigna ]
+ * debian/control:
+ - Add llvm-3.3-dev to lldb-3.3 Depends field (Closes: #715129).
+
+ [ Sylvestre Ledru ]
+ * Only use -fuse-ld=gold on supported distribution. Simplify the
+ backports.
+ * Fix 'bits/c++config.h' file not found under i386
+ See libstdc++-header-i386.diff. (Closes: #714890)
+ * Add more fixes for the HURD port... (but still fails)
+
+ [ Robert Millan ]
+ * clang under KfFreeBSD was not exporting the correct defines
+ (Closes: #721880)
+
+ [ Jon Severinsson ]
+ * Merge from llvm-toolchain-3.2 branch up to 3.2repack-11.
+ * Drop auto-generated file debian/libllvm3.3.install.
+ * Automatically determine GCC_VERSION and dep:devlibs based on g++ package
+ version.
+ * Automatically determine if -fuse-ld=gold is supported based on binutils
+ package version.
+
+ [ Adam Conrad ]
+ * debian/patches/lldb-link-atomic.diff: Link lldb with -latomic to get
+ builtin GCC atomic helpers on arches (like powerpc) that need them.
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Mon, 26 Aug 2013 14:48:42 +0200
+
+llvm-toolchain-3.3 (1:3.3-8) unstable; urgency=low
+
+ [ Sylvestre Ledru ]
+ * Fix another issues under HURD...
+
+ [ Luca Falavigna ]
+ * debian/patches/libprofile_rt_sparc.patch:
+ - Re-enable libprofile_rt on Sparc, fix FTBFS.
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Fri, 23 Aug 2013 15:02:05 +0200
+
+llvm-toolchain-3.3 (1:3.3-7) unstable; urgency=low
+
+ * debhelper version 9.20130720 fails on the call to dh_auto_clean
+ Remove it. It was anyway useless.
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 22 Aug 2013 14:28:25 +0200
+
+llvm-toolchain-3.3 (1:3.3-6) unstable; urgency=low
+
+ * Fix the FTBFS under hurd and KFreeBSD
+ * Do not remove all *.o in tests. Some of them are from upstream source
+ tarball. Thanks to Maarten Lankhorst for the fix.
+ * Fix the lintian error 'lldb-3.3: postinst-must-call-ldconfig'
+ * Add the manpages of clang-format-3.3
+ * Overrides the manpages warnings
+ * Also apply unwind-chain-inclusion.diff from the snapshot branch to make sure
+ we can build the package locally even if libclang-dev is installed
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 22 Aug 2013 09:01:04 +0200
+
+llvm-toolchain-3.3 (1:3.3-5) unstable; urgency=low
+
+ * Install llvm-c headers also in usr/include/llvm-3.3/llvm-c
+ * Fix the FTBFS under mips & mipsel
+ * Refresh of the kfreebsd i386 patch
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 07 Aug 2013 13:12:23 +0200
+
+llvm-toolchain-3.3 (1:3.3-4) unstable; urgency=low
+
+ * Use the static library libjsoncpp.a instead of the ship library in polly
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sun, 11 Aug 2013 09:54:17 +0200
+
+llvm-toolchain-snapshot (1:3.4~svn185325-1) unstable; urgency=low
+
+ * binutils-gold no longer exists. Use -fuse-ld=gold instead.
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 01 Aug 2013 14:06:38 +0200
+
+llvm-toolchain-snapshot (1:3.3-2) unstable; urgency=low
+
+ * Fix warning python-script-but-no-python-dep on clang-format-X.Y
+ * manpages are generated during build time (simplifies maintenance)
+ * Fix duplicate underscore.js and jquery.js
+ * Move libjs-jquery & libjs-underscore dependencies to llvm-X.Y-doc
+ * Add lldb-X.Y manpage
+ * Hopefully fix the ftbfs under mipsel (mipsel-ftbfs.diff)
+ * Disable the usage of binutils-gold under armel. It currently fails with:
+ "attempt to map 2752512 bytes at offset 2066666 exceeds size of file;
+ the file may be corrupt"
+
+ [ Léo Cavaillé ]
+ * Add patch to find correctly LLVMGold.so with -O4 (Closes: #712437)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 20 Jun 2013 15:39:11 +0200
+
+llvm-toolchain-snapshot (1:3.4~svn184294-1~exp1) experimental; urgency=low
+
+ * New snapshot release
+ * Improve some scripts and fix cpp11-migrate install from
+ clang-tools-extra.
+ * Fix "versionless" clang manpages install.
+ * Fix Toolchain patch from change of scope (add namespaces).
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 19 Jun 2013 14:20:12 +0200
+
+llvm-toolchain-snapshot (1:3.4~svn183914-1) unstable; urgency=low
+
+ * New snapshot release
+ * Upload to unstable (will be blocked by a RC bug)
+ * Sync changes from llvm-toolchain-3.3:
+ - Introduce cpp11-migrate-3.4 and clang-format-3.4
+ - Install the vim llvm script at the right place
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 13 Jun 2013 18:47:08 +0200
+
+llvm-toolchain-snapshot (1:3.4~svn182733-1~exp1) experimental; urgency=low
+
+ * New snapshot release (3.4 release)
+ * Add a symlink of libLLVM-3.4.so.1 to usr/lib/llvm-3.4/lib/libLLVM-3.4.so
+ to fix make the llvm-config-3.4 --libdir work (Closes: #708677)
+ * Various packages rename to allow co installations:
+ * libclang1 => libclang1-3.4
+ * libclang1-dbg => libclang1-3.4-dbg
+ * libclang-dev => libclang-3.4-dev
+ * libclang-common-dev => libclang-common-3.4-dev
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Mon, 27 May 2013 15:01:57 +0200
+
+llvm-toolchain-snapshot (1:3.3~svn179851-1~exp1) experimental; urgency=low
+
+ * Draft of a snapshot release (3.3)
+ * Enable r600 experimental backend
+ * Improve the dependencies:
+ * clang-3.3 depends on the exact same libllvm3.3 release
+ * idem for lldb-3.3
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Fri, 19 Apr 2013 09:31:38 +0200
+
+llvm-toolchain-3.2 (1:3.2repack-11) unstable; urgency=low
+
+ * dh_auto_clean removed, just like in the 3.3
+ * Use the static library libjsoncpp.a instead of shipping library in polly
+ Backport of the modification of 3.3
+
+ [ Adam Conrad ]
+ * Revive deltas from the previous Ubuntu versions of llvm and clang:
+ - debian/patches/35-ubuntu-releases.diff: Add UbuntuSaucy to table.
+ - debian/patches/JITEmitter.patch: Fix a segfault in the exception
+ table of the JIT code emitter (See Launchpad bug #1160587)
+
+ [ Luca Falavigna ]
+ * debian/patches/libprofile_rt_sparc.patch:
+ - Re-enable libprofile_rt on Sparc, fix FTBFS.
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Fri, 23 Aug 2013 11:49:09 +0200
+
+llvm-toolchain-3.2 (1:3.2repack-10) unstable; urgency=low
+
+ * Fix the wrong package declaration on libstdc++-4.8-dev (Closes: #713944)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Mon, 24 Jun 2013 23:00:47 +0200
+
+llvm-toolchain-3.2 (1:3.2repack-9) unstable; urgency=low
+
+ * Switch to libstdc++ 4.8 instead of 4.7 for the headers (Closes: #712520)
+ * Depends against libobjc-4.8-dev and libgcc-4.8-dev
+ * Disable the usage of binutils-gold under armel. It currently fails with:
+ "attempt to map 2752512 bytes at offset 2066666 exceeds size of file;
+ the file may be corrupt"
+ * Add DEBUGMAKE=1 to get information about compiler-rt compilation
+ * Fix "libclang-common-dev: missing-depends-line"
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sat, 22 Jun 2013 07:38:41 +0200
+
+llvm-toolchain-3.2 (1:3.2repack-8) unstable; urgency=low
+
+ * Fix the build under ia64. Thanks to Luca Falavigna for the patch
+ (ia64-fix.diff)
+ * Disable lldb-3.2:
+ - the quality is not good enough
+ - We have lldb-3.3 now in the archive
+ - Too many backported patches would be necessary for lldb-3.2 to work
+ - It blocks some important transitions (mesa)
+ * Add the detection of Ubuntu saucy
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Mon, 03 Jun 2013 11:32:29 +0200
+
+llvm-toolchain-3.2 (1:3.2repack-7) unstable; urgency=low
+
+ * For now, enable only lldb for amd64 and i386 (blocks too many things)
+ (Bis) (Closes: #707866)
+ * Add a symlink of libLLVM-3.2.so.1 to usr/lib/llvm-3.2/lib/libLLVM-3.2.so
+ to fix make the llvm-config-3.2 --libdir work (Closes: #708677)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Mon, 27 May 2013 13:20:30 +0200
+
+llvm-toolchain-3.2 (1:3.2repack-6) unstable; urgency=low
+
+ * Create the compiler-rt directory to make the install of compiler-rt works
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sat, 18 May 2013 18:08:52 +0200
+
+llvm-toolchain-3.2 (1:3.2repack-5) unstable; urgency=low
+
+ * For now, enable only lldb for amd64 and i386 (blocks too many things)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sat, 18 May 2013 10:24:04 +0200
+
+llvm-toolchain-3.2 (1:3.2repack-4) unstable; urgency=low
+
+ * Add several patches which, hopefully, will fix the build under ARM, S390,
+ S390X, etc (lldb-apple_only.diff, lldb-user-remove.diff & lldb-hurd.diff)
+ * Include sys/wait.h also under kfreebsd (kfreebsd-thread.diff)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 15 May 2013 12:04:24 +0200
+
+llvm-toolchain-3.2 (1:3.2repack-3) unstable; urgency=low
+
+ * Before the configure, show which version of CC is being used.
+ * Add support of kfreebsd and hurd in lldb (kfreebsd-hurd-lldb.diff)
+ * Force the usage of gcc 4.7 for all archs. Should fix some FTBFS
+ (Closes: #707866)
+ * Fix the symlink on clang++.1.gz llvm-clang.1.gz (Closes: #707832)
+
+ [ Jon Severinsson ]
+ * Re-enable the r600 backend and update it to the mesa-9.1.1 tag.
+ (Closes: #708009)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Tue, 14 May 2013 12:10:07 +0200
+
+llvm-toolchain-3.2 (1:3.2repack-2) unstable; urgency=low
+
+ * Do not depend on libobjc-4.7-dev & libgcc-4.7-dev.
+ They are still only in experimental
+ * Disable the usage of binutils-gold under [powerpc powerpcspe ppc64 sparc
+ sparc64] to fix FTBFS
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Tue, 07 May 2013 13:15:20 +0200
+
+llvm-toolchain-3.2 (1:3.2repack-1) unstable; urgency=low
+
+ * Upload to unstable
+ * Standards-Version update to 3.9.4
+ * clang pure virtual function call crash with binaries built with C++11's
+ std::thread. Upstream commit 178816 (Closes: #705838)
+ * Introduce a symbols file for libclang1 (Closes: #705672)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sun, 21 Apr 2013 14:06:23 +0200
+
+llvm-toolchain-3.2 (1:3.2repack-1~exp4) experimental; urgency=low
+
+ * Build using binutls-gold to improve the quality of the binaries.
+ See: http://allievi.sssup.it/techblog/?p=791
+ * Detect the vendor (Debian or Ubuntu) and update the configuration
+ * Port to powerpcspe. Thanks to Roland Stigge (Closes: #701587)
+ See: 31-powerpcspe.diff
+ * Fix the path detection of scan-build (Closes: #698352)
+ See: 32-scan-build-path.diff
+ * debian/patches/r600-snapshot.diff: Move backports into individual patches.
+ * debian/patches/r600-snapshot.diff: Update to mesa-9.1 git tag.
+ (Closes: #703671, #697356)
+ * Fix a typo in the detection of the vendor
+
+ [ Peter Michael Green ]
+ * Use binutils-gold only on architectures where it is actually available
+ * 33-armhf-defaults.diff Fix defaults to use correct CPU and FPU for
+ debian armhf (Closes: #704111)
+ * 34-powerpc-no-altivec.diff disable altivec by default on powerpc because
+ debian powerpc does not require altivec (patch cherry picked from ubuntu)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Thu, 14 Mar 2013 17:47:12 +0100
+
+llvm-toolchain-3.2 (1:3.2repack-1~exp3) experimental; urgency=low
+
+ * Remove package "clang". It is now provided by llvm-defaults.
+ * Fix some issues relative to the epoch change
+ * Fix a wrong path in the _lldb.so Python symlink
+ * Install cmake files to build LLVM extensions (Closes: #701153)
+ * Remove the embedded copy of libjs-jquery (Closes: #701087)
+ * Fix the install of lli manpage (Closes: #697117)
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sun, 17 Feb 2013 12:05:15 +0100
+
+llvm-toolchain-3.2 (1:3.2repack-1~exp2) experimental; urgency=low
+
+ * Install the python files for lldb. Thanks to Daniel Malea for spotting this.
+ * Update of the clean target
+ * Introduce an epoch to match the changes in bug #699899
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Wed, 13 Feb 2013 12:22:30 +0100
+
+llvm-toolchain-3.2 (3.2repack-1~exp1) experimental; urgency=low
+
+ * Build the whole LLVM toolchain at once. This includes:
+ - LLVM
+ - Clang
+ - compiler-rt
+ - lldb
+ - polly
+ * Also install clang-check & clang-tblgen in the clang-3.2 package
+ * Fix the patch detection of clang from scan-build (Closes: #698352)
+ * debian/patches/0050-powerpcspe-fp.diff: Add, hopefully fix FTBFS on
+ powerpcspe, by disabling save / restore of floating point registers which
+ don't exist on powerpcspe. Thanks to Roland Stigge for the patch.
+ (Closes: #696474)
+ * libLLVM-3.2.so.1 is now shipped only once (Closes: #696913)
+ * Enable RTTI (Closes: #697754)
+ * Introduce lldb as a new package (Closes: #698601)
+ * Add a script pollycc which will call clang with the right arguments.
+ * Use __builtin___clear_cache on ARM to fix a clang bug.
+ Thanks to Matthias Klose.
+
+ -- Sylvestre Ledru <sylvestre@debian.org> Sat, 09 Feb 2013 12:14:10 +0100
--- /dev/null
+clang/examples/*
--- /dev/null
+usr/lib/llvm-@LLVM_VERSION@/bin/clang
+usr/lib/llvm-@LLVM_VERSION@/bin/clang++
+usr/lib/llvm-@LLVM_VERSION@/bin/clang-cpp
+
+#usr/share/man/man1/clang.1 usr/share/man/man1/
+usr/lib/llvm-@LLVM_VERSION@/lib/cmake/clang/*.cmake
+usr/lib/llvm-@LLVM_VERSION@/share/clang/bash-autocomplete.sh
+
+usr/bin/clang-@LLVM_VERSION@
+usr/bin/clang++-@LLVM_VERSION@
+usr/bin/clang-cpp-@LLVM_VERSION@
+
--- /dev/null
+usr/lib/llvm-@LLVM_VERSION@/bin/clang usr/lib/llvm-@LLVM_VERSION@/bin/clang-@LLVM_VERSION@
+usr/lib/llvm-@LLVM_VERSION@/lib/cmake/clang usr/lib/cmake/clang-@LLVM_VERSION@
--- /dev/null
+# Does not link otherwise
+clang-@LLVM_VERSION@: embedded-library usr/lib/llvm-@LLVM_VERSION@/bin/clang: libjsoncpp
--- /dev/null
+clang/tools/clang-format/clang-format-@LLVM_VERSION@.py usr/share/vim/addons/syntax/
+clang/tools/clang-format/clang-format-diff-@LLVM_VERSION@ /usr/bin/
+usr/bin/clang-format-@LLVM_VERSION@
+usr/bin/git-clang-format-@LLVM_VERSION@
+usr/lib/llvm-@LLVM_VERSION@/bin/clang-format
+usr/lib/llvm-@LLVM_VERSION@/bin/git-clang-format
+usr/lib/llvm-@LLVM_VERSION@/share/clang/clang-format-diff.py usr/share/clang/clang-format-@LLVM_VERSION@/
+usr/lib/llvm-@LLVM_VERSION@/share/clang/clang-format.py usr/share/clang/clang-format-@LLVM_VERSION@/
+usr/lib/llvm-@LLVM_VERSION@/share/clang/clang-format.el usr/share/emacs/site-lisp/clang-format-@LLVM_VERSION@/
+usr/lib/llvm-@LLVM_VERSION@/share/clang/clang-format-sublime.py usr/share/clang/clang-format-@LLVM_VERSION@/
--- /dev/null
+# I know but well...
+clang-format-@LLVM_VERSION@: manpage-has-useless-whatis-entry usr/share/man/man1/clang-format-diff-@LLVM_VERSION@.1.gz
+clang-format-@LLVM_VERSION@: manpage-has-useless-whatis-entry usr/share/man/man1/clang-format-@LLVM_VERSION@.1.gz
+
--- /dev/null
+debian/man/clang-format-diff-@LLVM_VERSION@.1
+debian/man/clang-format-@LLVM_VERSION@.1
+
--- /dev/null
+usr/lib/llvm-@LLVM_VERSION@/bin/clang-tidy
+usr/lib/llvm-@LLVM_VERSION@/share/clang/run-clang-tidy.py
+usr/lib/llvm-@LLVM_VERSION@/share/clang/clang-tidy-diff.py
+
+usr/bin/clang-tidy-@LLVM_VERSION@
--- /dev/null
+usr/lib/llvm-@LLVM_VERSION@/share/clang/run-clang-tidy.py usr/bin/run-clang-tidy-@LLVM_VERSION@.py
+usr/lib/llvm-@LLVM_VERSION@/share/clang/run-clang-tidy.py usr/bin/run-clang-tidy-@LLVM_VERSION@
+usr/lib/llvm-@LLVM_VERSION@/share/clang/clang-tidy-diff.py usr/bin/clang-tidy-diff-@LLVM_VERSION@.py
+
--- /dev/null
+# I know but well...
+clang-tidy-@LLVM_VERSION@: manpage-has-useless-whatis-entry usr/share/man/man1/clang-tidy-@LLVM_VERSION@.1.gz
+
--- /dev/null
+debian/man/clang-tidy-@LLVM_VERSION@.1
--- /dev/null
+usr/lib/llvm-@LLVM_VERSION@/bin/clang-check
+usr/lib/llvm-@LLVM_VERSION@/bin/clang-apply-replacements
+usr/lib/llvm-@LLVM_VERSION@/bin/clang-query
+usr/lib/llvm-@LLVM_VERSION@/bin/clang-rename
+usr/lib/llvm-@LLVM_VERSION@/share/clang/clang-rename.el
+usr/lib/llvm-@LLVM_VERSION@/share/clang/clang-rename.py
+usr/lib/llvm-@LLVM_VERSION@/bin/scan-view
+usr/lib/llvm-@LLVM_VERSION@/bin/scan-build
+usr/lib/llvm-@LLVM_VERSION@/bin/clang-cl
+usr/lib/llvm-@LLVM_VERSION@/bin/sancov
+usr/lib/llvm-@LLVM_VERSION@/share/scan-view/
+usr/lib/llvm-@LLVM_VERSION@/share/scan-build/
+usr/lib/llvm-@LLVM_VERSION@/share/man/man1/scan-build.1
+usr/lib/llvm-@LLVM_VERSION@/libexec/ccc-analyzer
+usr/lib/llvm-@LLVM_VERSION@/libexec/c++-analyzer
+usr/lib/llvm-@LLVM_VERSION@/bin/clang-offload-bundler
+usr/lib/llvm-@LLVM_VERSION@/bin/clang-reorder-fields
+usr/lib/llvm-@LLVM_VERSION@/bin/clang-change-namespace
+usr/lib/llvm-@LLVM_VERSION@/bin/clang-import-test
+usr/lib/llvm-@LLVM_VERSION@/bin/modularize
+usr/lib/llvm-@LLVM_VERSION@/bin/c-index-test
+usr/lib/llvm-@LLVM_VERSION@/bin/clang-include-fixer
+usr/lib/llvm-@LLVM_VERSION@/bin/find-all-symbols
+usr/lib/llvm-@LLVM_VERSION@/bin/clangd
+usr/lib/llvm-@LLVM_VERSION@/bin/clang-refactor
+usr/lib/llvm-@LLVM_VERSION@/bin/clang-func-mapping
+
+tools/clang/tools/scan-build-@LLVM_VERSION@ usr/share/clang/
+tools/clang/tools/scan-build-py-@LLVM_VERSION@ usr/share/clang/
+tools/clang/tools/scan-view-@LLVM_VERSION@ usr/share/clang/
+
+usr/lib/llvm-@LLVM_VERSION@/share/clang/run-find-all-symbols.py
+usr/lib/llvm-@LLVM_VERSION@/share/clang/clang-include-fixer.py
+usr/lib/llvm-@LLVM_VERSION@/share/clang/clang-include-fixer.el
+usr/bin/clang-check-@LLVM_VERSION@
+usr/bin/clang-apply-replacements-@LLVM_VERSION@
+usr/bin/clang-query-@LLVM_VERSION@
+usr/bin/clang-rename-@LLVM_VERSION@
+usr/bin/sancov-@LLVM_VERSION@
+usr/bin/clang-cl-@LLVM_VERSION@
+usr/bin/modularize-@LLVM_VERSION@
+usr/bin/scan-build-@LLVM_VERSION@
+usr/bin/scan-view-@LLVM_VERSION@
+usr/bin/c-index-test-@LLVM_VERSION@
+usr/bin/clang-offload-bundler-@LLVM_VERSION@
+usr/bin/clang-reorder-fields-@LLVM_VERSION@
+usr/bin/find-all-symbols-@LLVM_VERSION@
+usr/bin/clang-include-fixer-@LLVM_VERSION@
+usr/bin/clang-change-namespace-@LLVM_VERSION@
+usr/bin/clang-import-test-@LLVM_VERSION@
+usr/bin/clangd-@LLVM_VERSION@
+usr/bin/clang-refactor-@LLVM_VERSION@
+usr/bin/clang-func-mapping-@LLVM_VERSION@
+
--- /dev/null
+usr/share/clang/scan-build-@LLVM_VERSION@/bin/scan-build usr/bin/scan-build-@LLVM_VERSION@
+usr/share/clang/scan-build-py-@LLVM_VERSION@/bin/scan-build usr/bin/scan-build-py-@LLVM_VERSION@
+usr/share/clang/scan-view-@LLVM_VERSION@/bin/scan-view usr/bin/scan-view-@LLVM_VERSION@
--- /dev/null
+# I know but well...
+clang-tools-@LLVM_VERSION@: manpage-has-useless-whatis-entry usr/share/man/man1/clang-check.1.gz
+clang-tools-@LLVM_VERSION@: manpage-has-useless-whatis-entry usr/share/man/man1/scan-view.1.gz
+clang-tools-@LLVM_VERSION@: manpage-has-useless-whatis-entry usr/share/man/man1/clang-apply-replacements-@LLVM_VERSION@.1.gz
+clang-tools-@LLVM_VERSION@: manpage-has-useless-whatis-entry usr/share/man/man1/clang-check-@LLVM_VERSION@.1.gz
+clang-tools-@LLVM_VERSION@: manpage-has-useless-whatis-entry usr/share/man/man1/scan-view-@LLVM_VERSION@.1.gz
--- /dev/null
+clang/tools/scan-build/man/scan-build-@LLVM_VERSION@.1
+debian/man/clang-check-@LLVM_VERSION@.1
+debian/man/clang-rename-@LLVM_VERSION@.1
+debian/man/clang-query-@LLVM_VERSION@.1
+debian/man/clang-apply-replacements-@LLVM_VERSION@.1
+debian/man/sancov-@LLVM_VERSION@.1
+debian/man/scan-view-@LLVM_VERSION@.1
+debian/man/modularize-@LLVM_VERSION@.1
+debian/man/find-all-symbols-@LLVM_VERSION@.1
+debian/man/clang-include-fixer-@LLVM_VERSION@.1
+debian/man/clang-reorder-fields-@LLVM_VERSION@.1
--- /dev/null
+Source: llvm-toolchain-6.0
+Section: devel
+Priority: optional
+Maintainer: LLVM Packaging Team <pkg-llvm-team@lists.alioth.debian.org>
+Uploaders: Sylvestre Ledru <sylvestre@debian.org>, Gianfranco Costamagna <locutusofborg@debian.org>
+Build-Depends: debhelper (>= 9.0), cmake, chrpath, texinfo, sharutils,
+ libffi-dev (>= 3.0.9),
+ lsb-release, patchutils, diffstat, xz-utils, python2-dev,
+ libedit-dev, libncurses5-dev, swig, python-six, binutils-dev,
+ libjsoncpp-dev, pkg-config,
+ lcov, procps, help2man, zlib1g-dev,
+ g++-multilib [amd64 i386 kfreebsd-amd64 mips mips64 mips64el mipsel powerpc ppc64 s390 s390x sparc sparc64 x32],
+ libjs-mathjax
+# ocaml-nox [amd64 arm64 armel armhf i386 ppc64el s390x],
+# ocaml-findlib [amd64 arm64 armel armhf i386 ppc64el s390x],
+# libctypes-ocaml-dev [amd64 arm64 armel armhf i386 ppc64el s390x],
+# dh-ocaml [amd64 arm64 armel armhf i386 ppc64el s390x],
+Build-Conflicts: oprofile, ocaml, libllvm-3.8-ocaml-dev, libllvm-3.9-ocaml-dev
+Standards-Version: 4.2.0
+Homepage: https://www.llvm.org/
+Vcs-Git: https://salsa.debian.org/pkg-llvm-team/llvm-toolchain.git -b 6.0
+Vcs-Browser: https://salsa.debian.org/pkg-llvm-team/llvm-toolchain/tree/6.0
+
+# ------------- clang -------------
+
+Package: clang-6.0
+Architecture: any
+Depends: ${shlibs:Depends}, ${misc:Depends}, ${dep:devlibs},
+ ${dep:devlibs-objc}, libclang-common-6.0-dev (= ${binary:Version}),
+ libclang1-6.0 (= ${binary:Version}), libc6-dev, binutils
+Provides: c-compiler, objc-compiler, c++-compiler
+Recommends: llvm-6.0-dev, python2, libomp-dev
+Suggests: gnustep, gnustep-devel
+Description: C, C++ and Objective-C compiler
+ Clang project is a C, C++, Objective C and Objective C++ front-end
+ based on the LLVM compiler. Its goal is to offer a replacement to the
+ GNU Compiler Collection (GCC).
+ .
+ Clang implements all of the ISO C++ 1998, 11 and 14 standards and also
+ provides most of the support of C++17.
+
+Package: clang-tools-6.0
+Architecture: any
+Depends: ${shlibs:Depends}, ${misc:Depends}, clang-6.0 (= ${binary:Version})
+Description: clang-based tools for C/C++ developments
+ Clang project is a C, C++, Objective C and Objective C++ front-end
+ based on the LLVM compiler. Its goal is to offer a replacement to the
+ GNU Compiler Collection (GCC).
+ .
+ Clang implements all of the ISO C++ 1998, 11 and 14 standards and also
+ provides most of the support of C++17.
+ .
+ This package contains some clang-based tools like scan-build, clangd,
+ clang-cl, etc.
+
+Package: clang-format-6.0
+Architecture: any
+Depends: ${shlibs:Depends}, ${misc:Depends}, python2,
+ libllvm6.0 (= ${binary:Version})
+Description: Tool to format C/C++/Obj-C code
+ Clang-format is both a library and a stand-alone tool with the goal of
+ automatically reformatting C++ sources files according to configurable
+ style guides. To do so, clang-format uses Clang's Lexer to transform an
+ input file into a token stream and then changes all the whitespace around
+ those tokens. The goal is for clang-format to both serve both as a user
+ tool (ideally with powerful IDE integrations) and part of other
+ refactoring tools, e.g. to do a reformatting of all the lines changed
+ during a renaming.
+ .
+ This package also provides vim and emacs plugins.
+
+Package: clang-tidy-6.0
+Architecture: any
+Depends: ${shlibs:Depends}, ${misc:Depends}, python2,
+ libllvm6.0 (= ${binary:Version}), libclang-common-6.0-dev,
+ clang-tools-6.0, python-yaml
+Replaces: clang-modernize-6.0, clang-6.0 (<< 1:6.0~svn250696-1)
+Breaks: clang-modernize-6.0, clang-6.0 (<< 1:6.0~svn250696-1)
+Description: clang-based C++ linter tool
+ Provide an extensible framework for diagnosing and fixing typical programming
+ errors, like style violations, interface misuse, or bugs that can be deduced
+ via static analysis. clang-tidy is modular and provides a convenient interface
+ for writing new checks.
+
+Package: libclang1-6.0
+Section: libs
+Architecture: any
+Depends: ${shlibs:Depends}, ${misc:Depends}
+Pre-Depends: ${misc:Pre-Depends}
+Description: C interface to the clang library
+ Clang project is a C, C++, Objective C and Objective C++ front-end
+ based on the LLVM compiler. Its goal is to offer a replacement to the
+ GNU Compiler Collection (GCC).
+ .
+ Clang implements all of the ISO C++ 1998, 11 and 14 standards and also
+ provides most of the support of C++17.
+ .
+ This package contains the clang library.
+ .
+ The C Interface to Clang provides a relatively small API that exposes
+ facilities for parsing source code into an abstract syntax tree (AST),
+ loading already-parsed ASTs, traversing the AST, associating physical source
+ locations with elements within the AST, and other facilities that support
+ Clang-based development tools.
+
+Package: libclang-6.0-dev
+Architecture: any
+Section: libdevel
+Depends: ${shlibs:Depends}, ${misc:Depends}, ${dep:devlibs},
+ ${dep:devlibs-objc}, libclang1-6.0 (= ${binary:Version}),
+ libclang-common-6.0-dev (= ${binary:Version})
+Description: clang library - Development package
+ Clang project is a C, C++, Objective C and Objective C++ front-end
+ based on the LLVM compiler. Its goal is to offer a replacement to the
+ GNU Compiler Collection (GCC).
+ .
+ Clang implements all of the ISO C++ 1998, 11 and 14 standards and also
+ provides most of the support of C++17.
+ .
+ This package contains the clang headers to develop extensions over
+ libclang1-6.0.
+
+Package: libclang-common-6.0-dev
+Architecture: any
+Section: libdevel
+Depends: ${shlibs:Depends}, ${misc:Depends}, libllvm6.0 (= ${binary:Version})
+Description: clang library - Common development package
+ Clang project is a C, C++, Objective C and Objective C++ front-end
+ based on the LLVM compiler. Its goal is to offer a replacement to the
+ GNU Compiler Collection (GCC).
+ .
+ Clang implements all of the ISO C++ 1998, 11 and 14 standards and also
+ provides most of the support of C++17.
+ .
+ This package contains the clang generic headers and some libraries
+ (profiling, etc).
+
+
+Package: libfuzzer-6.0-dev
+Architecture: linux-any
+Section: libdevel
+Depends: ${shlibs:Depends}, ${misc:Depends}, clang-6.0 (= ${binary:Version})
+Description: Library for coverage-guided fuzz testing
+ LibFuzzer is a library for in-process, coverage-guided, evolutionary fuzzing
+ of other libraries.
+ .
+ LibFuzzer is similar in concept to American Fuzzy Lop (AFL), but it performs
+ all of its fuzzing inside a single process. This in-process fuzzing can be
+ more restrictive and fragile, but is potentially much faster as there is no
+ overhead for process start-up.
+ .
+ The fuzzer is linked with the library under test, and feeds fuzzed inputs to
+ the library via a specific fuzzing entrypoint (aka 'target function'); the
+ fuzzer then tracks which areas of the code are reached, and generates mutations
+ on the corpus of input data in order to maximize the code coverage. The code
+ coverage information for libFuzzer is provided by LLVM's SanitizerCoverage
+ instrumentation.
+
+
+Package: python-clang-6.0
+Section: python
+Architecture: any
+Depends: ${shlibs:Depends}, ${misc:Depends}, python2
+Replaces: python-clang-3.8, python-clang-3.9, python-clang-x.y
+Breaks: python-clang-3.8, python-clang-3.9
+Conflicts: python-clang-x.y
+Provides: python-clang-x.y
+Description: Clang Python Bindings
+ Clang project is a C, C++, Objective C and Objective C++ front-end
+ based on the LLVM compiler. Its goal is to offer a replacement to the
+ GNU Compiler Collection (GCC).
+ .
+ Clang implements all of the ISO C++ 1998, 11 and 14 standards and also
+ provides most of the support of C++17.
+ .
+ This binding package provides access to the Clang compiler and libraries.
+
+
+Package: clang-6.0-examples
+Architecture: any
+Section: doc
+Depends: ${shlibs:Depends}, ${misc:Depends}
+Description: Clang examples
+ Clang project is a C, C++, Objective C and Objective C++ front-end
+ based on the LLVM compiler. Its goal is to offer a replacement to the
+ GNU Compiler Collection (GCC).
+ .
+ Clang implements all of the ISO C++ 1998, 11 and 14 standards and also
+ provides most of the support of C++17.
+ .
+ This package contains the clang examples.
+
+# ------------- LLVM -------------
+
+Package: libllvm6.0
+Architecture: any
+Section: libs
+Depends: ${shlibs:Depends}, ${misc:Depends}
+Pre-Depends: ${misc:Pre-Depends}
+Multi-Arch: same
+Breaks: libllvm3.9v4
+Replaces: libllvm3.9v4
+Description: Modular compiler and toolchain technologies, runtime library
+ LLVM is a collection of libraries and tools that make it easy to build
+ compilers, optimizers, just-in-time code generators, and many other
+ compiler-related programs.
+ .
+ This package contains the LLVM runtime library.
+
+Package: llvm-6.0
+Architecture: any
+Depends: llvm-6.0-runtime (= ${binary:Version}), ${shlibs:Depends}, ${misc:Depends}
+Recommends: llvm-6.0-dev
+Description: Modular compiler and toolchain technologies
+ LLVM is a collection of libraries and tools that make it easy to build
+ compilers, optimizers, just-in-time code generators, and many other
+ compiler-related programs.
+ .
+ LLVM uses a single, language-independent virtual instruction set both
+ as an offline code representation (to communicate code between
+ compiler phases and to run-time systems) and as the compiler internal
+ representation (to analyze and transform programs). This persistent
+ code representation allows a common set of sophisticated compiler
+ techniques to be applied at compile-time, link-time, install-time,
+ run-time, or "idle-time" (between program runs).
+ .
+ The strengths of the LLVM infrastructure are its extremely
+ simple design (which makes it easy to understand and use),
+ source-language independence, powerful mid-level optimizer, automated
+ compiler debugging support, extensibility, and its stability and
+ reliability. LLVM is currently being used to host a wide variety of
+ academic research projects and commercial projects. LLVM includes C
+ and C++ front-ends, a front-end for a Forth-like language (Stacker),
+ a young scheme front-end, and Java support is in development. LLVM can
+ generate code for X86, SparcV9, PowerPC or many other architectures.
+
+Package: llvm-6.0-runtime
+Architecture: any
+Depends: binfmt-support, ${shlibs:Depends}, ${misc:Depends}
+Conflicts: llvm (<< 2.7-1)
+Replaces: llvm (<< 2.7-1)
+Description: Modular compiler and toolchain technologies, IR interpreter
+ LLVM is a collection of libraries and tools that make it easy to build
+ compilers, optimizers, just-in-time code generators, and many other
+ compiler-related programs.
+ .
+ LLVM uses a single, language-independent virtual instruction set both
+ as an offline code representation (to communicate code between
+ compiler phases and to run-time systems) and as the compiler internal
+ representation (to analyze and transform programs). This persistent
+ code representation allows a common set of sophisticated compiler
+ techniques to be applied at compile-time, link-time, install-time,
+ run-time, or "idle-time" (between program runs).
+ .
+ This package provides the minimal required to execute programs in LLVM
+ format.
+
+Package: llvm-6.0-dev
+Architecture: any
+Depends: ${shlibs:Depends}, libffi-dev (>= 3.0.9), ${misc:Depends},
+ llvm-6.0 (= ${binary:Version}), libllvm6.0 (= ${binary:Version}), libtinfo-dev
+Replaces: llvm (<< 2.2-3)
+Description: Modular compiler and toolchain technologies, libraries and headers
+ LLVM is a collection of libraries and tools that make it easy to build
+ compilers, optimizers, just-in-time code generators, and many other
+ compiler-related programs.
+ .
+ LLVM uses a single, language-independent virtual instruction set both
+ as an offline code representation (to communicate code between
+ compiler phases and to run-time systems) and as the compiler internal
+ representation (to analyze and transform programs). This persistent
+ code representation allows a common set of sophisticated compiler
+ techniques to be applied at compile-time, link-time, install-time,
+ run-time, or "idle-time" (between program runs).
+ .
+ This package provides the libraries and headers to develop applications
+ using llvm.
+
+Package: llvm-6.0-tools
+Architecture: any
+Depends: ${shlibs:Depends}, ${misc:Depends}, python2,
+ llvm-6.0-dev (= ${binary:Version})
+Description: Modular compiler and toolchain technologies, tools
+ LLVM is a collection of libraries and tools that make it easy to build
+ compilers, optimizers, just-in-time code generators, and many other
+ compiler-related programs.
+ .
+ LLVM uses a single, language-independent virtual instruction set both
+ as an offline code representation (to communicate code between
+ compiler phases and to run-time systems) and as the compiler internal
+ representation (to analyze and transform programs). This persistent
+ code representation allows a common set of sophisticated compiler
+ techniques to be applied at compile-time, link-time, install-time,
+ run-time, or "idle-time" (between program runs).
+ .
+ This package provides tools for testing.
+
+# Package: libllvm-6.0-ocaml-dev
+# Section: ocaml
+# Architecture: amd64 arm64 armel armhf i386 ppc64el s390x
+# Depends: ${shlibs:Depends}, ${misc:Depends}, ${ocaml:Depends}, llvm-6.0-dev (= ${binary:Version})
+# Replaces: libllvm-x.y-ocaml-dev
+# Conflicts: libllvm-x.y-ocaml-dev
+# Provides: ${ocaml:Provides}, libllvm-x.y-ocaml-dev
+# Description: Modular compiler and toolchain technologies, OCaml bindings
+# LLVM is a collection of libraries and tools that make it easy to build
+# compilers, optimizers, just-in-time code generators, and many other
+# compiler-related programs.
+# .
+# LLVM uses a single, language-independent virtual instruction set both
+# as an offline code representation (to communicate code between
+# compiler phases and to run-time systems) and as the compiler internal
+# representation (to analyze and transform programs). This persistent
+# code representation allows a common set of sophisticated compiler
+# techniques to be applied at compile-time, link-time, install-time,
+# run-time, or "idle-time" (between program runs).
+# .
+# This package provides the OCaml bindings to develop applications using llvm.
+
+Package: llvm-6.0-examples
+Section: doc
+Architecture: all
+Depends: ${misc:Depends}, llvm-6.0-dev (>= ${source:Version}), llvm-6.0-dev (<< ${source:Version}+c~)
+Description: Modular compiler and toolchain technologies, examples
+ LLVM is a collection of libraries and tools that make it easy to build
+ compilers, optimizers, just-in-time code generators, and many other
+ compiler-related programs.
+ .
+ LLVM uses a single, language-independent virtual instruction set both
+ as an offline code representation (to communicate code between
+ compiler phases and to run-time systems) and as the compiler internal
+ representation (to analyze and transform programs). This persistent
+ code representation allows a common set of sophisticated compiler
+ techniques to be applied at compile-time, link-time, install-time,
+ run-time, or "idle-time" (between program runs).
+ .
+ This package contains examples for using LLVM, both in developing
+ extensions to LLVM and in using it to compile code.
+
+
+# ------------- lld -------------
+
+Package: lld-6.0
+Architecture: amd64 arm64 armel armhf i386 mips mipsel mips64el ppc64el kfreebsd-amd64 kfreebsd-i386 s390 sparc alpha hppa m68k powerpcspe ppc64 sh4 sparc64 x32
+# ia64 hurd powerpc have been removed
+Depends: ${shlibs:Depends}, ${misc:Depends}, libllvm6.0 (= ${binary:Version}), llvm-6.0-dev
+Pre-Depends: ${misc:Pre-Depends}
+Description: LLVM-based linker
+ LLD is a new, high-performance linker. It is built as a set of reusable
+ components which highly leverage existing libraries in the larger LLVM
+ Project.
+
+Package: liblld-6.0
+Architecture: amd64 arm64 armel armhf i386 mips mipsel mips64el ppc64el kfreebsd-amd64 kfreebsd-i386 s390 sparc alpha hppa m68k powerpcspe ppc64 sh4 sparc64 x32
+# ia64 hurd powerpc have been removed
+Depends: ${shlibs:Depends}, ${misc:Depends}, libllvm6.0 (= ${binary:Version})
+Pre-Depends: ${misc:Pre-Depends}
+Section: libs
+Description: LLVM-based linker, library
+ LLD is a new, high-performance linker. It is built as a set of reusable
+ components which highly leverage existing libraries in the larger LLVM
+ Project.
+ .
+ This package contains the LLD runtime library.
+
+Package: liblld-6.0-dev
+Section: libdevel
+Architecture: amd64 arm64 armel armhf i386 mips mipsel mips64el ppc64el kfreebsd-amd64 kfreebsd-i386 s390 sparc alpha hppa m68k powerpcspe ppc64 sh4 sparc64 x32
+# ia64 hurd powerpc have been removed
+Depends: ${shlibs:Depends}, ${misc:Depends}, lld-6.0 (= ${binary:Version}),
+ liblld-6.0 (= ${binary:Version})
+Pre-Depends: ${misc:Pre-Depends}
+Description: LLVM-based linker, header files
+ LLD is a new, high-performance linker. It is built as a set of reusable
+ components which highly leverage existing libraries in the larger LLVM
+ Project.
+ .
+ This package provides the header files to build extension over lld.
+
+
+# ------------- lldb -------------
+
+Package: lldb-6.0
+Architecture: amd64 arm64 armel armhf i386 mips mipsel mips64el ppc64el kfreebsd-amd64 kfreebsd-i386 s390 sparc hppa m68k sh4 x32
+# ia64 hurd powerpc powerpcspe ppc64 alpha s390x sparc64 have been removed
+Depends: ${shlibs:Depends}, ${misc:Depends}, libllvm6.0 (= ${binary:Version}), llvm-6.0-dev,
+ python-lldb-6.0
+Pre-Depends: ${misc:Pre-Depends}
+Description: Next generation, high-performance debugger
+ LLDB is a next generation, high-performance debugger. It is built as a set of
+ reusable components which highly leverage existing libraries in the larger LLVM
+ Project, such as the Clang expression parser and LLVM disassembler.
+
+Package: liblldb-6.0
+Architecture: amd64 arm64 armel armhf i386 mips mipsel mips64el ppc64el kfreebsd-amd64 kfreebsd-i386 s390 sparc hppa m68k sh4 x32
+# ia64 hurd powerpc powerpcspe ppc64 alpha s390x sparc64 have been removed
+Depends: ${shlibs:Depends}, ${misc:Depends}, libllvm6.0 (= ${binary:Version})
+Pre-Depends: ${misc:Pre-Depends}
+Section: libs
+Replaces: lldb-6.0 (<= 1:6.0~svn215195-2)
+Breaks: lldb-6.0 (<< 1:6.0~svn215195-2)
+Description: Next generation, high-performance debugger, library
+ LLDB is a next generation, high-performance debugger. It is built as a set of
+ reusable components which highly leverage existing libraries in the larger LLVM
+ Project, such as the Clang expression parser and LLVM disassembler.
+ .
+ This package contains the LLDB runtime library.
+
+Package: python-lldb-6.0
+Section: python
+Architecture: amd64 arm64 armel armhf i386 mips mipsel mips64el ppc64el kfreebsd-amd64 kfreebsd-i386 s390 sparc hppa m68k sh4 x32
+# ia64 hurd powerpc powerpcspe ppc64 alpha s390x sparc64 have been removed
+Depends: ${shlibs:Depends}, ${misc:Depends}, liblldb-6.0-dev, python2, python-six
+Conflicts: python-lldb-3.8, python-lldb-3.9, python-lldb-x.y
+Replaces: python-lldb-x.y
+Provides: python-lldb-x.y
+Pre-Depends: ${misc:Pre-Depends}
+Description: Next generation, high-performance debugger, python lib
+ LLDB is a next generation, high-performance debugger. It is built as a set of
+ reusable components which highly leverage existing libraries in the larger LLVM
+ Project, such as the Clang expression parser and LLVM disassembler.
+ .
+ This binding package provides access to lldb.
+
+
+Package: liblldb-6.0-dev
+Section: libdevel
+Architecture: amd64 arm64 armel armhf i386 mips mipsel mips64el ppc64el kfreebsd-amd64 kfreebsd-i386 s390 sparc hppa m68k sh4 x32
+# ia64 hurd powerpc powerpcspe ppc64 alpha s390x sparc64 have been removed
+Depends: ${shlibs:Depends}, ${misc:Depends}, lldb-6.0 (= ${binary:Version})
+Replaces: lldb-6.0-dev (<= 1:6.0~svn215195-2)
+Breaks: lldb-6.0-dev (<< 1:6.0~svn215195-2)
+Pre-Depends: ${misc:Pre-Depends}
+Description: Next generation, high-performance debugger, header files
+ LLDB is a next generation, high-performance debugger. It is built as a set of
+ reusable components which highly leverage existing libraries in the larger LLVM
+ Project, such as the Clang expression parser and LLVM disassembler.
+ .
+ This package provides the header files to build extension over lldb.
--- /dev/null
+Format: https://www.debian.org/doc/packaging-manuals/copyright-format/1.0/
+Upstream-Name: LLVM/Clang
+Source: https://llvm.org/releases/download.html
+
+Files: *
+Copyright: 2003-2017 University of Illinois at Urbana-Champaign.
+License: U-OF-I-BSD-LIKE
+
+Files: */install-sh
+Copyright: 1994 X Consortium
+License: LLVM
+ This script is licensed under the LLVM license, with the following
+ additional copyrights and restrictions:
+ .
+ Copyright 1991 by the Massachusetts Institute of Technology
+ .
+ Permission to use, copy, modify, distribute, and sell this software and its
+ documentation for any purpose is hereby granted without fee, provided that
+ the above copyright notice appear in all copies and that both that
+ copyright notice and this permission notice appear in supporting
+ documentation, and that the name of M.I.T. not be used in advertising or
+ publicity pertaining to distribution of the software without specific,
+ written prior permission. M.I.T. makes no representations about the
+ suitability of this software for any purpose. It is provided "as is"
+ without express or implied warranty.
+ .
+ ==============================================================================
+ LLVM Release License
+ ==============================================================================
+ University of Illinois/NCSA
+ Open Source License
+ .
+ Copyright (c) 2003-2013 University of Illinois at Urbana-Champaign.
+ All rights reserved.
+ .
+ Developed by:
+ .
+ LLVM Team
+ .
+ University of Illinois at Urbana-Champaign
+ .
+ http://llvm.org
+ .
+ Permission is hereby granted, free of charge, to any person obtaining a copy of
+ this software and associated documentation files (the "Software"), to deal with
+ the Software without restriction, including without limitation the rights to
+ use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
+ of the Software, and to permit persons to whom the Software is furnished to do
+ so, subject to the following conditions:
+ .
+ * Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimers.
+ .
+ * Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions and the following disclaimers in the
+ documentation and/or other materials provided with the distribution.
+ .
+ * Neither the names of the LLVM Team, University of Illinois at
+ Urbana-Champaign, nor the names of its contributors may be used to
+ endorse or promote products derived from this Software without specific
+ prior written permission.
+ .
+ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
+ SOFTWARE.
+
+Files: clang/lib/Headers/*
+Copyright: 2003-2007 University of Illinois at Urbana-Champaign
+License: Expat
+
+Files: clang/lib/Headers/iso646.h
+Copyright: 2008 Eli Friedman
+License: Expat
+
+Files: clang/lib/Headers/limits.h
+Copyright: 2009 Chris Lattner
+License: Expat
+
+Files: clang/lib/Headers/stdarg.h
+Copyright: 2008 Eli Friedman
+License: Expat
+
+Files: clang/lib/Headers/stdbool.h
+Copyright: 2008 Eli Friedman
+License: Expat
+
+Files: clang/lib/Headers/stddef.h
+Copyright: 2008 Eli Friedman
+License: Expat
+
+Files: clang/lib/Headers/stdint.h
+Copyright: 2009 Chris Lattner
+License: Expat
+
+Files: clang/lib/Headers/tgmath.h
+Copyright: 2009 Howard Hinnant
+License: Expat
+
+Files: compiler-rt/*
+Copyright: 2009-2013 Craig van Vliet
+ 2009-2013 Edward O'Callaghan
+ 2009-2013 Howard Hinnant
+License: U-OF-I-BSD-LIKE or MIT
+
+Files: compiler-rt/lib/BlocksRuntime/Block.h
+Copyright: 2008-2010 Apple, Inc.
+License: MIT
+
+Files: compiler-rt/lib/BlocksRuntime/Block_private.h
+Copyright: 2008-2010 Apple, Inc.
+License: MIT
+
+Files: compiler-rt/lib/BlocksRuntime/data.c
+Copyright: 2008-2010 Apple, Inc.
+License: MIT
+
+Files: compiler-rt/lib/BlocksRuntime/runtime.c
+Copyright: 2008-2010 Apple, Inc.
+License: MIT
+
+Files: include/llvm/Support/*
+Copyright: 2003-2013 University of Illinois at Urbana-Champaign.
+ Copyright (C) 2004 eXtensible Systems, Inc.
+License: U-OF-I-BSD-LIKE
+
+Files: lib/Support/reg*
+Copyright: 1992, 1993, 1994 Henry Spencer
+ 1992, 1993, 1994 The Regents of the University of California
+License: BSD-3-clause
+
+Files: lib/Support/MD5.cpp llvm/include/llvm/Support/MD5.h
+Copyright: 2001 Alexander Peslyak aka Solar Designer <solar at openwall.com>
+License: solar-public-domain
+ This software was written by Alexander Peslyak in 2001. No copyright is
+ claimed, and the software is hereby placed in the public domain.
+ In case this attempt to disclaim copyright and place the software in the
+ public domain is deemed null and void, then the software is
+ Copyright (c) 2001 Alexander Peslyak and it is hereby released to the
+ general public under the following terms:
+ .
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted.
+ .
+ * There's ABSOLUTELY NO WARRANTY, express or implied.
+
+Files: lib/Target/ARM/*
+Copyright: ARM Limited
+License: ARM
+ ARM Limited
+ .
+ Software Grant License Agreement ("Agreement")
+ .
+ Except for the license granted herein to you, ARM Limited ("ARM") reserves all
+ right, title, and interest in and to the Software (defined below).
+ .
+ Definition
+ .
+ "Software" means the code and documentation as well as any original work of
+ authorship, including any modifications or additions to an existing work, that
+ is intentionally submitted by ARM to llvm.org (http://llvm.org) ("LLVM") for
+ inclusion in, or documentation of, any of the products owned or managed by LLVM
+ (the "Work"). For the purposes of this definition, "submitted" means any form of
+ electronic, verbal, or written communication sent to LLVM or its
+ representatives, including but not limited to communication on electronic
+ mailing lists, source code control systems, and issue tracking systems that are
+ managed by, or on behalf of, LLVM for the purpose of discussing and improving
+ the Work, but excluding communication that is conspicuously marked otherwise.
+ .
+ 1. Grant of Copyright License. Subject to the terms and conditions of this
+ Agreement, ARM hereby grants to you and to recipients of the Software
+ distributed by LLVM a perpetual, worldwide, non-exclusive, no-charge,
+ royalty-free, irrevocable copyright license to reproduce, prepare derivative
+ works of, publicly display, publicly perform, sublicense, and distribute the
+ Software and such derivative works.
+ .
+ 2. Grant of Patent License. Subject to the terms and conditions of this
+ Agreement, ARM hereby grants you and to recipients of the Software
+ distributed by LLVM a perpetual, worldwide, non-exclusive, no-charge,
+ royalty-free, irrevocable (except as stated in this section) patent license
+ to make, have made, use, offer to sell, sell, import, and otherwise transfer
+ the Work, where such license applies only to those patent claims licensable
+ by ARM that are necessarily infringed by ARM's Software alone or by
+ combination of the Software with the Work to which such Software was
+ submitted. If any entity institutes patent litigation against ARM or any
+ other entity (including a cross-claim or counterclaim in a lawsuit) alleging
+ that ARM's Software, or the Work to which ARM has contributed constitutes
+ direct or contributory patent infringement, then any patent licenses granted
+ to that entity under this Agreement for the Software or Work shall terminate
+ as of the date such litigation is filed.
+ .
+ Unless required by applicable law or agreed to in writing, the software is
+ provided on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
+ either express or implied, including, without limitation, any warranties or
+ conditions of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A
+ PARTICULAR PURPOSE.
+
+Files: lldb/*
+Copyright: 2010, 2012 Apple Inc.
+License: NCSA
+ University of Illinois/NCSA
+ Open Source License
+ .
+ Copyright (c) 2010 Apple Inc.
+ All rights reserved.
+ .
+ Developed by:
+ .
+ LLDB Team
+ .
+ http://lldb.llvm.org/
+ .
+ Permission is hereby granted, free of charge, to any person obtaining a copy of
+ this software and associated documentation files (the "Software"), to deal with
+ the Software without restriction, including without limitation the rights to
+ use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
+ of the Software, and to permit persons to whom the Software is furnished to do
+ so, subject to the following conditions:
+ .
+ * Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimers.
+ .
+ * Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions and the following disclaimers in the
+ documentation and/or other materials provided with the distribution.
+ .
+ * Neither the names of the LLDB Team, copyright holders, nor the names of
+ its contributors may be used to endorse or promote products derived from
+ this Software without specific prior written permission.
+ .
+ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
+ SOFTWARE.
+
+Files: lldb/test/pexpect-2.4/*
+Copyright: 2008 Noah Spurrier
+License: Expat
+
+License: Expat
+ .
+ Permission is hereby granted, free of charge, to any person obtaining a copy
+ of this software and associated documentation files (the "Software"), to deal
+ in the Software without restriction, including without limitation the rights
+ to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ copies of the Software, and to permit persons to whom the Software is
+ furnished to do so, subject to the following conditions:
+ .
+ The above copyright notice and this permission notice shall be included in all
+ copies or substantial portions of the Software.
+ .
+ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
+ IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
+ DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+Files: lldb/test/unittest2/*
+Copyright: 1999-2003 Steve Purcell
+ 2003-2010 Python Software Foundation
+License: Python
+ This module is free software, and you may redistribute it and/or modify
+ it under the same terms as Python itself, so long as this copyright message
+ and disclaimer are retained in their original form.
+ .
+ IN NO EVENT SHALL THE AUTHOR BE LIABLE TO ANY PARTY FOR DIRECT, INDIRECT,
+ SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OF
+ THIS CODE, EVEN IF THE AUTHOR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+ DAMAGE.
+ .
+ THE AUTHOR SPECIFICALLY DISCLAIMS ANY WARRANTIES, INCLUDING, BUT NOT
+ LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ PARTICULAR PURPOSE. THE CODE PROVIDED HEREUNDER IS ON AN "AS IS" BASIS,
+ AND THERE IS NO OBLIGATION WHATSOEVER TO PROVIDE MAINTENANCE,
+ SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
+
+Files: polly/*
+Copyright: 2009-2013 Polly Team
+License: Polly
+ ==============================================================================
+ Polly Release License
+ ==============================================================================
+ University of Illinois/NCSA
+ Open Source License
+ .
+ Copyright (c) 2009-2013 Polly Team
+ All rights reserved.
+ .
+ Developed by:
+ .
+ Polly Team
+ .
+ Permission is hereby granted, free of charge, to any person obtaining a copy of
+ this software and associated documentation files (the "Software"), to deal with
+ the Software without restriction, including without limitation the rights to
+ use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
+ of the Software, and to permit persons to whom the Software is furnished to do
+ so, subject to the following conditions:
+ .
+ * Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimers.
+ .
+ * Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions and the following disclaimers in the
+ documentation and/or other materials provided with the distribution.
+ .
+ * Neither the names of the Polly Team, copyright holders, nor the names of
+ its contributors may be used to endorse or promote products derived from
+ this Software without specific prior written permission.
+ .
+ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
+ SOFTWARE.
+
+Files: polly/lib/JSON/*
+Copyright: Polly Team
+License: public-domain
+ **FIXME**
+ polly/lib/JSON/LICENSE.txt claims that these files are in the public domain, but
+ the machine-readable copyright spec requires additional clarification.
+
+Files: polly/tools/GPURuntime/*
+Copyright: Polly Team
+License: U-OF-I-BSD-LIKE or MIT
+
+Files: test/YAMLParser/*
+Copyright: 2006 Kirill Simonov
+License: MIT
+
+Files: lldb/tools/debugserver/source/MacOSX/stack_logging.h
+Copyright: 1999-2007 Apple Inc.
+License: Apple
+ This file contains Original Code and/or Modifications of Original Code
+ as defined in and that are subject to the Apple Public Source License
+ Version 2.0 (the 'License'). You may not use this file except in
+ compliance with the License. Please obtain a copy of the License at
+ http://www.opensource.apple.com/apsl/ and read it before using this
+ file.
+ .
+ The Original Code and all software distributed under the License are
+ distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
+ EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
+ INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
+ FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
+ Please see the License for the specific language governing rights and
+ limitations under the License.
+
+Files: utils/unittest/googletest/*
+Copyright: 2006-2008, Google Inc.
+License: BSD-3-Clause
+
+License: BSD-3-Clause
+ This software is provided 'as-is', without any express or implied
+ warranty. In no event will the authors be held liable for any damages
+ arising from the use of this software.
+ .
+ Permission is granted to anyone to use this software for any purpose,
+ including commercial applications, and to alter it and redistribute it
+ freely, subject to the following restrictions:
+ .
+ 1. The origin of this software must not be misrepresented; you must not
+ claim that you wrote the original software. If you use this software
+ in a product, an acknowledgment in the product documentation would be
+ appreciated but is not required.
+ 2. Altered source versions must be plainly marked as such, and must not be
+ misrepresented as being the original software.
+ 3. This notice may not be removed or altered from any source distribution.
+
+License: U-OF-I-BSD-LIKE
+ ==============================================================================
+ LLVM Release License
+ ==============================================================================
+ University of Illinois/NCSA
+ Open Source License
+ .
+ Copyright (c) 2003-2017 University of Illinois at Urbana-Champaign.
+ All rights reserved.
+ .
+ Developed by:
+ .
+ LLVM Team
+ .
+ University of Illinois at Urbana-Champaign
+ .
+ http://llvm.org
+ .
+ Permission is hereby granted, free of charge, to any person obtaining a copy of
+ this software and associated documentation files (the "Software"), to deal with
+ the Software without restriction, including without limitation the rights to
+ use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
+ of the Software, and to permit persons to whom the Software is furnished to do
+ so, subject to the following conditions:
+ .
+ * Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimers.
+ .
+ * Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions and the following disclaimers in the
+ documentation and/or other materials provided with the distribution.
+ .
+ * Neither the names of the LLVM Team, University of Illinois at
+ Urbana-Champaign, nor the names of its contributors may be used to
+ endorse or promote products derived from this Software without specific
+ prior written permission.
+ .
+ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
+ SOFTWARE.
+
+License: MIT
+ Permission is hereby granted, free of charge, to any person obtaining a copy
+ of this software and associated documentation files (the "Software"), to deal
+ in the Software without restriction, including without limitation the rights
+ to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ copies of the Software, and to permit persons to whom the Software is
+ furnished to do so, subject to the following conditions:
+ .
+ The above copyright notice and this permission notice shall be included in
+ all copies or substantial portions of the Software.
+ .
+ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ THE SOFTWARE.
--- /dev/null
+//===----------------------------------------------------------------------===//
+//
+// Debian paths declaration management
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef DEBIAN_PATH_H
+#define DEBIAN_PATH_H
+
+// Provides the debian revision
+#define DEB_PATCHSETVERSION "@DEB_PATCHSETVERSION@"
+
+#endif
--- /dev/null
+usr/lib/llvm-@LLVM_VERSION@/include/clang
+usr/lib/llvm-@LLVM_VERSION@/include/clang-c
+usr/lib/llvm-@LLVM_VERSION@/lib/libclang*a
+usr/lib/llvm-@LLVM_VERSION@/lib/libclang*so
+usr/lib/llvm-@LLVM_VERSION@/lib/libfindAllSymbols.a
+
+#usr/include/clang /usr/include/
+#usr/include/clang-c /usr/include/
+#usr/lib/libclang.so /usr/lib/
+#usr/lib/libclang*a /usr/lib/
--- /dev/null
+usr/lib/@DEB_HOST_MULTIARCH@/libclang-@LLVM_VERSION@.so.1 usr/lib/@DEB_HOST_MULTIARCH@/libclang-@LLVM_VERSION@.so
+usr/lib/@DEB_HOST_MULTIARCH@/libclang-@LLVM_VERSION@.so.1 usr/lib/llvm-@LLVM_VERSION@/lib/libclang.so
+usr/lib/@DEB_HOST_MULTIARCH@/libclang-@LLVM_VERSION@.so.1 usr/lib/llvm-@LLVM_VERSION@/lib/libclang-@LLVM_VERSION@.so
--- /dev/null
+usr/lib/llvm-@LLVM_VERSION@/lib/clang/@LLVM_VERSION_FULL@/include
+
+usr/lib/llvm-@LLVM_VERSION@/lib/clang/@LLVM_VERSION_FULL@/lib
+usr/lib/llvm-@LLVM_VERSION@/lib/clang/@LLVM_VERSION_FULL@/*.txt
+
+#usr/lib/clang/@LLVM_VERSION_FULL@/lib /usr/lib/clang/@LLVM_VERSION@/
+#usr/lib/clang/@LLVM_VERSION_FULL@/include/ /usr/include/clang/@LLVM_VERSION@/
+
+usr/lib/llvm-@LLVM_VERSION@/bin/yaml-bench
+
+usr/bin/yaml-bench-@LLVM_VERSION@
+
+
--- /dev/null
+usr/lib/llvm-@LLVM_VERSION@/lib/clang/@LLVM_VERSION_FULL@/include usr/include/clang/@LLVM_VERSION@/include
+usr/lib/llvm-@LLVM_VERSION@/lib/clang/@LLVM_VERSION_FULL@/include usr/lib/clang/@LLVM_VERSION@/include
+usr/lib/llvm-@LLVM_VERSION@/lib/clang/@LLVM_VERSION_FULL@/lib usr/lib/clang/@LLVM_VERSION@/lib
+usr/lib/llvm-@LLVM_VERSION@/lib/clang/@LLVM_VERSION_FULL@/include usr/include/clang/@LLVM_VERSION_FULL@/include
+usr/lib/llvm-@LLVM_VERSION@/lib/clang/@LLVM_VERSION_FULL@/include usr/lib/clang/@LLVM_VERSION_FULL@/include
+usr/lib/llvm-@LLVM_VERSION@/lib/clang/@LLVM_VERSION_FULL@/lib usr/lib/clang/@LLVM_VERSION_FULL@/lib
+
--- /dev/null
+usr/lib/llvm-@LLVM_VERSION@/lib/libclang-@LLVM_VERSION@.so.1 /usr/lib/@DEB_HOST_MULTIARCH@/
+usr/lib/llvm-@LLVM_VERSION@/lib/libclang.so.1
--- /dev/null
+# as upstream
+usr/lib/@DEB_HOST_MULTIARCH@/libclang-@LLVM_VERSION@.so.1 usr/lib/llvm-@LLVM_VERSION@/lib/libclang-@LLVM_VERSION@.so.1
+usr/lib/llvm-@LLVM_VERSION@/lib/libclang-@LLVM_VERSION@.so.1 usr/lib/llvm-@LLVM_VERSION@/lib/libclang.so.1
--- /dev/null
+# I know and I am not planning to change that yet.
+libclang1-@LLVM_VERSION@: package-name-doesnt-match-sonames libclang1-@LLVM_VERSION@-1
+# Provided as transition
+libclang1-@LLVM_VERSION@: dev-pkg-without-shlib-symlink usr/lib/*/libclang-@LLVM_VERSION@.so.1 usr/lib/*/libclang.so
+libclang1-@LLVM_VERSION@: ldconfig-symlink-missing-for-shlib usr/lib/*/libclang-LLVM_VERSION@.so usr/lib/*/libclang-LLVM_VERSION@.so.1 libclang-LLVM_VERSION@.so
--- /dev/null
+libclang-@LLVM_VERSION@.so.1 libclang1-@LLVM_VERSION@ #MINVER#
+ (optional)LLVM_@LLVM_VERSION@@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_BlockCommandComment_getArgText@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_BlockCommandComment_getCommandName@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_BlockCommandComment_getNumArgs@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_BlockCommandComment_getParagraph@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CXCursorSet_contains@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CXCursorSet_insert@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CXIndex_getGlobalOptions@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CXIndex_setGlobalOptions@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CXIndex_setInvocationEmissionPathOption@LLVM_@LLVM_VERSION@ 1:6.0~svn320926-1~
+ clang_CXXConstructor_isConvertingConstructor@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CXXConstructor_isCopyConstructor@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CXXConstructor_isDefaultConstructor@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CXXConstructor_isMoveConstructor@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CXXField_isMutable@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CXXMethod_isConst@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CXXMethod_isDefaulted@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CXXMethod_isPureVirtual@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CXXMethod_isStatic@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CXXMethod_isVirtual@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CXXRecord_isAbstract@LLVM_@LLVM_VERSION@ 1:6.0~svn320926-1~
+ clang_Comment_getChild@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Comment_getKind@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Comment_getNumChildren@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Comment_isWhitespace@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CompilationDatabase_dispose@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CompilationDatabase_fromDirectory@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CompilationDatabase_getAllCompileCommands@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CompilationDatabase_getCompileCommands@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CompileCommand_getArg@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CompileCommand_getDirectory@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CompileCommand_getFilename@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CompileCommand_getMappedSourceContent@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CompileCommand_getMappedSourcePath@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CompileCommand_getNumArgs@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CompileCommands_dispose@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CompileCommands_getCommand@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_CompileCommands_getSize@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_Evaluate@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_getArgument@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_getBriefCommentText@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_getCXXManglings@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_getCommentRange@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_getMangling@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_getModule@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_getNumArguments@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_getNumTemplateArguments@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_getObjCDeclQualifiers@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_getObjCManglings@LLVM_@LLVM_VERSION@ 1:6.0~svn320926-1~
+ clang_Cursor_getObjCPropertyAttributes@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_getObjCSelectorIndex@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_getOffsetOfField@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_getParsedComment@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_getRawCommentText@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_getReceiverType@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_getSpellingNameRange@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_getStorageClass@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_getTemplateArgumentKind@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_getTemplateArgumentType@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_getTemplateArgumentUnsignedValue@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_getTemplateArgumentValue@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_getTranslationUnit@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_hasAttrs@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_isAnonymous@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_isBitField@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_isDynamicCall@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_isExternalSymbol@LLVM_@LLVM_VERSION@ 1:5.0~+rc1~
+ clang_Cursor_isFunctionInlined@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_isMacroBuiltin@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_isMacroFunctionLike@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_isNull@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_isObjCOptional@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Cursor_isVariadic@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_EnumDecl_isScoped@LLVM_@LLVM_VERSION@ 1:5.0~+rc1~
+ clang_EvalResult_dispose@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_EvalResult_getAsDouble@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_EvalResult_getAsInt@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_EvalResult_getAsLongLong@LLVM_@LLVM_VERSION@ 1:5.0~svn302377-1~
+ clang_EvalResult_getAsStr@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_EvalResult_getAsUnsigned@LLVM_@LLVM_VERSION@ 1:5.0~svn302377-1~
+ clang_EvalResult_getKind@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_EvalResult_isUnsignedInt@LLVM_@LLVM_VERSION@ 1:5.0~svn302377-1~
+ clang_File_isEqual@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_FullComment_getAsHTML@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_FullComment_getAsXML@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_HTMLStartTagComment_isSelfClosing@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_HTMLStartTag_getAttrName@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_HTMLStartTag_getAttrValue@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_HTMLStartTag_getNumAttrs@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_HTMLTagComment_getAsString@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_HTMLTagComment_getTagName@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_IndexAction_create@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_IndexAction_dispose@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_InlineCommandComment_getArgText@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_InlineCommandComment_getCommandName@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_InlineCommandComment_getNumArgs@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_InlineCommandComment_getRenderKind@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_InlineContentComment_hasTrailingNewline@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Location_isFromMainFile@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Location_isInSystemHeader@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_ModuleMapDescriptor_create@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_ModuleMapDescriptor_dispose@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_ModuleMapDescriptor_setFrameworkModuleName@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_ModuleMapDescriptor_setUmbrellaHeader@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_ModuleMapDescriptor_writeToBuffer@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Module_getASTFile@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Module_getFullName@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Module_getName@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Module_getNumTopLevelHeaders@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Module_getParent@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Module_getTopLevelHeader@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Module_isSystem@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_ParamCommandComment_getDirection@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_ParamCommandComment_getParamIndex@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_ParamCommandComment_getParamName@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_ParamCommandComment_isDirectionExplicit@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_ParamCommandComment_isParamIndexValid@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Range_isNull@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_TParamCommandComment_getDepth@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_TParamCommandComment_getIndex@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_TParamCommandComment_getParamName@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_TParamCommandComment_isParamPositionValid@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_TargetInfo_dispose@LLVM_@LLVM_VERSION@ 1:5.0~svn302377-1~
+ clang_TargetInfo_getPointerWidth@LLVM_@LLVM_VERSION@ 1:5.0~svn302377-1~
+ clang_TargetInfo_getTriple@LLVM_@LLVM_VERSION@ 1:5.0~svn302377-1~
+ clang_TextComment_getText@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Type_getAlignOf@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Type_getCXXRefQualifier@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Type_getClassType@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Type_getNamedType@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Type_getNumTemplateArguments@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Type_getObjCEncoding@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Type_getOffsetOf@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Type_getSizeOf@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Type_getTemplateArgumentAsType@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_Type_isTransparentTagTypedef@LLVM_@LLVM_VERSION@ 1:5.0~svn302377-1~
+ clang_Type_visitFields@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_VerbatimBlockLineComment_getText@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_VerbatimLineComment_getText@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_VirtualFileOverlay_addFileMapping@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_VirtualFileOverlay_create@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_VirtualFileOverlay_dispose@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_VirtualFileOverlay_setCaseSensitivity@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_VirtualFileOverlay_writeToBuffer@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_annotateTokens@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_codeCompleteAt@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_codeCompleteGetContainerKind@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_codeCompleteGetContainerUSR@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_codeCompleteGetContexts@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_codeCompleteGetDiagnostic@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_codeCompleteGetNumDiagnostics@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_codeCompleteGetObjCSelector@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_constructUSR_ObjCCategory@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_constructUSR_ObjCClass@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_constructUSR_ObjCIvar@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_constructUSR_ObjCMethod@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_constructUSR_ObjCProperty@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_constructUSR_ObjCProtocol@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_createCXCursorSet@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_createIndex@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_createTranslationUnit2@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_createTranslationUnit@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_createTranslationUnitFromSourceFile@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_defaultCodeCompleteOptions@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_defaultDiagnosticDisplayOptions@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_defaultEditingTranslationUnitOptions@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_defaultReparseOptions@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_defaultSaveOptions@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_disposeCXCursorSet@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_disposeCXPlatformAvailability@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_disposeCXTUResourceUsage@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_disposeCodeCompleteResults@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_disposeDiagnostic@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_disposeDiagnosticSet@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_disposeIndex@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_disposeOverriddenCursors@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_disposeSourceRangeList@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_disposeString@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_disposeStringSet@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_disposeTokens@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_disposeTranslationUnit@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_enableStackTraces@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_equalCursors@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_equalLocations@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_equalRanges@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_equalTypes@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_executeOnThread@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_findIncludesInFile@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_findIncludesInFileWithBlock@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_findReferencesInFile@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_findReferencesInFileWithBlock@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_formatDiagnostic@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_free@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getAddressSpace@LLVM_@LLVM_VERSION@ 1:5.0~+rc1~
+ clang_getAllSkippedRanges@LLVM_@LLVM_VERSION@ 1:5.0~svn302377-1~
+ clang_getArgType@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getArrayElementType@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getArraySize@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getBuildSessionTimestamp@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCString@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCXTUResourceUsage@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCXXAccessSpecifier@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCanonicalCursor@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCanonicalType@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getChildDiagnostics@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getClangVersion@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCompletionAnnotation@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCompletionAvailability@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCompletionBriefComment@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCompletionChunkCompletionString@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCompletionChunkKind@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCompletionChunkText@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCompletionNumAnnotations@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCompletionParent@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCompletionPriority@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCursor@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCursorAvailability@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCursorCompletionString@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCursorDefinition@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCursorDisplayName@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCursorExceptionSpecificationType@LLVM_@LLVM_VERSION@ 1:5.0~+rc1~
+ clang_getCursorExtent@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCursorKind@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCursorKindSpelling@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCursorLanguage@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCursorLexicalParent@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCursorLinkage@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCursorLocation@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCursorPlatformAvailability@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCursorReferenceNameRange@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCursorReferenced@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCursorResultType@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCursorSemanticParent@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCursorSpelling@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCursorTLSKind@LLVM_@LLVM_VERSION@ 1:6.0~svn320926-1~
+ clang_getCursorType@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCursorUSR@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getCursorVisibility@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getDeclObjCTypeEncoding@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getDefinitionSpellingAndExtent@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getDiagnostic@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getDiagnosticCategory@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getDiagnosticCategoryName@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getDiagnosticCategoryText@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getDiagnosticFixIt@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getDiagnosticInSet@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getDiagnosticLocation@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getDiagnosticNumFixIts@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getDiagnosticNumRanges@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getDiagnosticOption@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getDiagnosticRange@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getDiagnosticSetFromTU@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getDiagnosticSeverity@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getDiagnosticSpelling@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getElementType@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getEnumConstantDeclUnsignedValue@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getEnumConstantDeclValue@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getEnumDeclIntegerType@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getExceptionSpecificationType@LLVM_@LLVM_VERSION@ 1:5.0~+rc1~
+ clang_getExpansionLocation@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getFieldDeclBitWidth@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getFile@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getFileContents@LLVM_@LLVM_VERSION@ 1:6.0~svn321745-1~
+ clang_getFileLocation@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getFileName@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getFileTime@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getFileUniqueID@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getFunctionTypeCallingConv@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getIBOutletCollectionType@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getIncludedFile@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getInclusions@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getInstantiationLocation@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getLocation@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getLocationForOffset@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getModuleForFile@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getNullCursor@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getNullLocation@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getNullRange@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getNumArgTypes@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getNumCompletionChunks@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getNumDiagnostics@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getNumDiagnosticsInSet@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getNumElements@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getNumOverloadedDecls@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getOverloadedDecl@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getOverriddenCursors@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getPointeeType@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getPresumedLocation@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getRange@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getRangeEnd@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getRangeStart@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getRemappings@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getRemappingsFromFileList@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getResultType@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getSkippedRanges@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getSpecializedCursorTemplate@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getSpellingLocation@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getTUResourceUsageName@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getTemplateCursorKind@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getTokenExtent@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getTokenKind@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getTokenLocation@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getTokenSpelling@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getTranslationUnitCursor@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getTranslationUnitSpelling@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getTranslationUnitTargetInfo@LLVM_@LLVM_VERSION@ 1:5.0~svn302377-1~
+ clang_getTypeDeclaration@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getTypeKindSpelling@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getTypeSpelling@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getTypedefDeclUnderlyingType@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_getTypedefName@LLVM_@LLVM_VERSION@ 1:5.0~+rc1~
+ clang_hashCursor@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_indexLoc_getCXSourceLocation@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_indexLoc_getFileLocation@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_indexSourceFile@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_indexSourceFileFullArgv@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_indexTranslationUnit@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_index_getCXXClassDeclInfo@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_index_getClientContainer@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_index_getClientEntity@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_index_getIBOutletCollectionAttrInfo@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_index_getObjCCategoryDeclInfo@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_index_getObjCContainerDeclInfo@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_index_getObjCInterfaceDeclInfo@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_index_getObjCPropertyDeclInfo@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_index_getObjCProtocolRefListInfo@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_index_isEntityObjCContainerKind@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_index_setClientContainer@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_index_setClientEntity@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_isAttribute@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_isConstQualifiedType@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_isCursorDefinition@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_isDeclaration@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_isExpression@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_isFileMultipleIncludeGuarded@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_isFunctionTypeVariadic@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_isInvalid@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_isPODType@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_isPreprocessing@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_isReference@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_isRestrictQualifiedType@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_isStatement@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_isTranslationUnit@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_isUnexposed@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_isVirtualBase@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_isVolatileQualifiedType@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_loadDiagnostics@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_parseTranslationUnit2@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_parseTranslationUnit2FullArgv@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_parseTranslationUnit@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_remap_dispose@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_remap_getFilenames@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_remap_getNumFiles@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_reparseTranslationUnit@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_saveTranslationUnit@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_sortCodeCompletionResults@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_suspendTranslationUnit@LLVM_@LLVM_VERSION@ 1:5.0~+rc1~
+ clang_toggleCrashRecovery@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_tokenize@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_visitChildren@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
+ clang_visitChildrenWithBlock@LLVM_@LLVM_VERSION@ 1:5.0~svn298832-1~
--- /dev/null
+/usr/lib/llvm-@LLVM_VERSION@/include/lld
+
--- /dev/null
+#usr/lib/llvm-@LLVM_VERSION@/lib/liblld-@LLVM_VERSION@.so.1 /usr/lib/@DEB_HOST_MULTIARCH@/
+usr/lib/llvm-@LLVM_VERSION@/lib/liblldReaderWriter.a
+usr/lib/llvm-@LLVM_VERSION@/lib/liblldDriver.a
+usr/lib/llvm-@LLVM_VERSION@/lib/liblldYAML.a
+usr/lib/llvm-@LLVM_VERSION@/lib/liblldELF.a
+usr/lib/llvm-@LLVM_VERSION@/lib/liblldCore.a
+usr/lib/llvm-@LLVM_VERSION@/lib/liblldMachO.a
+usr/lib/llvm-@LLVM_VERSION@/lib/liblldCOFF.a
+usr/lib/llvm-@LLVM_VERSION@/lib/liblldMinGW.a
+usr/lib/llvm-@LLVM_VERSION@/lib/liblldCommon.a
+usr/lib/llvm-@LLVM_VERSION@/lib/liblldWasm.a
--- /dev/null
+#usr/lib/@DEB_HOST_MULTIARCH@/liblld-@LLVM_VERSION@.so.1 usr/lib/@DEB_HOST_MULTIARCH@/liblld-@LLVM_VERSION@.so
+#usr/lib/@DEB_HOST_MULTIARCH@/liblld-@LLVM_VERSION@.so usr/lib/python2.7/dist-packages/lld-@LLVM_VERSION@/_lld.so
+#usr/lib/@DEB_HOST_MULTIARCH@/liblld-@LLVM_VERSION@.so.1 usr/lib/llvm-@LLVM_VERSION@/lib/liblld.so.1
--- /dev/null
+/usr/lib/llvm-@LLVM_VERSION@/include/lldb
+/usr/lib/llvm-@LLVM_VERSION@/lib/liblldb*a
+/usr/lib/llvm-@LLVM_VERSION@/lib/liblldb*so
--- /dev/null
+usr/lib/@DEB_HOST_MULTIARCH@/liblldb-@LLVM_VERSION@.so.1 usr/lib/llvm-@LLVM_VERSION@/lib/liblldb.so
+usr/lib/@DEB_HOST_MULTIARCH@/liblldb-@LLVM_VERSION@.so.1 usr/lib/llvm-@LLVM_VERSION@/lib/liblldb-@LLVM_VERSION@.so
+usr/lib/@DEB_HOST_MULTIARCH@/liblldb-@LLVM_VERSION@.so.1 usr/lib/llvm-@LLVM_VERSION@/lib/liblldb-@LLVM_VERSION@.so.1
--- /dev/null
+usr/lib/llvm-@LLVM_VERSION@/lib/liblldb-@LLVM_VERSION@.so.1 /usr/lib/@DEB_HOST_MULTIARCH@/
+usr/lib/llvm-@LLVM_VERSION@/lib/python2.7/site-packages/readline.so
+
+usr/lib/llvm-@LLVM_VERSION@/lib/liblldbIntelFeatures.so.*
--- /dev/null
+usr/lib/@DEB_HOST_MULTIARCH@/liblldb-@LLVM_VERSION@.so.1 usr/lib/@DEB_HOST_MULTIARCH@/liblldb-@LLVM_VERSION@.so
+usr/lib/@DEB_HOST_MULTIARCH@/liblldb-@LLVM_VERSION@.so.1 usr/lib/llvm-@LLVM_VERSION@/lib/liblldb.so.1
--- /dev/null
+# That is normal. The lib is not (yet?) shipped as a new package
+liblldb-@LLVM_VERSION@: package-name-doesnt-match-sonames liblldb-@LLVM_VERSION@-1
+# For now, override this warning. We might create a -dev at some point
+liblldb-@LLVM_VERSION@: non-dev-pkg-with-shlib-symlink usr/lib/*/liblldb.so.1 usr/lib/*/liblldb.so
+liblldb-@LLVM_VERSION@: non-dev-pkg-with-shlib-symlink usr/lib/*/liblldb-@LLVM_VERSION@.so.1 usr/lib/*/liblldb-@LLVM_VERSION@.so
--- /dev/null
+description = "Low Level Virtual Machine bindings"
+version = "@LLVM_VERSION@"
+
+directory = "+llvm-@LLVM_VERSION@"
+
+archive(byte) = "llvm.cma"
+archive(native) = "llvm.cmxa"
+linkopts = "-cclib -lstdc++ -cclib -lllvm"
+
+package "executionengine"
+(
+ requires = "llvm-@LLVM_VERSION@"
+ version = "@LLVM_VERSION@"
+ archive(native) = "llvm_executionengine.cmxa"
+ archive(byte) = "llvm_executionengine.cma"
+ linkopts = "-cclib -lllvm_executionengine"
+)
+
+package "target"
+(
+ requires = "llvm-@LLVM_VERSION@"
+ version = "@LLVM_VERSION@"
+ archive(native) = "llvm_target.cmxa"
+ archive(byte) = "llvm_target.cma"
+ linkopts = "-cclib -lllvm_target"
+)
+
+package "scalar_opts"
+(
+ requires = "llvm-@LLVM_VERSION@ llvm-@LLVM_VERSION@.target"
+ version = "@LLVM_VERSION@"
+ archive(native) = "llvm_scalar_opts.cmxa"
+ archive(byte) = "llvm_scalar_opts.cma"
+ linkopts = "-cclib -lllvm_scalar_opts"
+)
+
+package "analysis"
+(
+ requires = "llvm-@LLVM_VERSION@"
+ version = "@LLVM_VERSION@"
+ archive(native) = "llvm_analysis.cmxa"
+ archive(byte) = "llvm_analysis.cma"
+ linkopts = "-cclib -lllvm_analysis"
+)
+
+package "bitwriter"
+(
+ requires = "llvm-@LLVM_VERSION@"
+ version = "@LLVM_VERSION@"
+ archive(native) = "llvm_bitwriter.cmxa"
+ archive(byte) = "llvm_bitwriter.cma"
+ linkopts = "-cclib -lllvm_bitwriter"
+)
+
+package "bitreader"
+(
+ requires = "llvm-@LLVM_VERSION@ llvm-@LLVM_VERSION@.bitwriter"
+ version = "@LLVM_VERSION@"
+ archive(native) = "llvm_bitreader.cmxa"
+ archive(byte) = "llvm_bitreader.cma"
+ linkopts = "-cclib -lllvm_bitreader"
+)
+
--- /dev/null
+@OCAML_STDLIB_DIR@/META/
+
--- /dev/null
+@OCAML_STDLIB_DIR@
+usr/lib/llvm-@LLVM_VERSION@/share/doc/llvm/ocaml-html/ usr/share/doc/libllvm-@LLVM_VERSION@-ocaml-dev/
--- /dev/null
+# It is in the section ocaml which is fine.
+libllvm-@LLVM_VERSION@-ocaml-dev: wrong-section-according-to-package-name libllvm-@LLVM_VERSION@-ocaml-dev => libdevel
--- /dev/null
+usr/lib/llvm-@LLVM_VERSION@/lib/libLLVM-@LLVM_VERSION@.so.1 /usr/lib/@DEB_HOST_MULTIARCH@/
--- /dev/null
+# Should be uncommented for @LLVM_VERSION@.1 and other
+# usr/lib/llvm-@LLVM_VERSION@/lib/libLLVM-@LLVM_VERSION@.so.1 /usr/lib/@DEB_HOST_MULTIARCH@/libLLVM-@LLVM_VERSION@.so.1
+usr/lib/@DEB_HOST_MULTIARCH@/libLLVM-@LLVM_VERSION@.so.1 /usr/lib/@DEB_HOST_MULTIARCH@/libLLVM-@LLVM_VERSION@.so
+
--- /dev/null
+# That is normal. Upstream does not match the debian convention
+libllvm@LLVM_VERSION@: package-name-doesnt-match-sonames libLLVM-@LLVM_VERSION@-1
--- /dev/null
+usr/lib/llvm-@LLVM_VERSION@/bin/ld.lld*
+usr/lib/llvm-@LLVM_VERSION@/bin/ld64.lld
+usr/lib/llvm-@LLVM_VERSION@/bin/lld-*
+usr/lib/llvm-@LLVM_VERSION@/bin/lld
+usr/lib/llvm-@LLVM_VERSION@/bin/wasm-ld
+
+usr/bin/lld-link-@LLVM_VERSION@
+usr/bin/ld.lld-@LLVM_VERSION@
+usr/bin/ld64.lld-@LLVM_VERSION@
+usr/bin/lld-@LLVM_VERSION@*
+usr/bin/wasm-ld-@LLVM_VERSION@
--- /dev/null
+debian/man/ld.lld-@LLVM_VERSION@.1
--- /dev/null
+usr/lib/llvm-@LLVM_VERSION@/bin/lldb*
+usr/lib/llvm-@LLVM_VERSION@/bin/lldb-mi*
+usr/lib/llvm-@LLVM_VERSION@/bin/lldb-server*
+usr/lib/llvm-@LLVM_VERSION@/bin/lldb-argdumper
+
+usr/bin/lldb-@LLVM_VERSION@*
+usr/bin/lldb-server-@LLVM_VERSION@*
+usr/bin/lldb-mi-@LLVM_VERSION@*
+usr/bin/lldb-argdumper-@LLVM_VERSION@
+usr/bin/lldb-test-@LLVM_VERSION@
+
--- /dev/null
+usr/lib/llvm-@LLVM_VERSION@/bin/lldb-server usr/lib/llvm-@LLVM_VERSION@/bin/lldb-server-@LLVM_VERSION_FULL@
+usr/lib/llvm-@LLVM_VERSION@/bin/lldb-server usr/lib/llvm-@LLVM_VERSION@/bin/lldb-server-@LLVM_VERSION@
--- /dev/null
+lldb-@LLVM_VERSION@: non-dev-pkg-with-shlib-symlink usr/lib/*/liblldb.so.1 usr/lib/*/liblldb.so
+# Does not really matter
+lldb-@LLVM_VERSION@: manpage-has-useless-whatis-entry usr/share/man/man1/lldb-@LLVM_VERSION@.1.gz
--- /dev/null
+debian/man/lldb-@LLVM_VERSION@.1
+debian/man/lldb-mi-@LLVM_VERSION@.1
--- /dev/null
+#!/bin/sh -e
+
+if [ "$1" = "configure" ]
+then
+ ldconfig
+fi
+
+#DEBHELPER#
--- /dev/null
+/usr/lib/llvm-@LLVM_VERSION@/lib
+/usr/lib/llvm-@LLVM_VERSION@/build
+/usr/lib/llvm-@LLVM_VERSION@/include
+usr/share/doc/llvm-@LLVM_VERSION@-dev
+usr/share/emacs/site-lisp/llvm-@LLVM_VERSION@
--- /dev/null
+usr/lib/llvm-@LLVM_VERSION@/lib/libLLVM*.a
+#usr/lib/llvm-@LLVM_VERSION@/lib/libllvm*.a
+usr/lib/llvm-@LLVM_VERSION@/lib/LLVM*.so
+usr/lib/llvm-@LLVM_VERSION@/lib/libLLVM.so
+usr/lib/llvm-@LLVM_VERSION@/lib/libLLVM-@LLVM_VERSION@.so
+usr/lib/llvm-@LLVM_VERSION@/lib/libLLVM-@LLVM_VERSION_FULL@.so
+usr/lib/llvm-@LLVM_VERSION@/lib/libLTO.*
+usr/lib/llvm-@LLVM_VERSION@/lib/BugpointPasses.so
+usr/lib/llvm-@LLVM_VERSION@/include/llvm/ usr/include/llvm-@LLVM_VERSION@/
+usr/lib/llvm-@LLVM_VERSION@/include/llvm-c/ usr/include/llvm-c-@LLVM_VERSION@/
+# Explicit debian/tmp since there are multiple declarations
+debian/tmp/usr/lib/llvm-@LLVM_VERSION@/lib/cmake/llvm/*.cmake
+
+utils/vim/indent/llvm-@LLVM_VERSION@.vim usr/share/vim/addons/indent/
+
+utils/vim/syntax/llvm-@LLVM_VERSION@.vim usr/share/vim/addons/syntax/
+utils/vim/syntax/tablegen-@LLVM_VERSION@.vim usr/share/vim/addons/syntax/
+
+utils/vim/ftdetect/llvm-@LLVM_VERSION@.vim usr/share/vim/addons/ftdetect/
+utils/vim/ftdetect/tablegen-@LLVM_VERSION@.vim usr/share/vim/addons/ftdetect/
+
+utils/vim/ftplugin/llvm-@LLVM_VERSION@.vim usr/share/vim/addons/ftplugin/
+utils/vim/ftplugin/tablegen-@LLVM_VERSION@.vim usr/share/vim/addons/ftplugin/
+
+utils/vim/llvm-@LLVM_VERSION@-vimrc usr/share/vim/addons
+
+
+utils/emacs/emacs.el usr/share/emacs/site-lisp/llvm-@LLVM_VERSION@/
+utils/emacs/llvm-mode.el usr/share/emacs/site-lisp/llvm-@LLVM_VERSION@/
+utils/emacs/tablegen-mode.el usr/share/emacs/site-lisp/llvm-@LLVM_VERSION@/
+
--- /dev/null
+usr/lib/@DEB_HOST_MULTIARCH@/libLLVM-@LLVM_VERSION@.so.1 usr/lib/llvm-@LLVM_VERSION@/lib/libLLVM-@LLVM_VERSION@.so
+usr/lib/@DEB_HOST_MULTIARCH@/libLLVM-@LLVM_VERSION@.so.1 usr/lib/llvm-@LLVM_VERSION@/lib/libLLVM-@LLVM_VERSION@.so.1
+usr/lib/@DEB_HOST_MULTIARCH@/libLLVM-@LLVM_VERSION@.so.1 usr/lib/llvm-@LLVM_VERSION@/lib/libLLVM-@LLVM_VERSION_FULL@.so.1
+usr/lib/@DEB_HOST_MULTIARCH@/libLLVM-@LLVM_VERSION@.so.1 usr/lib/llvm-@LLVM_VERSION@/lib/libLLVM-@LLVM_VERSION_FULL@.so
+usr/lib/@DEB_HOST_MULTIARCH@/libLLVM-@LLVM_VERSION@.so.1 usr/lib/@DEB_HOST_MULTIARCH@/libLLVM-@LLVM_VERSION_FULL@.so.1
+
+usr/include/llvm-c-@LLVM_VERSION@/llvm-c usr/lib/llvm-@LLVM_VERSION@/include/llvm-c
+usr/include/llvm-@LLVM_VERSION@/llvm usr/lib/llvm-@LLVM_VERSION@/include/llvm
+usr/include/llvm-c-@LLVM_VERSION@/llvm-c usr/lib/llvm-@LLVM_VERSION@/build/include/llvm-c
+usr/include/llvm-@LLVM_VERSION@/llvm usr/lib/llvm-@LLVM_VERSION@/build/include/llvm
+
+usr/lib/llvm-@LLVM_VERSION@/include/ usr/lib/llvm-@LLVM_VERSION@/build/include
+usr/lib/llvm-@LLVM_VERSION@/lib/ usr/lib/llvm-@LLVM_VERSION@/build/lib
+usr/lib/llvm-@LLVM_VERSION@/share/ usr/lib/llvm-@LLVM_VERSION@/build/share
+usr/lib/llvm-@LLVM_VERSION@/ usr/lib/llvm-@LLVM_VERSION@/build/Release
+usr/lib/llvm-@LLVM_VERSION@/ usr/lib/llvm-@LLVM_VERSION@/build/Debug+Asserts
+
+usr/lib/llvm-@LLVM_VERSION@/lib/cmake/llvm usr/lib/llvm-@LLVM_VERSION@/cmake
+usr/lib/llvm-@LLVM_VERSION@/lib/cmake/llvm usr/lib/llvm-@LLVM_VERSION@/share/llvm/cmake
--- /dev/null
+usr/share/doc/llvm-@LLVM_VERSION@-examples
--- /dev/null
+examples/*
--- /dev/null
+/usr/lib/llvm-@LLVM_VERSION@/build/Makefile.common usr/share/doc/llvm-@LLVM_VERSION@-examples/Makefile.common
+/usr/lib/llvm-@LLVM_VERSION@/build/Makefile.config usr/share/doc/llvm-@LLVM_VERSION@-examples/Makefile.config
+/usr/lib/llvm-@LLVM_VERSION@/build/Makefile.rules usr/share/doc/llvm-@LLVM_VERSION@-examples/Makefile.rules
--- /dev/null
+package llvm-@LLVM_VERSION@-runtime
+interpreter /usr/bin/lli-@LLVM_VERSION@
+magic BC
--- /dev/null
+usr/lib/llvm-@LLVM_VERSION@/bin/lli
+usr/lib/llvm-@LLVM_VERSION@/bin/lli-child-target
+
+usr/bin/lli-@LLVM_VERSION@
+usr/bin/lli-child-target-@LLVM_VERSION@
+
+debian/llvm-@LLVM_VERSION@-runtime.binfmt usr/share/binfmts/
+
--- /dev/null
+llvm-@LLVM_VERSION@-runtime: binary-without-manpage usr/bin/lli-child-target-@LLVM_VERSION@
--- /dev/null
+debian/man/lli*
--- /dev/null
+#!/bin/sh
+
+set -e
+
+if test "$1" = "configure"; then
+ if test -x /usr/sbin/update-binfmts; then
+ update-binfmts --import llvm-@LLVM_VERSION@-runtime.binfmt || true
+ fi
+fi
+
+#DEBHELPER#
--- /dev/null
+#!/bin/sh
+
+set -e
+
+if test "$1" = "remove"; then
+ if test -x /usr/sbin/update-binfmts; then
+ update-binfmts --package llvm-@LLVM_VERSION@-runtime \
+ --remove llvm-@LLVM_VERSION@-runtime.binfmt /usr/bin/lli-@LLVM_VERSION@ || true
+ if test -f /var/lib/binfmts/llvm-@LLVM_VERSION@.binfmt; then
+ # Purge old file
+ update-binfmts --package llvm-@LLVM_VERSION@-runtime \
+ --remove llvm-@LLVM_VERSION@.binfmt /usr/bin/lli-@LLVM_VERSION@ || true
+ fi
+ fi
+fi
+
+#DEBHELPER#
+
--- /dev/null
+/usr/lib/llvm-@LLVM_VERSION@/build/unittests
+/usr/lib/llvm-@LLVM_VERSION@/build/utils/lit/
--- /dev/null
+
+usr/lib/llvm-@LLVM_VERSION@/bin/count
+usr/lib/llvm-@LLVM_VERSION@/bin/FileCheck
+usr/lib/llvm-@LLVM_VERSION@/bin/not
+usr/lib/llvm-@LLVM_VERSION@/share/opt-viewer/opt-viewer.py
+usr/lib/llvm-@LLVM_VERSION@/share/opt-viewer/optrecord.py
+usr/lib/llvm-@LLVM_VERSION@/share/opt-viewer/style.css
+usr/lib/llvm-@LLVM_VERSION@/share/opt-viewer/opt-diff.py
+usr/lib/llvm-@LLVM_VERSION@/share/opt-viewer/optpmap.py
+usr/lib/llvm-@LLVM_VERSION@/share/opt-viewer/opt-stats.py
+
+utils/lit/* /usr/lib/llvm-@LLVM_VERSION@/build/utils/lit/
+
+usr/bin/count-@LLVM_VERSION@
+usr/bin/FileCheck-@LLVM_VERSION@
+usr/bin/not-@LLVM_VERSION@
+
--- /dev/null
+/usr/lib/llvm-@LLVM_VERSION@/bin
+usr/share/man/man1
+usr/share/doc/llvm-@LLVM_VERSION@
--- /dev/null
+usr/lib/llvm-@LLVM_VERSION@/bin/llvm-*
+usr/lib/llvm-@LLVM_VERSION@/bin/opt*
+usr/lib/llvm-@LLVM_VERSION@/bin/bugpoint*
+usr/lib/llvm-@LLVM_VERSION@/bin/llc*
+usr/lib/llvm-@LLVM_VERSION@/bin/obj2yaml
+usr/lib/llvm-@LLVM_VERSION@/bin/yaml2obj
+usr/lib/llvm-@LLVM_VERSION@/bin/verify-uselistorder
+usr/lib/llvm-@LLVM_VERSION@/bin/sanstats
+usr/bin/llvm-*
+usr/bin/opt*
+usr/bin/bugpoint*
+usr/bin/llc*
+usr/bin/obj2yaml-*
+usr/bin/yaml2obj-*
+usr/bin/verify-uselistorder-*
+usr/bin/sanstats-*
--- /dev/null
+# I know but well...
+llvm-@LLVM_VERSION@: manpage-has-useless-whatis-entry usr/share/man/man1/llvm-dwarfdump-@LLVM_VERSION@.1.gz
+llvm-@LLVM_VERSION@: manpage-has-useless-whatis-entry usr/share/man/man1/llvm-mc-@LLVM_VERSION@.1.gz
+llvm-@LLVM_VERSION@: manpage-has-useless-whatis-entry usr/share/man/man1/llvm-mcmarkup-@LLVM_VERSION@.1.gz
+llvm-@LLVM_VERSION@: manpage-has-useless-whatis-entry usr/share/man/man1/llvm-objdump-@LLVM_VERSION@.1.gz
+llvm-@LLVM_VERSION@: manpage-has-useless-whatis-entry usr/share/man/man1/llvm-rtdyld-@LLVM_VERSION@.1.gz
+llvm-@LLVM_VERSION@: manpage-has-useless-whatis-entry usr/share/man/man1/llvm-size-@LLVM_VERSION@.1.gz
+llvm-@LLVM_VERSION@: manpage-has-useless-whatis-entry usr/share/man/man1/llvm-ranlib-@LLVM_VERSION@.1.gz
+# Does not link otherwise
+llvm-@LLVM_VERSION@: embedded-library usr/lib/llvm-@LLVM_VERSION@/bin/bugpoint: libjsoncpp
+llvm-@LLVM_VERSION@: embedded-library usr/lib/llvm-@LLVM_VERSION@/bin/opt: libjsoncpp
+
--- /dev/null
+docs/_build/man/*
+debian/man/llvm-dwarfdump-@LLVM_VERSION@.1
+debian/man/llvm-mc-@LLVM_VERSION@.1
+debian/man/llvm-mcmarkup-@LLVM_VERSION@.1
+debian/man/llvm-objdump-@LLVM_VERSION@.1
+debian/man/llvm-rtdyld-@LLVM_VERSION@.1
+debian/man/llvm-size-@LLVM_VERSION@.1
+debian/man/llvm-ranlib-@LLVM_VERSION@.1
--- /dev/null
+/usr/lib/llvm-3.1/build
--- /dev/null
+#!/bin/sh
+# This script will create the following tarballs:
+# llvm-toolchain-snapshot-3.2_3.2repack.orig-clang.tar.bz2
+# llvm-toolchain-snapshot-3.2_3.2repack.orig-clang-extra.tar.bz2
+# llvm-toolchain-snapshot-3.2_3.2repack.orig-compiler-rt.tar.bz2
+# llvm-toolchain-snapshot-3.2_3.2repack.orig-lld.tar.bz2
+# llvm-toolchain-snapshot-3.2_3.2repack.orig-lldb.tar.bz2
+# llvm-toolchain-snapshot-3.2_3.2repack.orig-polly.tar.bz2
+# llvm-toolchain-snapshot-3.2_3.2repack.orig.tar.bz2
+set -e
+
+# TODO rest of the options
+
+# To create an rc1 release:
+# sh 4.0/debian/orig-tar.sh RELEASE_40 rc1
+
+SVN_BASE_URL=https://llvm.org/svn/llvm-project/
+MAJOR_VERSION=6.0
+CURRENT_VERSION=6.0.1 # Should be changed to 3.5.1 later
+
+if test -n "$1"; then
+# https://llvm.org/svn/llvm-project/{cfe,llvm,compiler-rt,...}/branches/google/stable/
+# For example: sh 4.0/debian/orig-tar.sh release_400
+ BRANCH=$1
+fi
+
+if test -n "$1" -a -n "$2"; then
+# https://llvm.org/svn/llvm-project/{cfe,llvm,compiler-rt,...}/tags/RELEASE_34/rc1/
+# For example: sh 4.0/debian/orig-tar.sh RELEASE_401 rc3 4.0.1
+ BRANCH=$1
+ TAG=$2
+ RCRELEASE="true"
+ if test -z "$3"; then
+ echo "Please provide the exact version. Used for the tarball name Ex: 4.0.1"
+ fi
+ EXACT_VERSION=$3
+fi
+
+get_svn_url() {
+ MODULE=$1
+ BRANCH=$2
+ TAG=$3
+ if test -n "$TAG"; then
+ SVN_URL="$SVN_BASE_URL/$MODULE/tags/$BRANCH/$TAG"
+ else
+ if test -n "$BRANCH"; then
+ SVN_URL="$SVN_BASE_URL/$MODULE/branches/$BRANCH"
+ else
+ SVN_URL="$SVN_BASE_URL/$MODULE/trunk/"
+ fi
+ fi
+ echo $SVN_URL
+}
+
+get_higher_revision() {
+ PROJECTS="llvm cfe compiler-rt polly lld lldb clang-tools-extra"
+ REVISION_MAX=0
+ for f in $PROJECTS; do
+ REVISION=$(LANG=C svn info $(get_svn_url $f $BRANCH $TAG)|grep "^Last Changed Rev:"|awk '{print $4}')
+ if test $REVISION -gt $REVISION_MAX; then
+ REVISION_MAX=$REVISION
+ fi
+ done
+ echo $REVISION_MAX
+}
+
+SVN_ARCHIVES=svn-archives
+
+checkout_sources() {
+ PROJECT=$1
+ URL=$2
+ TARGET=$3
+ BRANCH=$4
+ if test -n "$BRANCH"; then
+ REVISION=$5
+ fi
+ echo "$PROJECT / $URL / $BRANCH / $TARGET / $REVISION"
+
+ cd $SVN_ARCHIVES/
+ DEST=$PROJECT-$BRANCH
+ if test -n "$TAG"; then
+ DEST=$DEST-$TAG
+ fi
+ if test -d $DEST; then
+ cd $DEST
+ if test -n "$BRANCH"; then
+ svn cleanup
+ svn up
+ else
+ svn cleanup
+ svn up -r $REVISION
+ fi
+ cd ..
+ else
+ if test -n "$BRANCH"; then
+ svn co $URL $DEST
+ else
+ svn co -r $REVISION $URL $DEST
+ fi
+ fi
+ rm -rf ../$TARGET
+ rsync -r --exclude=.svn $DEST/ ../$TARGET
+ cd ..
+}
+
+if test -n "$BRANCH"; then
+ REVISION=$(get_higher_revision)
+ # Do not use the revision when exporting branch. We consider that all the
+ # branch are sync
+ SVN_CMD="svn export"
+else
+ REVISION=$(LANG=C svn info $(get_svn_url llvm)|grep "^Revision:"|awk '{print $2}')
+ SVN_CMD="svn export -r $REVISION"
+fi
+
+if test -n "$RCRELEASE"; then
+ if test "$TAG" = "final"; then
+ VERSION=$EXACT_VERSION
+ else
+ VERSION=$EXACT_VERSION"~+"$TAG
+ fi
+ FULL_VERSION="llvm-toolchain-"$MAJOR_VERSION"_"$VERSION
+else
+ VERSION=$CURRENT_VERSION"~svn"$REVISION
+ if echo $BRANCH|grep -q release_; then
+ FULL_VERSION="llvm-toolchain-"$MAJOR_VERSION"_"$VERSION
+ else
+ FULL_VERSION="llvm-toolchain-snapshot_"$VERSION
+ fi
+fi
+
+mkdir -p $SVN_ARCHIVES
+
+# LLVM
+LLVM_TARGET=$FULL_VERSION
+checkout_sources llvm $(get_svn_url llvm $BRANCH $TAG) $LLVM_TARGET "$BRANCH" $REVISION
+tar jcf $FULL_VERSION.orig.tar.bz2 $LLVM_TARGET
+rm -rf $LLVM_TARGET
+
+
+# Clang
+CLANG_TARGET=clang_$VERSION
+checkout_sources clang $(get_svn_url cfe $BRANCH $TAG) $CLANG_TARGET "$BRANCH" $REVISION
+tar jcf $FULL_VERSION.orig-clang.tar.bz2 $CLANG_TARGET
+rm -rf $CLANG_TARGET
+
+
+# Clang extra
+CLANG_TARGET=clang-tools-extra_$VERSION
+checkout_sources clang-tools-extra $(get_svn_url clang-tools-extra $BRANCH $TAG) $CLANG_TARGET "$BRANCH" $REVISION
+tar jcf $FULL_VERSION.orig-clang-tools-extra.tar.bz2 $CLANG_TARGET
+rm -rf $CLANG_TARGET
+
+# Compiler-rt
+COMPILER_RT_TARGET=compiler-rt_$VERSION
+checkout_sources compiler-rt $(get_svn_url compiler-rt $BRANCH $TAG) $COMPILER_RT_TARGET "$BRANCH" $REVISION
+#$SVN_CMD $(get_svn_url compiler-rt $BRANCH $TAG) $COMPILER_RT_TARGET
+tar jcf $FULL_VERSION.orig-compiler-rt.tar.bz2 $COMPILER_RT_TARGET
+rm -rf $COMPILER_RT_TARGET
+
+# Polly
+POLLY_TARGET=polly_$VERSION
+checkout_sources polly $(get_svn_url polly $BRANCH $TAG) $POLLY_TARGET "$BRANCH" $REVISION
+#$SVN_CMD $(get_svn_url polly $BRANCH $TAG) $POLLY_TARGET
+rm -rf $POLLY_TARGET/www $POLLY_TARGET/autoconf/config.sub $POLLY_TARGET/autoconf/config.guess
+tar jcf $FULL_VERSION.orig-polly.tar.bz2 $POLLY_TARGET
+rm -rf $POLLY_TARGET
+
+# LLD
+LLD_TARGET=lld_$VERSION
+checkout_sources lld $(get_svn_url lld $BRANCH $TAG) $LLD_TARGET "$BRANCH" $REVISION
+#$SVN_CMD $(get_svn_url lld $BRANCH $TAG) $LLD_TARGET
+rm -rf $LLD_TARGET/www/
+tar jcf $FULL_VERSION.orig-lld.tar.bz2 $LLD_TARGET
+rm -rf $LLD_TARGET
+
+# LLDB
+LLDB_TARGET=lldb_$VERSION
+checkout_sources lldb $(get_svn_url lldb $BRANCH $TAG) $LLDB_TARGET "$BRANCH" $REVISION
+#$SVN_CMD $(get_svn_url lldb $BRANCH $TAG) $LLDB_TARGET
+rm -rf $LLDB_TARGET/www/
+tar jcf $FULL_VERSION.orig-lldb.tar.bz2 $LLDB_TARGET
+rm -rf $LLDB_TARGET
+
+PATH_DEBIAN="$(pwd)/$(dirname $0)/../"
+echo "going into $PATH_DEBIAN"
+export DEBFULLNAME="Sylvestre Ledru"
+export DEBEMAIL="sylvestre@debian.org"
+cd $PATH_DEBIAN
+
+if test -z "$DISTRIBUTION"; then
+ DISTRIBUTION="experimental"
+fi
+
+if test -n "$RCRELEASE" -o -n "$BRANCH"; then
+ EXTRA_DCH_FLAGS="--force-bad-version --allow-lower-version"
+fi
+
+dch $EXTRA_DCH_FLAGS --distribution $DISTRIBUTION --newversion 1:$VERSION-1~exp1 "New snapshot release"
+
+exit 0
--- /dev/null
+From d0d969074f6e0f975ad53d21e7ce6c7b40cf2957 Mon Sep 17 00:00:00 2001
+From: Peter Wu <peter@lekensteyn.nl>
+Date: Fri, 4 May 2018 15:43:06 +0200
+Subject: [PATCH] [llvm] cmake: resolve symlinks in LLVMConfig.cmake
+
+Ensure that symlinks such as /usr/lib/llvm-X.Y/cmake (pointing to
+lib/cmake/llvm) are resolved. This ensures that LLVM_INSTALL_PREFIX
+becomes /usr/lib/llvm-X.Y instead of /usr.
+
+Partially addresses PR37128
+---
+ cmake/modules/CMakeLists.txt | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/cmake/modules/CMakeLists.txt b/cmake/modules/CMakeLists.txt
+index 6074e835859..1cf4569b884 100644
+--- a/cmake/modules/CMakeLists.txt
++++ b/cmake/modules/CMakeLists.txt
+@@ -76,10 +76,10 @@ file(COPY .
+ # Generate LLVMConfig.cmake for the install tree.
+ set(LLVM_CONFIG_CODE "
+ # Compute the installation prefix from this LLVMConfig.cmake file location.
+-get_filename_component(LLVM_INSTALL_PREFIX \"\${CMAKE_CURRENT_LIST_FILE}\" PATH)")
++get_filename_component(LLVM_INSTALL_PREFIX \"\${CMAKE_CURRENT_LIST_FILE}\" REALPATH)")
+ # Construct the proper number of get_filename_component(... PATH)
+ # calls to compute the installation prefix.
+-string(REGEX REPLACE "/" ";" _count "${LLVM_INSTALL_PACKAGE_DIR}")
++string(REGEX REPLACE "/" ";" _count "prefix/${LLVM_INSTALL_PACKAGE_DIR}")
+ foreach(p ${_count})
+ set(LLVM_CONFIG_CODE "${LLVM_CONFIG_CODE}
+ get_filename_component(LLVM_INSTALL_PREFIX \"\${LLVM_INSTALL_PREFIX}\" PATH)")
+--
+2.17.0
+
--- /dev/null
+From c830d84bc802ca1e9219415a5784c4ad97a34819 Mon Sep 17 00:00:00 2001
+From: Peter Wu <peter@lekensteyn.nl>
+Date: Fri, 4 May 2018 15:55:26 +0200
+Subject: [PATCH] [clang] cmake: resolve symlinks in ClangConfig.cmake
+
+Ensure that symlinks such as /usr/lib/cmake/clang-X.Y (pointing to
+/usr/lib/llvm-X.Y/lib/cmake/llvm) are resolved. This ensures that
+CLANG_INSTALL_PREFIX ends up to be /usr/lib/llvm-X.Y instead of /usr.
+
+Partially addresses PR37128
+---
+ cmake/modules/CMakeLists.txt | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/cmake/modules/CMakeLists.txt b/cmake/modules/CMakeLists.txt
+index be6d1d7257..bcb61f6cc8 100644
+--- a/clang/cmake/modules/CMakeLists.txt
++++ b/clang/cmake/modules/CMakeLists.txt
+@@ -30,10 +30,10 @@ set(CLANG_CONFIG_EXPORTS_FILE)
+ # Generate ClangConfig.cmake for the install tree.
+ set(CLANG_CONFIG_CODE "
+ # Compute the installation prefix from this LLVMConfig.cmake file location.
+-get_filename_component(CLANG_INSTALL_PREFIX \"\${CMAKE_CURRENT_LIST_FILE}\" PATH)")
++get_filename_component(CLANG_INSTALL_PREFIX \"\${CMAKE_CURRENT_LIST_FILE}\" REALPATH)")
+ # Construct the proper number of get_filename_component(... PATH)
+ # calls to compute the installation prefix.
+-string(REGEX REPLACE "/" ";" _count "${CLANG_INSTALL_PACKAGE_DIR}")
++string(REGEX REPLACE "/" ";" _count "prefix/${CLANG_INSTALL_PACKAGE_DIR}")
+ foreach(p ${_count})
+ set(CLANG_CONFIG_CODE "${CLANG_CONFIG_CODE}
+ get_filename_component(CLANG_INSTALL_PREFIX \"\${CLANG_INSTALL_PREFIX}\" PATH)")
+--
+2.17.0
+
--- /dev/null
+---
+ lib/Support/CommandLine.cpp | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+Index: llvm-toolchain-snapshot_5.0~svn296106/lib/Support/CommandLine.cpp
+===================================================================
+--- llvm-toolchain-snapshot_5.0~svn296106.orig/lib/Support/CommandLine.cpp
++++ llvm-toolchain-snapshot_5.0~svn296106/lib/Support/CommandLine.cpp
+@@ -2064,6 +2064,10 @@ public:
+ OS << " " << LLVM_VERSION_INFO;
+ #endif
+ OS << "\n ";
++#ifdef LLVM_DEBIAN_INFO
++ OS << LLVM_DEBIAN_INFO;
++#endif
++ OS << "\n ";
+ #ifndef __OPTIMIZE__
+ OS << "DEBUG build";
+ #else
--- /dev/null
+---
+ clang/tools/libclang/CMakeLists.txt | 2 +-
+ tools/llvm-shlib/CMakeLists.txt | 1 +
+ 2 files changed, 2 insertions(+), 1 deletion(-)
+
+Index: llvm-toolchain-snapshot_6.0~svn309319/clang/tools/libclang/CMakeLists.txt
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn309319.orig/clang/tools/libclang/CMakeLists.txt
++++ llvm-toolchain-snapshot_6.0~svn309319/clang/tools/libclang/CMakeLists.txt
+@@ -84,7 +84,7 @@ else()
+ set(output_name "clang")
+ endif()
+
+-add_clang_library(libclang ${ENABLE_SHARED} ${ENABLE_STATIC}
++add_clang_library(libclang ${ENABLE_SHARED} ${ENABLE_STATIC} SONAME
+ OUTPUT_NAME ${output_name}
+ ${SOURCES}
+ DEPENDS clang-headers
+Index: llvm-toolchain-snapshot_6.0~svn309319/tools/llvm-shlib/CMakeLists.txt
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn309319.orig/tools/llvm-shlib/CMakeLists.txt
++++ llvm-toolchain-snapshot_6.0~svn309319/tools/llvm-shlib/CMakeLists.txt
+@@ -35,6 +35,7 @@ if(LLVM_DYLIB_EXPORTED_SYMBOL_FILE)
+ endif()
+
+ add_llvm_library(LLVM SHARED DISABLE_LLVM_LINK_LLVM_DYLIB SONAME ${SOURCES})
++set_property(TARGET LLVM PROPERTY VERSION "1") # Append .1 to SONAME
+
+ list(REMOVE_DUPLICATES LIB_NAMES)
+ if(("${CMAKE_SYSTEM_NAME}" STREQUAL "Linux") OR (MINGW) OR (HAIKU)
--- /dev/null
+From: Nicholas D Steeves <nsteeves@gmail.com>
+Date: Sat, 10 Feb 2018 21:00:55 -0500
+Subject: Set html_static_path = ['_static'] everywhere.
+
+---
+ clang-tools-extra/docs/conf.py | 2 +-
+ clang/docs/analyzer/conf.py | 2 +-
+ clang/docs/conf.py | 2 +-
+ polly/docs/conf.py | 2 +-
+ 4 files changed, 4 insertions(+), 4 deletions(-)
+
+diff --git a/clang-tools-extra/docs/conf.py b/clang-tools-extra/docs/conf.py
+index e872c55..69f425a 100644
+--- a/clang-tools-extra/docs/conf.py
++++ b/clang-tools-extra/docs/conf.py
+@@ -121,7 +121,7 @@ html_theme = 'haiku'
+ # Add any paths that contain custom static files (such as style sheets) here,
+ # relative to this directory. They are copied after the builtin static files,
+ # so a file named "default.css" will overwrite the builtin "default.css".
+-html_static_path = []
++html_static_path = ['_static']
+
+ # If not '', a 'Last updated on:' timestamp is inserted at every page bottom,
+ # using the given strftime format.
+diff --git a/clang/docs/analyzer/conf.py b/clang/docs/analyzer/conf.py
+index c40af7a..666308d 100644
+--- a/clang/docs/analyzer/conf.py
++++ b/clang/docs/analyzer/conf.py
+@@ -121,7 +121,7 @@ html_theme = 'haiku'
+ # Add any paths that contain custom static files (such as style sheets) here,
+ # relative to this directory. They are copied after the builtin static files,
+ # so a file named "default.css" will overwrite the builtin "default.css".
+-html_static_path = []
++html_static_path = ['_static']
+
+ # If not '', a 'Last updated on:' timestamp is inserted at every page bottom,
+ # using the given strftime format.
+diff --git a/clang/docs/conf.py b/clang/docs/conf.py
+index a9861cd..d125dc6 100644
+--- a/clang/docs/conf.py
++++ b/clang/docs/conf.py
+@@ -121,7 +121,7 @@ html_theme = 'haiku'
+ # Add any paths that contain custom static files (such as style sheets) here,
+ # relative to this directory. They are copied after the builtin static files,
+ # so a file named "default.css" will overwrite the builtin "default.css".
+-html_static_path = []
++html_static_path = ['_static']
+
+ # If not '', a 'Last updated on:' timestamp is inserted at every page bottom,
+ # using the given strftime format.
+diff --git a/polly/docs/conf.py b/polly/docs/conf.py
+index 64d3968..aa854ad 100644
+--- a/polly/docs/conf.py
++++ b/polly/docs/conf.py
+@@ -127,7 +127,7 @@ except ImportError:
+ # Add any paths that contain custom static files (such as style sheets) here,
+ # relative to this directory. They are copied after the builtin static files,
+ # so a file named "default.css" will overwrite the builtin "default.css".
+-html_static_path = []
++html_static_path = ['_static']
+
+ # If not '', a 'Last updated on:' timestamp is inserted at every page bottom,
+ # using the given strftime format.
--- /dev/null
+From: Nicholas D Steeves <nsteeves@gmail.com>
+Date: Sat, 10 Feb 2018 21:02:17 -0500
+Subject: Use Debian-provided MathJax everywhere.
+
+---
+ clang-tools-extra/docs/Doxyfile | 2 +-
+ clang-tools-extra/docs/conf.py | 3 +++
+ clang-tools-extra/docs/doxygen.cfg.in | 2 +-
+ clang/docs/analyzer/conf.py | 3 +++
+ clang/docs/conf.py | 3 +++
+ clang/docs/doxygen.cfg.in | 2 +-
+ docs/doxygen.cfg.in | 2 +-
+ polly/docs/doxygen.cfg.in | 2 +-
+ 8 files changed, 14 insertions(+), 5 deletions(-)
+
+diff --git a/clang-tools-extra/docs/Doxyfile b/clang-tools-extra/docs/Doxyfile
+index d674390..1bf4f72 100644
+--- a/clang-tools-extra/docs/Doxyfile
++++ b/clang-tools-extra/docs/Doxyfile
+@@ -1206,7 +1206,7 @@ USE_MATHJAX = NO
+ # MathJax, but it is strongly recommended to install a local copy of MathJax
+ # before deployment.
+
+-MATHJAX_RELPATH = http://www.mathjax.org/mathjax
++MATHJAX_RELPATH = /usr/share/javascript/mathjax
+
+ # The MATHJAX_EXTENSIONS tag can be used to specify one or MathJax extension
+ # names that should be enabled during MathJax rendering.
+diff --git a/clang-tools-extra/docs/conf.py b/clang-tools-extra/docs/conf.py
+index 69f425a..46f8eea 100644
+--- a/clang-tools-extra/docs/conf.py
++++ b/clang-tools-extra/docs/conf.py
+@@ -123,6 +123,9 @@ html_theme = 'haiku'
+ # so a file named "default.css" will overwrite the builtin "default.css".
+ html_static_path = ['_static']
+
++# Use Debian-provided MathJax
++mathjax_path = '/usr/share/javascript/mathjax/MathJax.js?config=TeX-AMS-MML_HTMLorMML'
++
+ # If not '', a 'Last updated on:' timestamp is inserted at every page bottom,
+ # using the given strftime format.
+ #html_last_updated_fmt = '%b %d, %Y'
+diff --git a/clang-tools-extra/docs/doxygen.cfg.in b/clang-tools-extra/docs/doxygen.cfg.in
+index 6dbf6db..da44cfc 100644
+--- a/clang-tools-extra/docs/doxygen.cfg.in
++++ b/clang-tools-extra/docs/doxygen.cfg.in
+@@ -1438,7 +1438,7 @@ MATHJAX_FORMAT = HTML-CSS
+ # The default value is: http://cdn.mathjax.org/mathjax/latest.
+ # This tag requires that the tag USE_MATHJAX is set to YES.
+
+-MATHJAX_RELPATH = http://cdn.mathjax.org/mathjax/latest
++MATHJAX_RELPATH = /usr/share/javascript/mathjax
+
+ # The MATHJAX_EXTENSIONS tag can be used to specify one or more MathJax
+ # extension names that should be enabled during MathJax rendering. For example
+diff --git a/clang/docs/analyzer/conf.py b/clang/docs/analyzer/conf.py
+index 666308d..2881bcc 100644
+--- a/clang/docs/analyzer/conf.py
++++ b/clang/docs/analyzer/conf.py
+@@ -123,6 +123,9 @@ html_theme = 'haiku'
+ # so a file named "default.css" will overwrite the builtin "default.css".
+ html_static_path = ['_static']
+
++# Use Debian-provided MathJax
++mathjax_path = '/usr/share/javascript/mathjax/MathJax.js?config=TeX-AMS-MML_HTMLorMML'
++
+ # If not '', a 'Last updated on:' timestamp is inserted at every page bottom,
+ # using the given strftime format.
+ #html_last_updated_fmt = '%b %d, %Y'
+diff --git a/clang/docs/conf.py b/clang/docs/conf.py
+index d125dc6..2ce1a91 100644
+--- a/clang/docs/conf.py
++++ b/clang/docs/conf.py
+@@ -123,6 +123,9 @@ html_theme = 'haiku'
+ # so a file named "default.css" will overwrite the builtin "default.css".
+ html_static_path = ['_static']
+
++# Use Debian-provided MathJax
++mathjax_path = '/usr/share/javascript/mathjax/MathJax.js?config=TeX-AMS-MML_HTMLorMML'
++
+ # If not '', a 'Last updated on:' timestamp is inserted at every page bottom,
+ # using the given strftime format.
+ #html_last_updated_fmt = '%b %d, %Y'
+diff --git a/clang/docs/doxygen.cfg.in b/clang/docs/doxygen.cfg.in
+index 13ed722..77bed6e 100644
+--- a/clang/docs/doxygen.cfg.in
++++ b/clang/docs/doxygen.cfg.in
+@@ -1432,7 +1432,7 @@ MATHJAX_FORMAT = HTML-CSS
+ # The default value is: http://cdn.mathjax.org/mathjax/latest.
+ # This tag requires that the tag USE_MATHJAX is set to YES.
+
+-MATHJAX_RELPATH = http://cdn.mathjax.org/mathjax/latest
++MATHJAX_RELPATH = /usr/share/javascript/mathjax
+
+ # The MATHJAX_EXTENSIONS tag can be used to specify one or more MathJax
+ # extension names that should be enabled during MathJax rendering. For example
+diff --git a/docs/doxygen.cfg.in b/docs/doxygen.cfg.in
+index e3c7f47..dcdade1 100644
+--- a/docs/doxygen.cfg.in
++++ b/docs/doxygen.cfg.in
+@@ -1433,7 +1433,7 @@ MATHJAX_FORMAT = HTML-CSS
+ # The default value is: http://cdn.mathjax.org/mathjax/latest.
+ # This tag requires that the tag USE_MATHJAX is set to YES.
+
+-MATHJAX_RELPATH = http://cdn.mathjax.org/mathjax/latest
++MATHJAX_RELPATH = /usr/share/javascript/mathjax
+
+ # The MATHJAX_EXTENSIONS tag can be used to specify one or more MathJax
+ # extension names that should be enabled during MathJax rendering. For example
+diff --git a/polly/docs/doxygen.cfg.in b/polly/docs/doxygen.cfg.in
+index 36786aa..26a8984 100644
+--- a/polly/docs/doxygen.cfg.in
++++ b/polly/docs/doxygen.cfg.in
+@@ -1433,7 +1433,7 @@ MATHJAX_FORMAT = HTML-CSS
+ # The default value is: http://cdn.mathjax.org/mathjax/latest.
+ # This tag requires that the tag USE_MATHJAX is set to YES.
+
+-MATHJAX_RELPATH = http://cdn.mathjax.org/mathjax/latest
++MATHJAX_RELPATH = /usr/share/javascript/mathjax
+
+ # The MATHJAX_EXTENSIONS tag can be used to specify one or more MathJax
+ # extension names that should be enabled during MathJax rendering. For example
--- /dev/null
+Index: llvm-toolchain-snapshot_3.5~svn210337/clang/lib/Basic/Version.cpp
+===================================================================
+--- llvm-toolchain-snapshot_3.5~svn210337.orig/clang/lib/Basic/Version.cpp
++++ llvm-toolchain-snapshot_3.5~svn210337/clang/lib/Basic/Version.cpp
+@@ -15,6 +15,7 @@
+ #include "clang/Basic/LLVM.h"
+ #include "clang/Config/config.h"
+ #include "llvm/Support/raw_ostream.h"
++#include "clang/Debian/debian_path.h"
+ #include <cstdlib>
+ #include <cstring>
+
+@@ -125,7 +126,7 @@ std::string getClangToolFullVersion(Stri
+ #ifdef CLANG_VENDOR
+ OS << CLANG_VENDOR;
+ #endif
+- OS << ToolName << " version " CLANG_VERSION_STRING " "
++ OS << ToolName << " version " CLANG_VERSION_STRING "-" DEB_PATCHSETVERSION " "
+ << getClangFullRepositoryVersion();
+
+ // If vendor supplied, include the base LLVM version as well.
--- /dev/null
+---
+ clang/include/clang/Basic/Builtins.def | 8 +-
+ clang/lib/AST/Decl.cpp | 12 +--
+ clang/lib/Sema/SemaChecking.cpp | 11 +-
+ clang/lib/StaticAnalyzer/Checkers/GenericTaintChecker.cpp | 6 -
+ clang/test/Sema/builtins.c | 11 +-
+ clang/test/Sema/warn-strlcpycat-size.c | 55 --------------
+ 6 files changed, 25 insertions(+), 78 deletions(-)
+
+--- a/clang/include/clang/Basic/Builtins.def
++++ b/clang/include/clang/Basic/Builtins.def
+@@ -488,8 +488,8 @@ BUILTIN(__builtin___memset_chk, "v*v*izz
+ BUILTIN(__builtin___stpcpy_chk, "c*c*cC*z", "nF")
+ BUILTIN(__builtin___strcat_chk, "c*c*cC*z", "nF")
+ BUILTIN(__builtin___strcpy_chk, "c*c*cC*z", "nF")
+-BUILTIN(__builtin___strlcat_chk, "zc*cC*zz", "nF")
+-BUILTIN(__builtin___strlcpy_chk, "zc*cC*zz", "nF")
++//BUILTIN(__builtin___strlcat_chk, "zc*cC*zz", "nF")
++//BUILTIN(__builtin___strlcpy_chk, "zc*cC*zz", "nF")
+ BUILTIN(__builtin___strncat_chk, "c*c*cC*zz", "nF")
+ BUILTIN(__builtin___strncpy_chk, "c*c*cC*zz", "nF")
+ BUILTIN(__builtin___stpncpy_chk, "c*c*cC*zz", "nF")
+@@ -874,8 +874,8 @@ LIBBUILTIN(getcontext, "iK*", "fj",
+ LIBBUILTIN(_longjmp, "vJi", "fr", "setjmp.h", ALL_GNU_LANGUAGES)
+ LIBBUILTIN(siglongjmp, "vSJi", "fr", "setjmp.h", ALL_GNU_LANGUAGES)
+ // non-standard but very common
+-LIBBUILTIN(strlcpy, "zc*cC*z", "f", "string.h", ALL_GNU_LANGUAGES)
+-LIBBUILTIN(strlcat, "zc*cC*z", "f", "string.h", ALL_GNU_LANGUAGES)
++//LIBBUILTIN(strlcpy, "zc*cC*z", "f", "string.h", ALL_GNU_LANGUAGES)
++//LIBBUILTIN(strlcat, "zc*cC*z", "f", "string.h", ALL_GNU_LANGUAGES)
+ // id objc_msgSend(id, SEL, ...)
+ LIBBUILTIN(objc_msgSend, "GGH.", "f", "objc/message.h", OBJC_LANG)
+ // long double objc_msgSend_fpret(id self, SEL op, ...)
+--- a/clang/lib/AST/Decl.cpp
++++ b/clang/lib/AST/Decl.cpp
+@@ -3455,13 +3455,13 @@ unsigned FunctionDecl::getMemoryFunction
+ case Builtin::BImemmove:
+ return Builtin::BImemmove;
+
+- case Builtin::BIstrlcpy:
+- case Builtin::BI__builtin___strlcpy_chk:
+- return Builtin::BIstrlcpy;
++// case Builtin::BIstrlcpy:
++// case Builtin::BI__builtin___strlcpy_chk:
++// return Builtin::BIstrlcpy;
+
+- case Builtin::BIstrlcat:
+- case Builtin::BI__builtin___strlcat_chk:
+- return Builtin::BIstrlcat;
++// case Builtin::BIstrlcat:
++// case Builtin::BI__builtin___strlcat_chk:
++// return Builtin::BIstrlcat;
+
+ case Builtin::BI__builtin_memcmp:
+ case Builtin::BImemcmp:
+--- a/clang/lib/Sema/SemaChecking.cpp
++++ b/clang/lib/Sema/SemaChecking.cpp
+@@ -975,8 +975,8 @@ Sema::CheckBuiltinFunctionCall(FunctionD
+ case Builtin::BI__builtin___memcpy_chk:
+ case Builtin::BI__builtin___memmove_chk:
+ case Builtin::BI__builtin___memset_chk:
+- case Builtin::BI__builtin___strlcat_chk:
+- case Builtin::BI__builtin___strlcpy_chk:
++// case Builtin::BI__builtin___strlcat_chk:
++// case Builtin::BI__builtin___strlcpy_chk:
+ case Builtin::BI__builtin___strncat_chk:
+ case Builtin::BI__builtin___strncpy_chk:
+ case Builtin::BI__builtin___stpncpy_chk:
+@@ -2512,9 +2512,10 @@ bool Sema::CheckFunctionCall(FunctionDec
+ return false;
+
+ // Handle memory setting and copying functions.
+- if (CMId == Builtin::BIstrlcpy || CMId == Builtin::BIstrlcat)
+- CheckStrlcpycatArguments(TheCall, FnInfo);
+- else if (CMId == Builtin::BIstrncat)
++// if (CMId == Builtin::BIstrlcpy || CMId == Builtin::BIstrlcat)
++// CheckStrlcpycatArguments(TheCall, FnInfo);
++// else
++ if (CMId == Builtin::BIstrncat)
+ CheckStrncatArguments(TheCall, FnInfo);
+ else
+ CheckMemaccessArguments(TheCall, CMId, FnInfo);
+--- a/clang/lib/StaticAnalyzer/Checkers/GenericTaintChecker.cpp
++++ b/clang/lib/StaticAnalyzer/Checkers/GenericTaintChecker.cpp
+@@ -237,9 +237,9 @@ GenericTaintChecker::TaintPropagationRul
+ case Builtin::BIstrncpy:
+ case Builtin::BIstrncat:
+ return TaintPropagationRule(1, 2, 0, true);
+- case Builtin::BIstrlcpy:
+- case Builtin::BIstrlcat:
+- return TaintPropagationRule(1, 2, 0, false);
++// case Builtin::BIstrlcpy:
++// case Builtin::BIstrlcat:
++// return TaintPropagationRule(1, 2, 0, false);
+ case Builtin::BIstrndup:
+ return TaintPropagationRule(0, 1, ReturnValueIndex);
+
+--- a/clang/test/Sema/builtins.c
++++ b/clang/test/Sema/builtins.c
+@@ -190,11 +190,11 @@ void test18() {
+
+ ptr = __builtin___memccpy_chk(dst, src, '\037', sizeof(src), sizeof(dst));
+ result = __builtin___strlcpy_chk(dst, src, sizeof(dst), sizeof(dst));
+- result = __builtin___strlcat_chk(dst, src, sizeof(dst), sizeof(dst));
++// result = __builtin___strlcat_chk(dst, src, sizeof(dst), sizeof(dst));
+
+ ptr = __builtin___memccpy_chk(dst, src, '\037', sizeof(src)); // expected-error {{too few arguments to function call}}
+ ptr = __builtin___strlcpy_chk(dst, src, sizeof(dst), sizeof(dst)); // expected-warning {{incompatible integer to pointer conversion}}
+- ptr = __builtin___strlcat_chk(dst, src, sizeof(dst), sizeof(dst)); // expected-warning {{incompatible integer to pointer conversion}}
++// ptr = __builtin___strlcat_chk(dst, src, sizeof(dst), sizeof(dst)); // expected-warning {{incompatible integer to pointer conversion}}
+ }
+
+ void no_ms_builtins() {
+@@ -209,12 +209,12 @@ void unavailable() {
+ }
+
+ // rdar://18259539
+-size_t strlcpy(char * restrict dst, const char * restrict src, size_t size);
+-size_t strlcat(char * restrict dst, const char * restrict src, size_t size);
++//size_t strlcpy(char * restrict dst, const char * restrict src, size_t size);
++//size_t strlcat(char * restrict dst, const char * restrict src, size_t size);
+
+ void Test19(void)
+ {
+- static char b[40];
++/* static char b[40];
+ static char buf[20];
+
+ strlcpy(buf, b, sizeof(b)); // expected-warning {{size argument in 'strlcpy' call appears to be size of the source; expected the size of the destination}} \\
+@@ -229,6 +229,7 @@ void Test19(void)
+ __builtin___strlcat_chk(buf, b, sizeof(b), __builtin_object_size(buf, 0)); // expected-warning {{size argument in '__builtin___strlcat_chk' call appears to be size of the source; expected the size of the destination}} \
+ // expected-note {{change size argument to be the size of the destination}} \
+ // expected-warning {{'__builtin___strlcat_chk' will always overflow destination buffer}}
++ */
+ }
+
+ // rdar://11076881
+--- a/clang/test/Sema/warn-strlcpycat-size.c
++++ /dev/null
+@@ -1,55 +0,0 @@
+-// RUN: %clang_cc1 -Wstrlcpy-strlcat-size -verify -fsyntax-only %s
+-
+-typedef __SIZE_TYPE__ size_t;
+-size_t strlcpy (char * restrict dst, const char * restrict src, size_t size);
+-size_t strlcat (char * restrict dst, const char * restrict src, size_t size);
+-size_t strlen (const char *s);
+-
+-char s1[100];
+-char s2[200];
+-char * s3;
+-
+-struct {
+- char f1[100];
+- char f2[100][3];
+-} s4, **s5;
+-
+-int x;
+-
+-void f(void)
+-{
+- strlcpy(s1, s2, sizeof(s1)); // no warning
+- strlcpy(s1, s2, sizeof(s2)); // expected-warning {{size argument in 'strlcpy' call appears to be size of the source; expected the size of the destination}} expected-note {{change size argument to be the size of the destination}}
+- strlcpy(s1, s3, strlen(s3)+1); // expected-warning {{size argument in 'strlcpy' call appears to be size of the source; expected the size of the destination}} expected-note {{change size argument to be the size of the destination}}
+- strlcat(s2, s3, sizeof(s3)); // expected-warning {{size argument in 'strlcat' call appears to be size of the source; expected the size of the destination}} expected-note {{change size argument to be the size of the destination}}
+- strlcpy(s4.f1, s2, sizeof(s2)); // expected-warning {{size argument in 'strlcpy' call appears to be size of the source; expected the size of the destination}} expected-note {{change size argument to be the size of the destination}}
+- strlcpy((*s5)->f2[x], s2, sizeof(s2)); // expected-warning {{size argument in 'strlcpy' call appears to be size of the source; expected the size of the destination}} expected-note {{change size argument to be the size of the destination}}
+- strlcpy(s1+3, s2, sizeof(s2)); // expected-warning {{size argument in 'strlcpy' call appears to be size of the source; expected the size of the destination}}
+-}
+-
+-// Don't issue FIXIT for flexible arrays.
+-struct S {
+- int y;
+- char x[];
+-};
+-
+-void flexible_arrays(struct S *s) {
+- char str[] = "hi";
+- strlcpy(s->x, str, sizeof(str)); // expected-warning {{size argument in 'strlcpy' call appears to be size of the source; expected the size of the destination}}
+-}
+-
+-// Don't issue FIXIT for destinations of size 1.
+-void size_1() {
+- char z[1];
+- char str[] = "hi";
+-
+- strlcpy(z, str, sizeof(str)); // expected-warning {{size argument in 'strlcpy' call appears to be size of the source; expected the size of the destination}}
+-}
+-
+-// Support VLAs.
+-void vlas(int size) {
+- char z[size];
+- char str[] = "hi";
+-
+- strlcpy(z, str, sizeof(str)); // expected-warning {{size argument in 'strlcpy' call appears to be size of the source; expected the size of the destination}} expected-note {{change size argument to be the size of the destination}}
+-}
--- /dev/null
+Description: set correct float abi settings for armel and armhf
+ debian armel supports systems that don't have a fpu so should use a "float abi"
+ setting of soft by default.
+
+ Debian armhf needs a float abi setting of "hard"
+Author: Peter Michael Green <plugwash@debian.org>
+
+---
+The information above should follow the Patch Tagging Guidelines, please
+checkout http://dep.debian.net/deps/dep3/ to learn about the format. Here
+are templates for supplementary fields that you might want to add:
+
+Origin: <vendor|upstream|other>, <url of original patch>
+Bug: <url in upstream bugtracker>
+Bug-Debian: http://bugs.debian.org/<bugnumber>
+Bug-Ubuntu: https://launchpad.net/bugs/<bugnumber>
+Forwarded: <no|not-needed|url proving that it has been forwarded>
+Reviewed-By: <name and email of someone who approved the patch>
+Last-Update: <YYYY-MM-DD>
+
+Index: llvm-toolchain-snapshot_5.0~svn297449/clang/lib/Driver/ToolChains/Arch/ARM.cpp
+===================================================================
+--- llvm-toolchain-snapshot_5.0~svn297449.orig/clang/lib/Driver/ToolChains/Arch/ARM.cpp
++++ llvm-toolchain-snapshot_5.0~svn297449/clang/lib/Driver/ToolChains/Arch/ARM.cpp
+@@ -206,7 +206,7 @@ arm::FloatABI arm::getARMFloatABI(const
+ case llvm::Triple::MuslEABI:
+ case llvm::Triple::EABI:
+ // EABI is always AAPCS, and if it was not marked 'hard', it's softfp
+- ABI = FloatABI::SoftFP;
++ ABI = FloatABI::Soft;
+ break;
+ case llvm::Triple::Android:
+ ABI = (SubArch == 7) ? FloatABI::SoftFP : FloatABI::Soft;
--- /dev/null
+Index: llvm-toolchain-snapshot_5.0~svn301630/clang/lib/Headers/stdint.h
+===================================================================
+--- llvm-toolchain-snapshot_5.0~svn301630.orig/clang/lib/Headers/stdint.h
++++ llvm-toolchain-snapshot_5.0~svn301630/clang/lib/Headers/stdint.h
+@@ -22,8 +22,6 @@
+ *
+ \*===----------------------------------------------------------------------===*/
+
+-#ifndef __CLANG_STDINT_H
+-#define __CLANG_STDINT_H
+
+ /* If we're hosted, fall back to the system's stdint.h, which might have
+ * additional definitions.
+@@ -72,6 +70,8 @@
+ # endif
+
+ #else
++#ifndef __CLANG_STDINT_H
++#define __CLANG_STDINT_H
+
+ /* C99 7.18.1.1 Exact-width integer types.
+ * C99 7.18.1.2 Minimum-width integer types.
+@@ -700,5 +700,5 @@ typedef __UINTMAX_TYPE__ uintmax_t;
+ #define INTMAX_C(v) __int_c(v, __INTMAX_C_SUFFIX__)
+ #define UINTMAX_C(v) __int_c(v, __UINTMAX_C_SUFFIX__)
+
+-#endif /* __STDC_HOSTED__ */
+ #endif /* __CLANG_STDINT_H */
++#endif /* __STDC_HOSTED__ */
--- /dev/null
+From 947f9692440836dcb8d88b74b69dd379d85974ce Mon Sep 17 00:00:00 2001
+From: Evgenii Stepanov <eugenis@google.com>
+Date: Mon, 25 Nov 2019 13:52:17 -0800
+Subject: [PATCH] Fix sanitizer-common build with glibc 2.31
+
+Summary:
+As mentioned in D69104, glibc changed ABI recently with the [[ https://sourceware.org/git/?p=glibc.git;a=commitdiff;h=2f959dfe849e0646e27403f2e4091536496ac0f0| 2f959dfe ]] change.
+D69104 dealt with just 32-bit ARM, but that is just one of the many affected architectures.
+E.g. x86_64, i?86, riscv64, sparc 32-bit, s390 31-bit are affected too (and various others).
+
+This patch instead of adding a long list of further architectures that wouldn't be checked ever next to arm 32-bit changes the structures to match the 2.31 layout and performs the checking on Linux for ipc_perm mode position/size only on non-Linux or on Linux with glibc 2.31 or later. I think this matches what is done for aarch64 already.
+If needed, we could list architectures that haven't changed ABI (e.g. powerpc), so that they would be checked even with older glibcs. AFAIK sanitizers don't actually use ipc_perm.mode and
+so all they care about is the size and alignment of the whole structure.
+
+Note, s390 31-bit and arm 32-bit big-endian changed ABI even further, there will now be shmctl with old symbol version and shmctl@@GLIBC_2.31 which will be incompatible. I'm afraid this isn't really solvable unless the sanitizer libraries are symbol versioned and use matching symbol versions to glibc symbols for stuff they intercept, plus use dlvsym.
+This patch doesn't try to address that.
+
+Patch by Jakub Jelinek.
+
+Reviewers: kcc, eugenis, dvyukov
+
+Reviewed By: eugenis
+
+Subscribers: jyknight, kristof.beyls, fedor.sergeev, simoncook, PkmX, s.egerton, steven.zhang, #sanitizers, llvm-commits
+
+Tags: #sanitizers, #llvm
+
+Differential Revision: https://reviews.llvm.org/D70662
+---
+ .../sanitizer_platform_limits_posix.cpp | 8 +++-----
+ .../sanitizer_platform_limits_posix.h | 15 +--------------
+ 2 files changed, 4 insertions(+), 19 deletions(-)
+
+Index: llvm-toolchain-6.0-6.0.1/compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cc
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cc
++++ llvm-toolchain-6.0-6.0.1/compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cc
+@@ -1151,8 +1151,9 @@
+ CHECK_SIZE_AND_OFFSET(ipc_perm, gid);
+ CHECK_SIZE_AND_OFFSET(ipc_perm, cuid);
+ CHECK_SIZE_AND_OFFSET(ipc_perm, cgid);
+-#if !defined(__aarch64__) || !SANITIZER_LINUX || __GLIBC_PREREQ (2, 21)
+-/* On aarch64 glibc 2.20 and earlier provided incorrect mode field. */
++#if !SANITIZER_LINUX || __GLIBC_PREREQ (2, 31)
++/* glibc 2.30 and earlier provided 16-bit mode field instead of 32-bit
++ on many architectures. */
+ CHECK_SIZE_AND_OFFSET(ipc_perm, mode);
+ #endif
+
+Index: llvm-toolchain-6.0-6.0.1/compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
++++ llvm-toolchain-6.0-6.0.1/compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
+@@ -213,26 +213,13 @@
+ u64 __unused1;
+ u64 __unused2;
+ #elif defined(__sparc__)
+-#if defined(__arch64__)
+ unsigned mode;
+- unsigned short __pad1;
+-#else
+- unsigned short __pad1;
+- unsigned short mode;
+ unsigned short __pad2;
+-#endif
+ unsigned short __seq;
+ unsigned long long __unused1;
+ unsigned long long __unused2;
+-#elif defined(__mips__) || defined(__aarch64__) || defined(__s390x__)
+- unsigned int mode;
+- unsigned short __seq;
+- unsigned short __pad1;
+- unsigned long __unused1;
+- unsigned long __unused2;
+ #else
+- unsigned short mode;
+- unsigned short __pad1;
++ unsigned int mode;
+ unsigned short __seq;
+ unsigned short __pad2;
+ #if defined(__x86_64__) && !defined(_LP64)
--- /dev/null
+Index: llvm-toolchain-6.0-6.0.1/include/llvm/IR/Dominators.h
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/include/llvm/IR/Dominators.h
++++ llvm-toolchain-6.0-6.0.1/include/llvm/IR/Dominators.h
+@@ -290,6 +290,90 @@ public:
+ void print(raw_ostream &OS, const Module *M = nullptr) const override;
+ };
+
++//===-------------------------------------
++/// \brief Class to defer updates to a DominatorTree.
++///
++/// Definition: Applying updates to every edge insertion and deletion is
++/// expensive and not necessary. When one needs the DominatorTree for analysis
++/// they can request a flush() to perform a larger batch update. This has the
++/// advantage of the DominatorTree inspecting the set of updates to find
++/// duplicates or unnecessary subtree updates.
++///
++/// The scope of DeferredDominance operates at a Function level.
++///
++/// It is not necessary for the user to scrub the updates for duplicates or
++/// updates that point to the same block (Delete, BB_A, BB_A). Performance
++/// can be gained if the caller attempts to batch updates before submitting
++/// to applyUpdates(ArrayRef) in cases where duplicate edge requests will
++/// occur.
++///
++/// It is required for the state of the LLVM IR to be applied *before*
++/// submitting updates. The update routines must analyze the current state
++/// between a pair of (From, To) basic blocks to determine if the update
++/// needs to be queued.
++/// Example (good):
++/// TerminatorInstructionBB->removeFromParent();
++/// DDT->deleteEdge(BB, Successor);
++/// Example (bad):
++/// DDT->deleteEdge(BB, Successor);
++/// TerminatorInstructionBB->removeFromParent();
++class DeferredDominance {
++public:
++ DeferredDominance(DominatorTree &DT_) : DT(DT_) {}
++
++ /// \brief Queues multiple updates and discards duplicates.
++ void applyUpdates(ArrayRef<DominatorTree::UpdateType> Updates);
++
++ /// \brief Helper method for a single edge insertion. It's almost always
++ /// better to batch updates and call applyUpdates to quickly remove duplicate
++ /// edges. This is best used when there is only a single insertion needed to
++ /// update Dominators.
++ void insertEdge(BasicBlock *From, BasicBlock *To);
++
++ /// \brief Helper method for a single edge deletion. It's almost always better
++ /// to batch updates and call applyUpdates to quickly remove duplicate edges.
++ /// This is best used when there is only a single deletion needed to update
++ /// Dominators.
++ void deleteEdge(BasicBlock *From, BasicBlock *To);
++
++ /// \brief Delays the deletion of a basic block until a flush() event.
++ void deleteBB(BasicBlock *DelBB);
++
++ /// \brief Returns true if DelBB is awaiting deletion at a flush() event.
++ bool pendingDeletedBB(BasicBlock *DelBB);
++
++ /// \brief Flushes all pending updates and block deletions. Returns a
++ /// correct DominatorTree reference to be used by the caller for analysis.
++ DominatorTree &flush();
++
++ /// \brief Drops all internal state and forces a (slow) recalculation of the
++ /// DominatorTree based on the current state of the LLVM IR in F. This should
++ /// only be used in corner cases such as the Entry block of F being deleted.
++ void recalculate(Function &F);
++
++ /// \brief Debug method to help view the state of pending updates.
++ LLVM_DUMP_METHOD void dump() const;
++
++private:
++ DominatorTree &DT;
++ SmallVector<DominatorTree::UpdateType, 16> PendUpdates;
++ SmallPtrSet<BasicBlock *, 8> DeletedBBs;
++
++ /// Apply an update (Kind, From, To) to the internal queued updates. The
++ /// update is only added when determined to be necessary. Checks for
++ /// self-domination, unnecessary updates, duplicate requests, and balanced
++ /// pairs of requests are all performed. Returns true if the update is
++ /// queued and false if it is discarded.
++ bool applyUpdate(DominatorTree::UpdateKind Kind, BasicBlock *From,
++ BasicBlock *To);
++
++ /// Performs all pending basic block deletions. We have to defer the deletion
++ /// of these blocks until after the DominatorTree updates are applied. The
++ /// internal workings of the DominatorTree code expect every update's From
++ /// and To blocks to exist and to be a member of the same Function.
++ bool flushDelBB();
++};
++
+ } // end namespace llvm
+
+ #endif // LLVM_IR_DOMINATORS_H
+Index: llvm-toolchain-6.0-6.0.1/include/llvm/Transforms/Scalar/JumpThreading.h
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/include/llvm/Transforms/Scalar/JumpThreading.h
++++ llvm-toolchain-6.0-6.0.1/include/llvm/Transforms/Scalar/JumpThreading.h
+@@ -34,6 +34,7 @@ class BinaryOperator;
+ class BranchInst;
+ class CmpInst;
+ class Constant;
++class DeferredDominance;
+ class Function;
+ class Instruction;
+ class IntrinsicInst;
+@@ -77,6 +78,7 @@ class JumpThreadingPass : public PassInf
+ TargetLibraryInfo *TLI;
+ LazyValueInfo *LVI;
+ AliasAnalysis *AA;
++ DeferredDominance *DDT;
+ std::unique_ptr<BlockFrequencyInfo> BFI;
+ std::unique_ptr<BranchProbabilityInfo> BPI;
+ bool HasProfileData = false;
+@@ -107,8 +109,8 @@ public:
+
+ // Glue for old PM.
+ bool runImpl(Function &F, TargetLibraryInfo *TLI_, LazyValueInfo *LVI_,
+- AliasAnalysis *AA_, bool HasProfileData_,
+- std::unique_ptr<BlockFrequencyInfo> BFI_,
++ AliasAnalysis *AA_, DeferredDominance *DDT_,
++ bool HasProfileData_, std::unique_ptr<BlockFrequencyInfo> BFI_,
+ std::unique_ptr<BranchProbabilityInfo> BPI_);
+
+ PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
+Index: llvm-toolchain-6.0-6.0.1/include/llvm/Transforms/Utils/BasicBlockUtils.h
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/include/llvm/Transforms/Utils/BasicBlockUtils.h
++++ llvm-toolchain-6.0-6.0.1/include/llvm/Transforms/Utils/BasicBlockUtils.h
+@@ -27,6 +27,7 @@ namespace llvm {
+
+ class BlockFrequencyInfo;
+ class BranchProbabilityInfo;
++class DeferredDominance;
+ class DominatorTree;
+ class Function;
+ class Instruction;
+@@ -38,7 +39,7 @@ class TargetLibraryInfo;
+ class Value;
+
+ /// Delete the specified block, which must have no predecessors.
+-void DeleteDeadBlock(BasicBlock *BB);
++void DeleteDeadBlock(BasicBlock *BB, DeferredDominance *DDT = nullptr);
+
+ /// We know that BB has one predecessor. If there are any single-entry PHI nodes
+ /// in it, fold them away. This handles the case when all entries to the PHI
+Index: llvm-toolchain-6.0-6.0.1/include/llvm/Transforms/Utils/Local.h
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/include/llvm/Transforms/Utils/Local.h
++++ llvm-toolchain-6.0-6.0.1/include/llvm/Transforms/Utils/Local.h
+@@ -117,7 +117,8 @@ struct SimplifyCFGOptions {
+ /// conditions and indirectbr addresses this might make dead if
+ /// DeleteDeadConditions is true.
+ bool ConstantFoldTerminator(BasicBlock *BB, bool DeleteDeadConditions = false,
+- const TargetLibraryInfo *TLI = nullptr);
++ const TargetLibraryInfo *TLI = nullptr,
++ DeferredDominance *DDT = nullptr);
+
+ //===----------------------------------------------------------------------===//
+ // Local dead code elimination.
+@@ -171,18 +172,21 @@ bool SimplifyInstructionsInBlock(BasicBl
+ ///
+ /// .. and delete the predecessor corresponding to the '1', this will attempt to
+ /// recursively fold the 'and' to 0.
+-void RemovePredecessorAndSimplify(BasicBlock *BB, BasicBlock *Pred);
++void RemovePredecessorAndSimplify(BasicBlock *BB, BasicBlock *Pred,
++ DeferredDominance *DDT = nullptr);
+
+ /// BB is a block with one predecessor and its predecessor is known to have one
+ /// successor (BB!). Eliminate the edge between them, moving the instructions in
+ /// the predecessor into BB. This deletes the predecessor block.
+-void MergeBasicBlockIntoOnlyPred(BasicBlock *BB, DominatorTree *DT = nullptr);
++void MergeBasicBlockIntoOnlyPred(BasicBlock *BB, DominatorTree *DT = nullptr,
++ DeferredDominance *DDT = nullptr);
+
+ /// BB is known to contain an unconditional branch, and contains no instructions
+ /// other than PHI nodes, potential debug intrinsics and the branch. If
+ /// possible, eliminate BB by rewriting all the predecessors to branch to the
+ /// successor block and return true. If we can't transform, return false.
+-bool TryToSimplifyUncondBranchFromEmptyBlock(BasicBlock *BB);
++bool TryToSimplifyUncondBranchFromEmptyBlock(BasicBlock *BB,
++ DeferredDominance *DDT = nullptr);
+
+ /// Check for and eliminate duplicate PHI nodes in this block. This doesn't try
+ /// to be clever about PHI nodes which differ only in the order of the incoming
+@@ -382,7 +386,8 @@ unsigned removeAllNonTerminatorAndEHPadI
+ /// Insert an unreachable instruction before the specified
+ /// instruction, making it and the rest of the code in the block dead.
+ unsigned changeToUnreachable(Instruction *I, bool UseLLVMTrap,
+- bool PreserveLCSSA = false);
++ bool PreserveLCSSA = false,
++ DeferredDominance *DDT = nullptr);
+
+ /// Convert the CallInst to InvokeInst with the specified unwind edge basic
+ /// block. This also splits the basic block where CI is located, because
+@@ -397,12 +402,13 @@ BasicBlock *changeToInvokeAndSplitBasicB
+ ///
+ /// \param BB Block whose terminator will be replaced. Its terminator must
+ /// have an unwind successor.
+-void removeUnwindEdge(BasicBlock *BB);
++void removeUnwindEdge(BasicBlock *BB, DeferredDominance *DDT = nullptr);
+
+ /// Remove all blocks that can not be reached from the function's entry.
+ ///
+ /// Returns true if any basic block was removed.
+-bool removeUnreachableBlocks(Function &F, LazyValueInfo *LVI = nullptr);
++bool removeUnreachableBlocks(Function &F, LazyValueInfo *LVI = nullptr,
++ DeferredDominance *DDT = nullptr);
+
+ /// Combine the metadata of two instructions so that K can replace J
+ ///
+Index: llvm-toolchain-6.0-6.0.1/lib/IR/Dominators.cpp
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/IR/Dominators.cpp
++++ llvm-toolchain-6.0-6.0.1/lib/IR/Dominators.cpp
+@@ -18,6 +18,7 @@
+ #include "llvm/ADT/DepthFirstIterator.h"
+ #include "llvm/ADT/SmallPtrSet.h"
+ #include "llvm/IR/CFG.h"
++#include "llvm/IR/Constants.h"
+ #include "llvm/IR/Instructions.h"
+ #include "llvm/IR/PassManager.h"
+ #include "llvm/Support/CommandLine.h"
+@@ -389,3 +390,190 @@ void DominatorTreeWrapperPass::print(raw
+ DT.print(OS);
+ }
+
++//===----------------------------------------------------------------------===//
++// DeferredDominance Implementation
++//===----------------------------------------------------------------------===//
++//
++// The implementation details of the DeferredDominance class which allows
++// one to queue updates to a DominatorTree.
++//
++//===----------------------------------------------------------------------===//
++
++/// \brief Queues multiple updates and discards duplicates.
++void DeferredDominance::applyUpdates(
++ ArrayRef<DominatorTree::UpdateType> Updates) {
++ SmallVector<DominatorTree::UpdateType, 8> Seen;
++ for (auto U : Updates)
++ // Avoid duplicates to applyUpdate() to save on analysis.
++ if (std::none_of(Seen.begin(), Seen.end(),
++ [U](DominatorTree::UpdateType S) { return S == U; })) {
++ Seen.push_back(U);
++ applyUpdate(U.getKind(), U.getFrom(), U.getTo());
++ }
++}
++
++/// \brief Helper method for a single edge insertion. It's almost always better
++/// to batch updates and call applyUpdates to quickly remove duplicate edges.
++/// This is best used when there is only a single insertion needed to update
++/// Dominators.
++void DeferredDominance::insertEdge(BasicBlock *From, BasicBlock *To) {
++ applyUpdate(DominatorTree::Insert, From, To);
++}
++
++/// \brief Helper method for a single edge deletion. It's almost always better
++/// to batch updates and call applyUpdates to quickly remove duplicate edges.
++/// This is best used when there is only a single deletion needed to update
++/// Dominators.
++void DeferredDominance::deleteEdge(BasicBlock *From, BasicBlock *To) {
++ applyUpdate(DominatorTree::Delete, From, To);
++}
++
++/// \brief Delays the deletion of a basic block until a flush() event.
++void DeferredDominance::deleteBB(BasicBlock *DelBB) {
++ assert(DelBB && "Invalid push_back of nullptr DelBB.");
++ assert(pred_empty(DelBB) && "DelBB has one or more predecessors.");
++ // DelBB is unreachable and all its instructions are dead.
++ while (!DelBB->empty()) {
++ Instruction &I = DelBB->back();
++ // Replace used instructions with an arbitrary value (undef).
++ if (!I.use_empty())
++ I.replaceAllUsesWith(llvm::UndefValue::get(I.getType()));
++ DelBB->getInstList().pop_back();
++ }
++ // Make sure DelBB has a valid terminator instruction. As long as DelBB is a
++ // Child of Function F it must contain valid IR.
++ new UnreachableInst(DelBB->getContext(), DelBB);
++ DeletedBBs.insert(DelBB);
++}
++
++/// \brief Returns true if DelBB is awaiting deletion at a flush() event.
++bool DeferredDominance::pendingDeletedBB(BasicBlock *DelBB) {
++ if (DeletedBBs.empty())
++ return false;
++ return DeletedBBs.count(DelBB) != 0;
++}
++
++/// \brief Flushes all pending updates and block deletions. Returns a
++/// correct DominatorTree reference to be used by the caller for analysis.
++DominatorTree &DeferredDominance::flush() {
++ // Updates to DT must happen before blocks are deleted below. Otherwise the
++ // DT traversal will encounter badref blocks and assert.
++ if (!PendUpdates.empty()) {
++ DT.applyUpdates(PendUpdates);
++ PendUpdates.clear();
++ }
++ flushDelBB();
++ return DT;
++}
++
++/// \brief Drops all internal state and forces a (slow) recalculation of the
++/// DominatorTree based on the current state of the LLVM IR in F. This should
++/// only be used in corner cases such as the Entry block of F being deleted.
++void DeferredDominance::recalculate(Function &F) {
++ // flushDelBB must be flushed before the recalculation. The state of the IR
++ // must be consistent before the DT traversal algorithm determines the
++ // actual DT.
++ if (flushDelBB() || !PendUpdates.empty()) {
++ DT.recalculate(F);
++ PendUpdates.clear();
++ }
++}
++
++/// \brief Debug method to help view the state of pending updates.
++#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
++LLVM_DUMP_METHOD void DeferredDominance::dump() const {
++ raw_ostream &OS = llvm::dbgs();
++ OS << "PendUpdates:\n";
++ int I = 0;
++ for (auto U : PendUpdates) {
++ OS << " " << I << " : ";
++ ++I;
++ if (U.getKind() == DominatorTree::Insert)
++ OS << "Insert, ";
++ else
++ OS << "Delete, ";
++ BasicBlock *From = U.getFrom();
++ if (From) {
++ auto S = From->getName();
++ if (!From->hasName())
++ S = "(no name)";
++ OS << S << "(" << From << "), ";
++ } else {
++ OS << "(badref), ";
++ }
++ BasicBlock *To = U.getTo();
++ if (To) {
++ auto S = To->getName();
++ if (!To->hasName())
++ S = "(no_name)";
++ OS << S << "(" << To << ")\n";
++ } else {
++ OS << "(badref)\n";
++ }
++ }
++ OS << "DeletedBBs:\n";
++ I = 0;
++ for (auto BB : DeletedBBs) {
++ OS << " " << I << " : ";
++ ++I;
++ if (BB->hasName())
++ OS << BB->getName() << "(";
++ else
++ OS << "(no_name)(";
++ OS << BB << ")\n";
++ }
++}
++#endif
++
++/// Apply an update (Kind, From, To) to the internal queued updates. The
++/// update is only added when determined to be necessary. Checks for
++/// self-domination, unnecessary updates, duplicate requests, and balanced
++/// pairs of requests are all performed. Returns true if the update is
++/// queued and false if it is discarded.
++bool DeferredDominance::applyUpdate(DominatorTree::UpdateKind Kind,
++ BasicBlock *From, BasicBlock *To) {
++ if (From == To)
++ return false; // Cannot dominate self; discard update.
++
++ // Discard updates by inspecting the current state of successors of From.
++ // Since applyUpdate() must be called *after* the Terminator of From is
++ // altered we can determine if the update is unnecessary.
++ bool HasEdge = std::any_of(succ_begin(From), succ_end(From),
++ [To](BasicBlock *B) { return B == To; });
++ if (Kind == DominatorTree::Insert && !HasEdge)
++ return false; // Unnecessary Insert: edge does not exist in IR.
++ if (Kind == DominatorTree::Delete && HasEdge)
++ return false; // Unnecessary Delete: edge still exists in IR.
++
++ // Analyze pending updates to determine if the update is unnecessary.
++ DominatorTree::UpdateType Update = {Kind, From, To};
++ DominatorTree::UpdateType Invert = {Kind != DominatorTree::Insert
++ ? DominatorTree::Insert
++ : DominatorTree::Delete,
++ From, To};
++ for (auto I = PendUpdates.begin(), E = PendUpdates.end(); I != E; ++I) {
++ if (Update == *I)
++ return false; // Discard duplicate updates.
++ if (Invert == *I) {
++ // Update and Invert are both valid (equivalent to a no-op). Remove
++ // Invert from PendUpdates and discard the Update.
++ PendUpdates.erase(I);
++ return false;
++ }
++ }
++ PendUpdates.push_back(Update); // Save the valid update.
++ return true;
++}
++
++/// Performs all pending basic block deletions. We have to defer the deletion
++/// of these blocks until after the DominatorTree updates are applied. The
++/// internal workings of the DominatorTree code expect every update's From
++/// and To blocks to exist and to be a member of the same Function.
++bool DeferredDominance::flushDelBB() {
++ if (DeletedBBs.empty())
++ return false;
++ for (auto *BB : DeletedBBs)
++ BB->eraseFromParent();
++ DeletedBBs.clear();
++ return true;
++}
+Index: llvm-toolchain-6.0-6.0.1/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
++++ llvm-toolchain-6.0-6.0.1/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
+@@ -77,6 +77,7 @@ namespace {
+ bool runOnFunction(Function &F) override;
+
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
++ AU.addRequired<DominatorTreeWrapperPass>();
+ AU.addRequired<LazyValueInfoWrapperPass>();
+ AU.addPreserved<GlobalsAAWrapperPass>();
+ }
+@@ -88,6 +89,7 @@ char CorrelatedValuePropagation::ID = 0;
+
+ INITIALIZE_PASS_BEGIN(CorrelatedValuePropagation, "correlated-propagation",
+ "Value Propagation", false, false)
++INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
+ INITIALIZE_PASS_DEPENDENCY(LazyValueInfoWrapperPass)
+ INITIALIZE_PASS_END(CorrelatedValuePropagation, "correlated-propagation",
+ "Value Propagation", false, false)
+Index: llvm-toolchain-6.0-6.0.1/lib/Transforms/Scalar/JumpThreading.cpp
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/Transforms/Scalar/JumpThreading.cpp
++++ llvm-toolchain-6.0-6.0.1/lib/Transforms/Scalar/JumpThreading.cpp
+@@ -131,10 +131,11 @@ namespace {
+ bool runOnFunction(Function &F) override;
+
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
+- if (PrintLVIAfterJumpThreading)
+- AU.addRequired<DominatorTreeWrapperPass>();
++ AU.addRequired<DominatorTreeWrapperPass>();
++ AU.addPreserved<DominatorTreeWrapperPass>();
+ AU.addRequired<AAResultsWrapperPass>();
+ AU.addRequired<LazyValueInfoWrapperPass>();
++ AU.addPreserved<LazyValueInfoWrapperPass>();
+ AU.addPreserved<GlobalsAAWrapperPass>();
+ AU.addRequired<TargetLibraryInfoWrapperPass>();
+ }
+@@ -148,6 +149,7 @@ char JumpThreading::ID = 0;
+
+ INITIALIZE_PASS_BEGIN(JumpThreading, "jump-threading",
+ "Jump Threading", false, false)
++INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
+ INITIALIZE_PASS_DEPENDENCY(LazyValueInfoWrapperPass)
+ INITIALIZE_PASS_DEPENDENCY(TargetLibraryInfoWrapperPass)
+ INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
+@@ -278,8 +280,12 @@ bool JumpThreading::runOnFunction(Functi
+ if (skipFunction(F))
+ return false;
+ auto TLI = &getAnalysis<TargetLibraryInfoWrapperPass>().getTLI();
++ // Get DT analysis before LVI. When LVI is initialized it conditionally adds
++ // DT if it's available.
++ auto DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
+ auto LVI = &getAnalysis<LazyValueInfoWrapperPass>().getLVI();
+ auto AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
++ DeferredDominance DDT(*DT);
+ std::unique_ptr<BlockFrequencyInfo> BFI;
+ std::unique_ptr<BranchProbabilityInfo> BPI;
+ bool HasProfileData = F.hasProfileData();
+@@ -289,12 +295,11 @@ bool JumpThreading::runOnFunction(Functi
+ BFI.reset(new BlockFrequencyInfo(F, *BPI, LI));
+ }
+
+- bool Changed = Impl.runImpl(F, TLI, LVI, AA, HasProfileData, std::move(BFI),
+- std::move(BPI));
++ bool Changed = Impl.runImpl(F, TLI, LVI, AA, &DDT, HasProfileData,
++ std::move(BFI), std::move(BPI));
+ if (PrintLVIAfterJumpThreading) {
+ dbgs() << "LVI for function '" << F.getName() << "':\n";
+- LVI->printLVI(F, getAnalysis<DominatorTreeWrapperPass>().getDomTree(),
+- dbgs());
++ LVI->printLVI(F, *DT, dbgs());
+ }
+ return Changed;
+ }
+@@ -302,8 +307,12 @@ bool JumpThreading::runOnFunction(Functi
+ PreservedAnalyses JumpThreadingPass::run(Function &F,
+ FunctionAnalysisManager &AM) {
+ auto &TLI = AM.getResult<TargetLibraryAnalysis>(F);
++ // Get DT analysis before LVI. When LVI is initialized it conditionally adds
++ // DT if it's available.
++ auto &DT = AM.getResult<DominatorTreeAnalysis>(F);
+ auto &LVI = AM.getResult<LazyValueAnalysis>(F);
+ auto &AA = AM.getResult<AAManager>(F);
++ DeferredDominance DDT(DT);
+
+ std::unique_ptr<BlockFrequencyInfo> BFI;
+ std::unique_ptr<BranchProbabilityInfo> BPI;
+@@ -313,25 +322,28 @@ PreservedAnalyses JumpThreadingPass::run
+ BFI.reset(new BlockFrequencyInfo(F, *BPI, LI));
+ }
+
+- bool Changed = runImpl(F, &TLI, &LVI, &AA, HasProfileData, std::move(BFI),
+- std::move(BPI));
++ bool Changed = runImpl(F, &TLI, &LVI, &AA, &DDT, HasProfileData,
++ std::move(BFI), std::move(BPI));
+
+ if (!Changed)
+ return PreservedAnalyses::all();
+ PreservedAnalyses PA;
+ PA.preserve<GlobalsAA>();
++ PA.preserve<DominatorTreeAnalysis>();
++ PA.preserve<LazyValueAnalysis>();
+ return PA;
+ }
+
+ bool JumpThreadingPass::runImpl(Function &F, TargetLibraryInfo *TLI_,
+ LazyValueInfo *LVI_, AliasAnalysis *AA_,
+- bool HasProfileData_,
++ DeferredDominance *DDT_, bool HasProfileData_,
+ std::unique_ptr<BlockFrequencyInfo> BFI_,
+ std::unique_ptr<BranchProbabilityInfo> BPI_) {
+ DEBUG(dbgs() << "Jump threading on function '" << F.getName() << "'\n");
+ TLI = TLI_;
+ LVI = LVI_;
+ AA = AA_;
++ DDT = DDT_;
+ BFI.reset();
+ BPI.reset();
+ // When profile data is available, we need to update edge weights after
+@@ -353,7 +365,7 @@ bool JumpThreadingPass::runImpl(Function
+ // back edges. This works for normal cases but not for unreachable blocks as
+ // they may have cycle with no back edge.
+ bool EverChanged = false;
+- EverChanged |= removeUnreachableBlocks(F, LVI);
++ EverChanged |= removeUnreachableBlocks(F, LVI, DDT);
+
+ FindLoopHeaders(F);
+
+@@ -368,6 +380,10 @@ bool JumpThreadingPass::runImpl(Function
+
+ ++I;
+
++ // Don't thread branches over a block that's slated for deletion.
++ if (DDT->pendingDeletedBB(BB))
++ continue;
++
+ // If the block is trivially dead, zap it. This eliminates the successor
+ // edges which simplifies the CFG.
+ if (pred_empty(BB) &&
+@@ -376,7 +392,7 @@ bool JumpThreadingPass::runImpl(Function
+ << "' with terminator: " << *BB->getTerminator() << '\n');
+ LoopHeaders.erase(BB);
+ LVI->eraseBlock(BB);
+- DeleteDeadBlock(BB);
++ DeleteDeadBlock(BB, DDT);
+ Changed = true;
+ continue;
+ }
+@@ -400,7 +416,7 @@ bool JumpThreadingPass::runImpl(Function
+ // awesome, but it allows us to use AssertingVH to prevent nasty
+ // dangling pointer issues within LazyValueInfo.
+ LVI->eraseBlock(BB);
+- if (TryToSimplifyUncondBranchFromEmptyBlock(BB))
++ if (TryToSimplifyUncondBranchFromEmptyBlock(BB, DDT))
+ Changed = true;
+ }
+ }
+@@ -408,6 +424,7 @@ bool JumpThreadingPass::runImpl(Function
+ } while (Changed);
+
+ LoopHeaders.clear();
++ DDT->flush();
+ return EverChanged;
+ }
+
+@@ -931,8 +948,8 @@ static bool hasAddressTakenAndUsed(Basic
+ bool JumpThreadingPass::ProcessBlock(BasicBlock *BB) {
+ // If the block is trivially dead, just return and let the caller nuke it.
+ // This simplifies other transformations.
+- if (pred_empty(BB) &&
+- BB != &BB->getParent()->getEntryBlock())
++ if (DDT->pendingDeletedBB(BB) ||
++ (pred_empty(BB) && BB != &BB->getParent()->getEntryBlock()))
+ return false;
+
+ // If this block has a single predecessor, and if that pred has a single
+@@ -948,7 +965,7 @@ bool JumpThreadingPass::ProcessBlock(Bas
+ LoopHeaders.insert(BB);
+
+ LVI->eraseBlock(SinglePred);
+- MergeBasicBlockIntoOnlyPred(BB);
++ MergeBasicBlockIntoOnlyPred(BB, nullptr, DDT);
+
+ // Now that BB is merged into SinglePred (i.e. SinglePred Code followed by
+ // BB code within one basic block `BB`), we need to invalidate the LVI
+@@ -1031,18 +1048,23 @@ bool JumpThreadingPass::ProcessBlock(Bas
+ // successors to branch to. Let GetBestDestForJumpOnUndef decide.
+ if (isa<UndefValue>(Condition)) {
+ unsigned BestSucc = GetBestDestForJumpOnUndef(BB);
++ std::vector<DominatorTree::UpdateType> Updates;
+
+ // Fold the branch/switch.
+ TerminatorInst *BBTerm = BB->getTerminator();
++ Updates.reserve(BBTerm->getNumSuccessors());
+ for (unsigned i = 0, e = BBTerm->getNumSuccessors(); i != e; ++i) {
+ if (i == BestSucc) continue;
+- BBTerm->getSuccessor(i)->removePredecessor(BB, true);
++ BasicBlock *Succ = BBTerm->getSuccessor(i);
++ Succ->removePredecessor(BB, true);
++ Updates.push_back({DominatorTree::Delete, BB, Succ});
+ }
+
+ DEBUG(dbgs() << " In block '" << BB->getName()
+ << "' folding undef terminator: " << *BBTerm << '\n');
+ BranchInst::Create(BBTerm->getSuccessor(BestSucc), BBTerm);
+ BBTerm->eraseFromParent();
++ DDT->applyUpdates(Updates);
+ return true;
+ }
+
+@@ -1053,7 +1075,7 @@ bool JumpThreadingPass::ProcessBlock(Bas
+ DEBUG(dbgs() << " In block '" << BB->getName()
+ << "' folding terminator: " << *BB->getTerminator() << '\n');
+ ++NumFolds;
+- ConstantFoldTerminator(BB, true);
++ ConstantFoldTerminator(BB, true, nullptr, DDT);
+ return true;
+ }
+
+@@ -1086,7 +1108,8 @@ bool JumpThreadingPass::ProcessBlock(Bas
+ if (Ret != LazyValueInfo::Unknown) {
+ unsigned ToRemove = Ret == LazyValueInfo::True ? 1 : 0;
+ unsigned ToKeep = Ret == LazyValueInfo::True ? 0 : 1;
+- CondBr->getSuccessor(ToRemove)->removePredecessor(BB, true);
++ BasicBlock *ToRemoveSucc = CondBr->getSuccessor(ToRemove);
++ ToRemoveSucc->removePredecessor(BB, true);
+ BranchInst::Create(CondBr->getSuccessor(ToKeep), CondBr);
+ CondBr->eraseFromParent();
+ if (CondCmp->use_empty())
+@@ -1104,6 +1127,7 @@ bool JumpThreadingPass::ProcessBlock(Bas
+ ConstantInt::getFalse(CondCmp->getType());
+ ReplaceFoldableUses(CondCmp, CI);
+ }
++ DDT->deleteEdge(BB, ToRemoveSucc);
+ return true;
+ }
+
+@@ -1182,9 +1206,12 @@ bool JumpThreadingPass::ProcessImpliedCo
+ Optional<bool> Implication =
+ isImpliedCondition(PBI->getCondition(), Cond, DL, CondIsTrue);
+ if (Implication) {
+- BI->getSuccessor(*Implication ? 1 : 0)->removePredecessor(BB);
+- BranchInst::Create(BI->getSuccessor(*Implication ? 0 : 1), BI);
++ BasicBlock *KeepSucc = BI->getSuccessor(*Implication ? 0 : 1);
++ BasicBlock *RemoveSucc = BI->getSuccessor(*Implication ? 1 : 0);
++ RemoveSucc->removePredecessor(BB);
++ BranchInst::Create(KeepSucc, BI);
+ BI->eraseFromParent();
++ DDT->deleteEdge(BB, RemoveSucc);
+ return true;
+ }
+ CurrentBB = CurrentPred;
+@@ -1594,17 +1621,22 @@ bool JumpThreadingPass::ProcessThreadabl
+ if (PredWithKnownDest ==
+ (size_t)std::distance(pred_begin(BB), pred_end(BB))) {
+ bool SeenFirstBranchToOnlyDest = false;
++ std::vector <DominatorTree::UpdateType> Updates;
++ Updates.reserve(BB->getTerminator()->getNumSuccessors() - 1);
+ for (BasicBlock *SuccBB : successors(BB)) {
+- if (SuccBB == OnlyDest && !SeenFirstBranchToOnlyDest)
++ if (SuccBB == OnlyDest && !SeenFirstBranchToOnlyDest) {
+ SeenFirstBranchToOnlyDest = true; // Don't modify the first branch.
+- else
++ } else {
+ SuccBB->removePredecessor(BB, true); // This is unreachable successor.
++ Updates.push_back({DominatorTree::Delete, BB, SuccBB});
++ }
+ }
+
+ // Finally update the terminator.
+ TerminatorInst *Term = BB->getTerminator();
+ BranchInst::Create(OnlyDest, Term);
+ Term->eraseFromParent();
++ DDT->applyUpdates(Updates);
+
+ // If the condition is now dead due to the removal of the old terminator,
+ // erase it.
+@@ -1979,6 +2011,10 @@ bool JumpThreadingPass::ThreadEdge(Basic
+ PredTerm->setSuccessor(i, NewBB);
+ }
+
++ DDT->applyUpdates({{DominatorTree::Insert, NewBB, SuccBB},
++ {DominatorTree::Insert, PredBB, NewBB},
++ {DominatorTree::Delete, PredBB, BB}});
++
+ // At this point, the IR is fully up to date and consistent. Do a quick scan
+ // over the new instructions and zap any that are constants or dead. This
+ // frequently happens because of phi translation.
+@@ -1998,20 +2034,42 @@ bool JumpThreadingPass::ThreadEdge(Basic
+ BasicBlock *JumpThreadingPass::SplitBlockPreds(BasicBlock *BB,
+ ArrayRef<BasicBlock *> Preds,
+ const char *Suffix) {
++ SmallVector<BasicBlock *, 2> NewBBs;
++
+ // Collect the frequencies of all predecessors of BB, which will be used to
+- // update the edge weight on BB->SuccBB.
+- BlockFrequency PredBBFreq(0);
++ // update the edge weight of the result of splitting predecessors.
++ DenseMap<BasicBlock *, BlockFrequency> FreqMap;
+ if (HasProfileData)
+ for (auto Pred : Preds)
+- PredBBFreq += BFI->getBlockFreq(Pred) * BPI->getEdgeProbability(Pred, BB);
++ FreqMap.insert(std::make_pair(
++ Pred, BFI->getBlockFreq(Pred) * BPI->getEdgeProbability(Pred, BB)));
++
++ // In the case when BB is a LandingPad block we create 2 new predecessors
++ // instead of just one.
++ if (BB->isLandingPad()) {
++ std::string NewName = std::string(Suffix) + ".split-lp";
++ SplitLandingPadPredecessors(BB, Preds, Suffix, NewName.c_str(), NewBBs);
++ } else {
++ NewBBs.push_back(SplitBlockPredecessors(BB, Preds, Suffix));
++ }
+
+- BasicBlock *PredBB = SplitBlockPredecessors(BB, Preds, Suffix);
++ std::vector<DominatorTree::UpdateType> Updates;
++ Updates.reserve((2 * Preds.size()) + NewBBs.size());
++ for (auto NewBB : NewBBs) {
++ BlockFrequency NewBBFreq(0);
++ Updates.push_back({DominatorTree::Insert, NewBB, BB});
++ for (auto Pred : predecessors(NewBB)) {
++ Updates.push_back({DominatorTree::Delete, Pred, BB});
++ Updates.push_back({DominatorTree::Insert, Pred, NewBB});
++ if (HasProfileData) // Update frequencies between Pred -> NewBB.
++ NewBBFreq += FreqMap.lookup(Pred);
++ }
++ if (HasProfileData) // Apply the summed frequency to NewBB.
++ BFI->setBlockFreq(NewBB, NewBBFreq.getFrequency());
++ }
+
+- // Set the block frequency of the newly created PredBB, which is the sum of
+- // frequencies of Preds.
+- if (HasProfileData)
+- BFI->setBlockFreq(PredBB, PredBBFreq.getFrequency());
+- return PredBB;
++ DDT->applyUpdates(Updates);
++ return NewBBs[0];
+ }
+
+ bool JumpThreadingPass::doesBlockHaveProfileData(BasicBlock *BB) {
+@@ -2155,6 +2213,7 @@ bool JumpThreadingPass::DuplicateCondBra
+ }
+
+ // And finally, do it! Start by factoring the predecessors if needed.
++ std::vector<DominatorTree::UpdateType> Updates;
+ BasicBlock *PredBB;
+ if (PredBBs.size() == 1)
+ PredBB = PredBBs[0];
+@@ -2163,6 +2222,7 @@ bool JumpThreadingPass::DuplicateCondBra
+ << " common predecessors.\n");
+ PredBB = SplitBlockPreds(BB, PredBBs, ".thr_comm");
+ }
++ Updates.push_back({DominatorTree::Delete, PredBB, BB});
+
+ // Okay, we decided to do this! Clone all the instructions in BB onto the end
+ // of PredBB.
+@@ -2175,7 +2235,11 @@ bool JumpThreadingPass::DuplicateCondBra
+ BranchInst *OldPredBranch = dyn_cast<BranchInst>(PredBB->getTerminator());
+
+ if (!OldPredBranch || !OldPredBranch->isUnconditional()) {
+- PredBB = SplitEdge(PredBB, BB);
++ BasicBlock *OldPredBB = PredBB;
++ PredBB = SplitEdge(OldPredBB, BB);
++ Updates.push_back({DominatorTree::Insert, OldPredBB, PredBB});
++ Updates.push_back({DominatorTree::Insert, PredBB, BB});
++ Updates.push_back({DominatorTree::Delete, OldPredBB, BB});
+ OldPredBranch = cast<BranchInst>(PredBB->getTerminator());
+ }
+
+@@ -2217,6 +2281,10 @@ bool JumpThreadingPass::DuplicateCondBra
+ // Otherwise, insert the new instruction into the block.
+ New->setName(BI->getName());
+ PredBB->getInstList().insert(OldPredBranch->getIterator(), New);
++ // Update Dominance from simplified New instruction operands.
++ for (unsigned i = 0, e = New->getNumOperands(); i != e; ++i)
++ if (BasicBlock *SuccBB = dyn_cast<BasicBlock>(New->getOperand(i)))
++ Updates.push_back({DominatorTree::Insert, PredBB, SuccBB});
+ }
+ }
+
+@@ -2272,6 +2340,7 @@ bool JumpThreadingPass::DuplicateCondBra
+
+ // Remove the unconditional branch at the end of the PredBB block.
+ OldPredBranch->eraseFromParent();
++ DDT->applyUpdates(Updates);
+
+ ++NumDupes;
+ return true;
+@@ -2344,6 +2413,8 @@ bool JumpThreadingPass::TryToUnfoldSelec
+ // The select is now dead.
+ SI->eraseFromParent();
+
++ DDT->applyUpdates({{DominatorTree::Insert, NewBB, BB},
++ {DominatorTree::Insert, Pred, NewBB}});
+ // Update any other PHI nodes in BB.
+ for (BasicBlock::iterator BI = BB->begin();
+ PHINode *Phi = dyn_cast<PHINode>(BI); ++BI)
+@@ -2422,11 +2493,25 @@ bool JumpThreadingPass::TryToUnfoldSelec
+ // Expand the select.
+ TerminatorInst *Term =
+ SplitBlockAndInsertIfThen(SI->getCondition(), SI, false);
++ BasicBlock *SplitBB = SI->getParent();
++ BasicBlock *NewBB = Term->getParent();
+ PHINode *NewPN = PHINode::Create(SI->getType(), 2, "", SI);
+ NewPN->addIncoming(SI->getTrueValue(), Term->getParent());
+ NewPN->addIncoming(SI->getFalseValue(), BB);
+ SI->replaceAllUsesWith(NewPN);
+ SI->eraseFromParent();
++ // NewBB and SplitBB are newly created blocks which require insertion.
++ std::vector<DominatorTree::UpdateType> Updates;
++ Updates.reserve((2 * SplitBB->getTerminator()->getNumSuccessors()) + 3);
++ Updates.push_back({DominatorTree::Insert, BB, SplitBB});
++ Updates.push_back({DominatorTree::Insert, BB, NewBB});
++ Updates.push_back({DominatorTree::Insert, NewBB, SplitBB});
++ // BB's successors were moved to SplitBB, update DDT accordingly.
++ for (auto *Succ : successors(SplitBB)) {
++ Updates.push_back({DominatorTree::Delete, BB, Succ});
++ Updates.push_back({DominatorTree::Insert, SplitBB, Succ});
++ }
++ DDT->applyUpdates(Updates);
+ return true;
+ }
+ return false;
+@@ -2513,8 +2598,8 @@ bool JumpThreadingPass::ThreadGuard(Basi
+ if (!TrueDestIsSafe && !FalseDestIsSafe)
+ return false;
+
+- BasicBlock *UnguardedBlock = TrueDestIsSafe ? TrueDest : FalseDest;
+- BasicBlock *GuardedBlock = FalseDestIsSafe ? TrueDest : FalseDest;
++ BasicBlock *PredUnguardedBlock = TrueDestIsSafe ? TrueDest : FalseDest;
++ BasicBlock *PredGuardedBlock = FalseDestIsSafe ? TrueDest : FalseDest;
+
+ ValueToValueMapTy UnguardedMapping, GuardedMapping;
+ Instruction *AfterGuard = Guard->getNextNode();
+@@ -2523,18 +2608,29 @@ bool JumpThreadingPass::ThreadGuard(Basi
+ return false;
+ // Duplicate all instructions before the guard and the guard itself to the
+ // branch where implication is not proved.
+- GuardedBlock = DuplicateInstructionsInSplitBetween(
+- BB, GuardedBlock, AfterGuard, GuardedMapping);
++ BasicBlock *GuardedBlock = DuplicateInstructionsInSplitBetween(
++ BB, PredGuardedBlock, AfterGuard, GuardedMapping);
+ assert(GuardedBlock && "Could not create the guarded block?");
+ // Duplicate all instructions before the guard in the unguarded branch.
+ // Since we have successfully duplicated the guarded block and this block
+ // has fewer instructions, we expect it to succeed.
+- UnguardedBlock = DuplicateInstructionsInSplitBetween(BB, UnguardedBlock,
+- Guard, UnguardedMapping);
++ BasicBlock *UnguardedBlock = DuplicateInstructionsInSplitBetween(
++ BB, PredUnguardedBlock, Guard, UnguardedMapping);
+ assert(UnguardedBlock && "Could not create the unguarded block?");
+ DEBUG(dbgs() << "Moved guard " << *Guard << " to block "
+ << GuardedBlock->getName() << "\n");
+-
++ // DuplicateInstructionsInSplitBetween inserts a new block "BB.split" between
++ // PredBB and BB. We need to perform two inserts and one delete for each of
++ // the above calls to update Dominators.
++ DDT->applyUpdates(
++ {// Guarded block split.
++ {DominatorTree::Delete, PredGuardedBlock, BB},
++ {DominatorTree::Insert, PredGuardedBlock, GuardedBlock},
++ {DominatorTree::Insert, GuardedBlock, BB},
++ // Unguarded block split.
++ {DominatorTree::Delete, PredUnguardedBlock, BB},
++ {DominatorTree::Insert, PredUnguardedBlock, UnguardedBlock},
++ {DominatorTree::Insert, UnguardedBlock, BB}});
+ // Some instructions before the guard may still have uses. For them, we need
+ // to create Phi nodes merging their copies in both guarded and unguarded
+ // branches. Those instructions that have no uses can be just removed.
+Index: llvm-toolchain-6.0-6.0.1/lib/Transforms/Utils/BasicBlockUtils.cpp
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/Transforms/Utils/BasicBlockUtils.cpp
++++ llvm-toolchain-6.0-6.0.1/lib/Transforms/Utils/BasicBlockUtils.cpp
+@@ -45,16 +45,22 @@
+
+ using namespace llvm;
+
+-void llvm::DeleteDeadBlock(BasicBlock *BB) {
++void llvm::DeleteDeadBlock(BasicBlock *BB, DeferredDominance *DDT) {
+ assert((pred_begin(BB) == pred_end(BB) ||
+ // Can delete self loop.
+ BB->getSinglePredecessor() == BB) && "Block is not dead!");
+ TerminatorInst *BBTerm = BB->getTerminator();
++ std::vector<DominatorTree::UpdateType> Updates;
+
+ // Loop through all of our successors and make sure they know that one
+ // of their predecessors is going away.
+- for (BasicBlock *Succ : BBTerm->successors())
++ if (DDT)
++ Updates.reserve(BBTerm->getNumSuccessors());
++ for (BasicBlock *Succ : BBTerm->successors()) {
+ Succ->removePredecessor(BB);
++ if (DDT)
++ Updates.push_back({DominatorTree::Delete, BB, Succ});
++ }
+
+ // Zap all the instructions in the block.
+ while (!BB->empty()) {
+@@ -69,8 +75,12 @@ void llvm::DeleteDeadBlock(BasicBlock *B
+ BB->getInstList().pop_back();
+ }
+
+- // Zap the block!
+- BB->eraseFromParent();
++ if (DDT) {
++ DDT->applyUpdates(Updates);
++ DDT->deleteBB(BB); // Deferred deletion of BB.
++ } else {
++ BB->eraseFromParent(); // Zap the block!
++ }
+ }
+
+ void llvm::FoldSingleEntryPHINodes(BasicBlock *BB,
+Index: llvm-toolchain-6.0-6.0.1/lib/Transforms/Utils/Local.cpp
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/Transforms/Utils/Local.cpp
++++ llvm-toolchain-6.0-6.0.1/lib/Transforms/Utils/Local.cpp
+@@ -100,7 +100,8 @@ STATISTIC(NumRemoved, "Number of unreach
+ /// conditions and indirectbr addresses this might make dead if
+ /// DeleteDeadConditions is true.
+ bool llvm::ConstantFoldTerminator(BasicBlock *BB, bool DeleteDeadConditions,
+- const TargetLibraryInfo *TLI) {
++ const TargetLibraryInfo *TLI,
++ DeferredDominance *DDT) {
+ TerminatorInst *T = BB->getTerminator();
+ IRBuilder<> Builder(T);
+
+@@ -123,6 +124,8 @@ bool llvm::ConstantFoldTerminator(BasicB
+ // Replace the conditional branch with an unconditional one.
+ Builder.CreateBr(Destination);
+ BI->eraseFromParent();
++ if (DDT)
++ DDT->deleteEdge(BB, OldDest);
+ return true;
+ }
+
+@@ -193,9 +196,12 @@ bool llvm::ConstantFoldTerminator(BasicB
+ createBranchWeights(Weights));
+ }
+ // Remove this entry.
+- DefaultDest->removePredecessor(SI->getParent());
++ BasicBlock *ParentBB = SI->getParent();
++ DefaultDest->removePredecessor(ParentBB);
+ i = SI->removeCase(i);
+ e = SI->case_end();
++ if (DDT)
++ DDT->deleteEdge(ParentBB, DefaultDest);
+ continue;
+ }
+
+@@ -221,14 +227,20 @@ bool llvm::ConstantFoldTerminator(BasicB
+ // Insert the new branch.
+ Builder.CreateBr(TheOnlyDest);
+ BasicBlock *BB = SI->getParent();
++ std::vector <DominatorTree::UpdateType> Updates;
++ if (DDT)
++ Updates.reserve(SI->getNumSuccessors() - 1);
+
+ // Remove entries from PHI nodes which we no longer branch to...
+ for (BasicBlock *Succ : SI->successors()) {
+ // Found case matching a constant operand?
+- if (Succ == TheOnlyDest)
++ if (Succ == TheOnlyDest) {
+ TheOnlyDest = nullptr; // Don't modify the first branch to TheOnlyDest
+- else
++ } else {
+ Succ->removePredecessor(BB);
++ if (DDT)
++ Updates.push_back({DominatorTree::Delete, BB, Succ});
++ }
+ }
+
+ // Delete the old switch.
+@@ -236,6 +248,8 @@ bool llvm::ConstantFoldTerminator(BasicB
+ SI->eraseFromParent();
+ if (DeleteDeadConditions)
+ RecursivelyDeleteTriviallyDeadInstructions(Cond, TLI);
++ if (DDT)
++ DDT->applyUpdates(Updates);
+ return true;
+ }
+
+@@ -281,14 +295,23 @@ bool llvm::ConstantFoldTerminator(BasicB
+ if (auto *BA =
+ dyn_cast<BlockAddress>(IBI->getAddress()->stripPointerCasts())) {
+ BasicBlock *TheOnlyDest = BA->getBasicBlock();
++ std::vector <DominatorTree::UpdateType> Updates;
++ if (DDT)
++ Updates.reserve(IBI->getNumDestinations() - 1);
++
+ // Insert the new branch.
+ Builder.CreateBr(TheOnlyDest);
+
+ for (unsigned i = 0, e = IBI->getNumDestinations(); i != e; ++i) {
+- if (IBI->getDestination(i) == TheOnlyDest)
++ if (IBI->getDestination(i) == TheOnlyDest) {
+ TheOnlyDest = nullptr;
+- else
+- IBI->getDestination(i)->removePredecessor(IBI->getParent());
++ } else {
++ BasicBlock *ParentBB = IBI->getParent();
++ BasicBlock *DestBB = IBI->getDestination(i);
++ DestBB->removePredecessor(ParentBB);
++ if (DDT)
++ Updates.push_back({DominatorTree::Delete, ParentBB, DestBB});
++ }
+ }
+ Value *Address = IBI->getAddress();
+ IBI->eraseFromParent();
+@@ -303,6 +326,8 @@ bool llvm::ConstantFoldTerminator(BasicB
+ new UnreachableInst(BB->getContext(), BB);
+ }
+
++ if (DDT)
++ DDT->applyUpdates(Updates);
+ return true;
+ }
+ }
+@@ -579,7 +604,8 @@ bool llvm::SimplifyInstructionsInBlock(B
+ ///
+ /// .. and delete the predecessor corresponding to the '1', this will attempt to
+ /// recursively fold the and to 0.
+-void llvm::RemovePredecessorAndSimplify(BasicBlock *BB, BasicBlock *Pred) {
++void llvm::RemovePredecessorAndSimplify(BasicBlock *BB, BasicBlock *Pred,
++ DeferredDominance *DDT) {
+ // This only adjusts blocks with PHI nodes.
+ if (!isa<PHINode>(BB->begin()))
+ return;
+@@ -602,13 +628,18 @@ void llvm::RemovePredecessorAndSimplify(
+ // of the block.
+ if (PhiIt != OldPhiIt) PhiIt = &BB->front();
+ }
++ if (DDT)
++ DDT->deleteEdge(Pred, BB);
+ }
+
+ /// MergeBasicBlockIntoOnlyPred - DestBB is a block with one predecessor and its
+ /// predecessor is known to have one successor (DestBB!). Eliminate the edge
+ /// between them, moving the instructions in the predecessor into DestBB and
+ /// deleting the predecessor block.
+-void llvm::MergeBasicBlockIntoOnlyPred(BasicBlock *DestBB, DominatorTree *DT) {
++void llvm::MergeBasicBlockIntoOnlyPred(BasicBlock *DestBB, DominatorTree *DT,
++ DeferredDominance *DDT) {
++ assert(!(DT && DDT) && "Cannot call with both DT and DDT.");
++
+ // If BB has single-entry PHI nodes, fold them.
+ while (PHINode *PN = dyn_cast<PHINode>(DestBB->begin())) {
+ Value *NewVal = PN->getIncomingValue(0);
+@@ -621,6 +652,25 @@ void llvm::MergeBasicBlockIntoOnlyPred(B
+ BasicBlock *PredBB = DestBB->getSinglePredecessor();
+ assert(PredBB && "Block doesn't have a single predecessor!");
+
++ bool ReplaceEntryBB = false;
++ if (PredBB == &DestBB->getParent()->getEntryBlock())
++ ReplaceEntryBB = true;
++
++ // Deferred DT update: Collect all the edges that enter PredBB. These
++ // dominator edges will be redirected to DestBB.
++ std::vector <DominatorTree::UpdateType> Updates;
++ if (DDT && !ReplaceEntryBB) {
++ Updates.reserve(1 +
++ (2 * std::distance(pred_begin(PredBB), pred_end(PredBB))));
++ Updates.push_back({DominatorTree::Delete, PredBB, DestBB});
++ for (auto I = pred_begin(PredBB), E = pred_end(PredBB); I != E; ++I) {
++ Updates.push_back({DominatorTree::Delete, *I, PredBB});
++ // This predecessor of PredBB may already have DestBB as a successor.
++ if (llvm::find(successors(*I), DestBB) == succ_end(*I))
++ Updates.push_back({DominatorTree::Insert, *I, DestBB});
++ }
++ }
++
+ // Zap anything that took the address of DestBB. Not doing this will give the
+ // address an invalid value.
+ if (DestBB->hasAddressTaken()) {
+@@ -641,7 +691,7 @@ void llvm::MergeBasicBlockIntoOnlyPred(B
+
+ // If the PredBB is the entry block of the function, move DestBB up to
+ // become the entry block after we erase PredBB.
+- if (PredBB == &DestBB->getParent()->getEntryBlock())
++ if (ReplaceEntryBB)
+ DestBB->moveAfter(PredBB);
+
+ if (DT) {
+@@ -653,8 +703,19 @@ void llvm::MergeBasicBlockIntoOnlyPred(B
+ DT->eraseNode(PredBB);
+ }
+ }
+- // Nuke BB.
+- PredBB->eraseFromParent();
++
++ if (DDT) {
++ DDT->deleteBB(PredBB); // Deferred deletion of BB.
++ if (ReplaceEntryBB)
++ // The entry block was removed and there is no external interface for the
++ // dominator tree to be notified of this change. In this corner-case we
++ // recalculate the entire tree.
++ DDT->recalculate(*(DestBB->getParent()));
++ else
++ DDT->applyUpdates(Updates);
++ } else {
++ PredBB->eraseFromParent(); // Nuke BB.
++ }
+ }
+
+ /// CanMergeValues - Return true if we can choose one of these values to use
+@@ -861,7 +922,8 @@ static void redirectValuesFromPredecesso
+ /// potential side-effect free intrinsics and the branch. If possible,
+ /// eliminate BB by rewriting all the predecessors to branch to the successor
+ /// block and return true. If we can't transform, return false.
+-bool llvm::TryToSimplifyUncondBranchFromEmptyBlock(BasicBlock *BB) {
++bool llvm::TryToSimplifyUncondBranchFromEmptyBlock(BasicBlock *BB,
++ DeferredDominance *DDT) {
+ assert(BB != &BB->getParent()->getEntryBlock() &&
+ "TryToSimplifyUncondBranchFromEmptyBlock called on entry block!");
+
+@@ -902,6 +964,19 @@ bool llvm::TryToSimplifyUncondBranchFrom
+
+ DEBUG(dbgs() << "Killing Trivial BB: \n" << *BB);
+
++ std::vector<DominatorTree::UpdateType> Updates;
++ if (DDT) {
++ Updates.reserve(1 + (2 * std::distance(pred_begin(BB), pred_end(BB))));
++ Updates.push_back({DominatorTree::Delete, BB, Succ});
++ // All predecessors of BB will be moved to Succ.
++ for (auto I = pred_begin(BB), E = pred_end(BB); I != E; ++I) {
++ Updates.push_back({DominatorTree::Delete, *I, BB});
++ // This predecessor of BB may already have Succ as a successor.
++ if (llvm::find(successors(*I), Succ) == succ_end(*I))
++ Updates.push_back({DominatorTree::Insert, *I, Succ});
++ }
++ }
++
+ if (isa<PHINode>(Succ->begin())) {
+ // If there is more than one pred of succ, and there are PHI nodes in
+ // the successor, then we need to add incoming edges for the PHI nodes
+@@ -946,7 +1021,13 @@ bool llvm::TryToSimplifyUncondBranchFrom
+ // Everything that jumped to BB now goes to Succ.
+ BB->replaceAllUsesWith(Succ);
+ if (!Succ->hasName()) Succ->takeName(BB);
+- BB->eraseFromParent(); // Delete the old basic block.
++
++ if (DDT) {
++ DDT->deleteBB(BB); // Deferred deletion of the old basic block.
++ DDT->applyUpdates(Updates);
++ } else {
++ BB->eraseFromParent(); // Delete the old basic block.
++ }
+ return true;
+ }
+
+@@ -1448,13 +1529,19 @@ unsigned llvm::removeAllNonTerminatorAnd
+ }
+
+ unsigned llvm::changeToUnreachable(Instruction *I, bool UseLLVMTrap,
+- bool PreserveLCSSA) {
++ bool PreserveLCSSA, DeferredDominance *DDT) {
+ BasicBlock *BB = I->getParent();
++ std::vector <DominatorTree::UpdateType> Updates;
++
+ // Loop over all of the successors, removing BB's entry from any PHI
+ // nodes.
+- for (BasicBlock *Successor : successors(BB))
++ if (DDT)
++ Updates.reserve(BB->getTerminator()->getNumSuccessors());
++ for (BasicBlock *Successor : successors(BB)) {
+ Successor->removePredecessor(BB, PreserveLCSSA);
+-
++ if (DDT)
++ Updates.push_back({DominatorTree::Delete, BB, Successor});
++ }
+ // Insert a call to llvm.trap right before this. This turns the undefined
+ // behavior into a hard fail instead of falling through into random code.
+ if (UseLLVMTrap) {
+@@ -1474,11 +1561,13 @@ unsigned llvm::changeToUnreachable(Instr
+ BB->getInstList().erase(BBI++);
+ ++NumInstrsRemoved;
+ }
++ if (DDT)
++ DDT->applyUpdates(Updates);
+ return NumInstrsRemoved;
+ }
+
+ /// changeToCall - Convert the specified invoke into a normal call.
+-static void changeToCall(InvokeInst *II) {
++static void changeToCall(InvokeInst *II, DeferredDominance *DDT = nullptr) {
+ SmallVector<Value*, 8> Args(II->arg_begin(), II->arg_end());
+ SmallVector<OperandBundleDef, 1> OpBundles;
+ II->getOperandBundlesAsDefs(OpBundles);
+@@ -1491,11 +1580,16 @@ static void changeToCall(InvokeInst *II)
+ II->replaceAllUsesWith(NewCall);
+
+ // Follow the call by a branch to the normal destination.
+- BranchInst::Create(II->getNormalDest(), II);
++ BasicBlock *NormalDestBB = II->getNormalDest();
++ BranchInst::Create(NormalDestBB, II);
+
+ // Update PHI nodes in the unwind destination
+- II->getUnwindDest()->removePredecessor(II->getParent());
++ BasicBlock *BB = II->getParent();
++ BasicBlock *UnwindDestBB = II->getUnwindDest();
++ UnwindDestBB->removePredecessor(BB);
+ II->eraseFromParent();
++ if (DDT)
++ DDT->deleteEdge(BB, UnwindDestBB);
+ }
+
+ BasicBlock *llvm::changeToInvokeAndSplitBasicBlock(CallInst *CI,
+@@ -1536,7 +1630,8 @@ BasicBlock *llvm::changeToInvokeAndSplit
+ }
+
+ static bool markAliveBlocks(Function &F,
+- SmallPtrSetImpl<BasicBlock*> &Reachable) {
++ SmallPtrSetImpl<BasicBlock*> &Reachable,
++ DeferredDominance *DDT = nullptr) {
+ SmallVector<BasicBlock*, 128> Worklist;
+ BasicBlock *BB = &F.front();
+ Worklist.push_back(BB);
+@@ -1556,7 +1651,7 @@ static bool markAliveBlocks(Function &F,
+ if (II->getIntrinsicID() == Intrinsic::assume) {
+ if (match(II->getArgOperand(0), m_CombineOr(m_Zero(), m_Undef()))) {
+ // Don't insert a call to llvm.trap right before the unreachable.
+- changeToUnreachable(II, false);
++ changeToUnreachable(II, false, false, DDT);
+ Changed = true;
+ break;
+ }
+@@ -1573,7 +1668,8 @@ static bool markAliveBlocks(Function &F,
+ // still be useful for widening.
+ if (match(II->getArgOperand(0), m_Zero()))
+ if (!isa<UnreachableInst>(II->getNextNode())) {
+- changeToUnreachable(II->getNextNode(), /*UseLLVMTrap=*/ false);
++ changeToUnreachable(II->getNextNode(), /*UseLLVMTrap=*/false,
++ false, DDT);
+ Changed = true;
+ break;
+ }
+@@ -1583,7 +1679,7 @@ static bool markAliveBlocks(Function &F,
+ if (auto *CI = dyn_cast<CallInst>(&I)) {
+ Value *Callee = CI->getCalledValue();
+ if (isa<ConstantPointerNull>(Callee) || isa<UndefValue>(Callee)) {
+- changeToUnreachable(CI, /*UseLLVMTrap=*/false);
++ changeToUnreachable(CI, /*UseLLVMTrap=*/false, false, DDT);
+ Changed = true;
+ break;
+ }
+@@ -1593,7 +1689,7 @@ static bool markAliveBlocks(Function &F,
+ // though.
+ if (!isa<UnreachableInst>(CI->getNextNode())) {
+ // Don't insert a call to llvm.trap right before the unreachable.
+- changeToUnreachable(CI->getNextNode(), false);
++ changeToUnreachable(CI->getNextNode(), false, false, DDT);
+ Changed = true;
+ }
+ break;
+@@ -1612,7 +1708,7 @@ static bool markAliveBlocks(Function &F,
+ if (isa<UndefValue>(Ptr) ||
+ (isa<ConstantPointerNull>(Ptr) &&
+ SI->getPointerAddressSpace() == 0)) {
+- changeToUnreachable(SI, true);
++ changeToUnreachable(SI, true, false, DDT);
+ Changed = true;
+ break;
+ }
+@@ -1624,16 +1720,20 @@ static bool markAliveBlocks(Function &F,
+ // Turn invokes that call 'nounwind' functions into ordinary calls.
+ Value *Callee = II->getCalledValue();
+ if (isa<ConstantPointerNull>(Callee) || isa<UndefValue>(Callee)) {
+- changeToUnreachable(II, true);
++ changeToUnreachable(II, true, false, DDT);
+ Changed = true;
+ } else if (II->doesNotThrow() && canSimplifyInvokeNoUnwind(&F)) {
+ if (II->use_empty() && II->onlyReadsMemory()) {
+ // jump to the normal destination branch.
+- BranchInst::Create(II->getNormalDest(), II);
+- II->getUnwindDest()->removePredecessor(II->getParent());
++ BasicBlock *NormalDestBB = II->getNormalDest();
++ BasicBlock *UnwindDestBB = II->getUnwindDest();
++ BranchInst::Create(NormalDestBB, II);
++ UnwindDestBB->removePredecessor(II->getParent());
+ II->eraseFromParent();
++ if (DDT)
++ DDT->deleteEdge(BB, UnwindDestBB);
+ } else
+- changeToCall(II);
++ changeToCall(II, DDT);
+ Changed = true;
+ }
+ } else if (auto *CatchSwitch = dyn_cast<CatchSwitchInst>(Terminator)) {
+@@ -1679,7 +1779,7 @@ static bool markAliveBlocks(Function &F,
+ }
+ }
+
+- Changed |= ConstantFoldTerminator(BB, true);
++ Changed |= ConstantFoldTerminator(BB, true, nullptr, DDT);
+ for (BasicBlock *Successor : successors(BB))
+ if (Reachable.insert(Successor).second)
+ Worklist.push_back(Successor);
+@@ -1687,11 +1787,11 @@ static bool markAliveBlocks(Function &F,
+ return Changed;
+ }
+
+-void llvm::removeUnwindEdge(BasicBlock *BB) {
++void llvm::removeUnwindEdge(BasicBlock *BB, DeferredDominance *DDT) {
+ TerminatorInst *TI = BB->getTerminator();
+
+ if (auto *II = dyn_cast<InvokeInst>(TI)) {
+- changeToCall(II);
++ changeToCall(II, DDT);
+ return;
+ }
+
+@@ -1719,15 +1819,18 @@ void llvm::removeUnwindEdge(BasicBlock *
+ UnwindDest->removePredecessor(BB);
+ TI->replaceAllUsesWith(NewTI);
+ TI->eraseFromParent();
++ if (DDT)
++ DDT->deleteEdge(BB, UnwindDest);
+ }
+
+ /// removeUnreachableBlocks - Remove blocks that are not reachable, even
+ /// if they are in a dead cycle. Return true if a change was made, false
+ /// otherwise. If `LVI` is passed, this function preserves LazyValueInfo
+ /// after modifying the CFG.
+-bool llvm::removeUnreachableBlocks(Function &F, LazyValueInfo *LVI) {
++bool llvm::removeUnreachableBlocks(Function &F, LazyValueInfo *LVI,
++ DeferredDominance *DDT) {
+ SmallPtrSet<BasicBlock*, 16> Reachable;
+- bool Changed = markAliveBlocks(F, Reachable);
++ bool Changed = markAliveBlocks(F, Reachable, DDT);
+
+ // If there are unreachable blocks in the CFG...
+ if (Reachable.size() == F.size())
+@@ -1737,25 +1840,39 @@ bool llvm::removeUnreachableBlocks(Funct
+ NumRemoved += F.size()-Reachable.size();
+
+ // Loop over all of the basic blocks that are not reachable, dropping all of
+- // their internal references...
+- for (Function::iterator BB = ++F.begin(), E = F.end(); BB != E; ++BB) {
+- if (Reachable.count(&*BB))
++ // their internal references. Update DDT and LVI if available.
++ std::vector <DominatorTree::UpdateType> Updates;
++ for (Function::iterator I = ++F.begin(), E = F.end(); I != E; ++I) {
++ auto *BB = &*I;
++ if (Reachable.count(BB))
+ continue;
+-
+- for (BasicBlock *Successor : successors(&*BB))
++ for (BasicBlock *Successor : successors(BB)) {
+ if (Reachable.count(Successor))
+- Successor->removePredecessor(&*BB);
++ Successor->removePredecessor(BB);
++ if (DDT)
++ Updates.push_back({DominatorTree::Delete, BB, Successor});
++ }
+ if (LVI)
+- LVI->eraseBlock(&*BB);
++ LVI->eraseBlock(BB);
+ BB->dropAllReferences();
+ }
+
+- for (Function::iterator I = ++F.begin(); I != F.end();)
+- if (!Reachable.count(&*I))
+- I = F.getBasicBlockList().erase(I);
+- else
++ for (Function::iterator I = ++F.begin(); I != F.end();) {
++ auto *BB = &*I;
++ if (Reachable.count(BB)) {
++ ++I;
++ continue;
++ }
++ if (DDT) {
++ DDT->deleteBB(BB); // deferred deletion of BB.
+ ++I;
++ } else {
++ I = F.getBasicBlockList().erase(I);
++ }
++ }
+
++ if (DDT)
++ DDT->applyUpdates(Updates);
+ return true;
+ }
+
+Index: llvm-toolchain-6.0-6.0.1/test/Analysis/LazyValueAnalysis/lvi-after-jumpthreading.ll
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/test/Analysis/LazyValueAnalysis/lvi-after-jumpthreading.ll
++++ llvm-toolchain-6.0-6.0.1/test/Analysis/LazyValueAnalysis/lvi-after-jumpthreading.ll
+@@ -19,10 +19,13 @@ entry:
+ ; CHECK-NEXT: ; LatticeVal for: 'i32 %a' is: overdefined
+ ; CHECK-NEXT: ; LatticeVal for: 'i32 %length' is: overdefined
+ ; CHECK-NEXT: ; LatticeVal for: ' %iv = phi i32 [ 0, %entry ], [ %iv.next, %backedge ]' in BB: '%backedge' is: constantrange<0, 400>
++; CHECK-NEXT: ; LatticeVal for: ' %iv = phi i32 [ 0, %entry ], [ %iv.next, %backedge ]' in BB: '%exit' is: constantrange<399, 400>
+ ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.next, %backedge ]
+ ; CHECK-NEXT: ; LatticeVal for: ' %iv.next = add nsw i32 %iv, 1' in BB: '%backedge' is: constantrange<1, 401>
++; CHECK-NEXT: ; LatticeVal for: ' %iv.next = add nsw i32 %iv, 1' in BB: '%exit' is: constantrange<400, 401>
+ ; CHECK-NEXT: %iv.next = add nsw i32 %iv, 1
+ ; CHECK-NEXT: ; LatticeVal for: ' %cont = icmp slt i32 %iv.next, 400' in BB: '%backedge' is: overdefined
++; CHECK-NEXT: ; LatticeVal for: ' %cont = icmp slt i32 %iv.next, 400' in BB: '%exit' is: constantrange<0, -1>
+ ; CHECK-NEXT: %cont = icmp slt i32 %iv.next, 400
+ ; CHECK-NOT: loop
+ loop:
+Index: llvm-toolchain-6.0-6.0.1/test/Transforms/JumpThreading/ddt-crash.ll
+===================================================================
+--- /dev/null
++++ llvm-toolchain-6.0-6.0.1/test/Transforms/JumpThreading/ddt-crash.ll
+@@ -0,0 +1,265 @@
++; RUN: opt < %s -jump-threading -disable-output
++
++%struct.ham = type { i8, i8, i16, i32 }
++%struct.zot = type { i32 (...)** }
++%struct.quux.0 = type { %struct.wombat }
++%struct.wombat = type { %struct.zot }
++
++@global = external global %struct.ham*, align 8
++@global.1 = external constant i8*
++
++declare i32 @wombat.2()
++
++define void @blam() {
++bb:
++ %tmp = load i32, i32* undef
++ %tmp1 = icmp eq i32 %tmp, 0
++ br i1 %tmp1, label %bb11, label %bb2
++
++bb2:
++ %tmp3 = tail call i32 @wombat.2()
++ switch i32 %tmp3, label %bb4 [
++ i32 0, label %bb5
++ i32 1, label %bb7
++ i32 2, label %bb7
++ i32 3, label %bb11
++ ]
++
++bb4:
++ br label %bb7
++
++bb5:
++ %tmp6 = tail call i32 @wombat.2()
++ br label %bb7
++
++bb7:
++ %tmp8 = phi i32 [ 0, %bb5 ], [ 1, %bb4 ], [ 2, %bb2 ], [ 2, %bb2 ]
++ %tmp9 = icmp eq i32 %tmp8, 0
++ br i1 %tmp9, label %bb11, label %bb10
++
++bb10:
++ ret void
++
++bb11:
++ ret void
++}
++
++define void @spam(%struct.ham* %arg) {
++bb:
++ %tmp = load i8, i8* undef, align 8
++ switch i8 %tmp, label %bb11 [
++ i8 1, label %bb11
++ i8 2, label %bb11
++ i8 3, label %bb1
++ i8 4, label %bb1
++ ]
++
++bb1:
++ br label %bb2
++
++bb2:
++ %tmp3 = phi i32 [ 0, %bb1 ], [ %tmp3, %bb8 ]
++ br label %bb4
++
++bb4:
++ %tmp5 = load i8, i8* undef, align 8
++ switch i8 %tmp5, label %bb11 [
++ i8 0, label %bb11
++ i8 1, label %bb10
++ i8 2, label %bb10
++ i8 3, label %bb6
++ i8 4, label %bb6
++ ]
++
++bb6:
++ br label %bb7
++
++bb7:
++ br i1 undef, label %bb8, label %bb10
++
++bb8:
++ %tmp9 = icmp eq %struct.ham* undef, %arg
++ br i1 %tmp9, label %bb10, label %bb2
++
++bb10:
++ switch i32 %tmp3, label %bb4 [
++ i32 0, label %bb14
++ i32 1, label %bb11
++ i32 2, label %bb12
++ ]
++
++bb11:
++ unreachable
++
++bb12:
++ %tmp13 = load %struct.ham*, %struct.ham** undef
++ br label %bb14
++
++bb14:
++ %tmp15 = phi %struct.ham* [ %tmp13, %bb12 ], [ null, %bb10 ]
++ br label %bb16
++
++bb16:
++ %tmp17 = load i8, i8* undef, align 8
++ switch i8 %tmp17, label %bb11 [
++ i8 0, label %bb11
++ i8 11, label %bb18
++ i8 12, label %bb18
++ ]
++
++bb18:
++ br label %bb19
++
++bb19:
++ br label %bb20
++
++bb20:
++ %tmp21 = load %struct.ham*, %struct.ham** undef
++ switch i8 undef, label %bb22 [
++ i8 0, label %bb4
++ i8 11, label %bb10
++ i8 12, label %bb10
++ ]
++
++bb22:
++ br label %bb23
++
++bb23:
++ %tmp24 = icmp eq %struct.ham* %tmp21, null
++ br i1 %tmp24, label %bb35, label %bb25
++
++bb25:
++ %tmp26 = icmp eq %struct.ham* %tmp15, null
++ br i1 %tmp26, label %bb34, label %bb27
++
++bb27:
++ %tmp28 = load %struct.ham*, %struct.ham** undef
++ %tmp29 = icmp eq %struct.ham* %tmp28, %tmp21
++ br i1 %tmp29, label %bb35, label %bb30
++
++bb30:
++ br label %bb31
++
++bb31:
++ %tmp32 = load i8, i8* undef, align 8
++ %tmp33 = icmp eq i8 %tmp32, 0
++ br i1 %tmp33, label %bb31, label %bb34
++
++bb34:
++ br label %bb35
++
++bb35:
++ %tmp36 = phi i1 [ true, %bb34 ], [ false, %bb23 ], [ true, %bb27 ]
++ br label %bb37
++
++bb37:
++ %tmp38 = icmp eq %struct.ham* %tmp15, null
++ br i1 %tmp38, label %bb39, label %bb41
++
++bb39:
++ %tmp40 = load %struct.ham*, %struct.ham** @global
++ br label %bb41
++
++bb41:
++ %tmp42 = select i1 %tmp36, %struct.ham* undef, %struct.ham* undef
++ ret void
++}
++
++declare i32 @foo(...)
++
++define void @zot() align 2 personality i8* bitcast (i32 (...)* @foo to i8*) {
++bb:
++ invoke void @bar()
++ to label %bb1 unwind label %bb3
++
++bb1:
++ invoke void @bar()
++ to label %bb2 unwind label %bb4
++
++bb2:
++ invoke void @bar()
++ to label %bb6 unwind label %bb17
++
++bb3:
++ %tmp = landingpad { i8*, i32 }
++ catch i8* bitcast (i8** @global.1 to i8*)
++ catch i8* null
++ unreachable
++
++bb4:
++ %tmp5 = landingpad { i8*, i32 }
++ catch i8* bitcast (i8** @global.1 to i8*)
++ catch i8* null
++ unreachable
++
++bb6:
++ invoke void @bar()
++ to label %bb7 unwind label %bb19
++
++bb7:
++ invoke void @bar()
++ to label %bb10 unwind label %bb8
++
++bb8:
++ %tmp9 = landingpad { i8*, i32 }
++ cleanup
++ catch i8* bitcast (i8** @global.1 to i8*)
++ catch i8* null
++ unreachable
++
++bb10:
++ %tmp11 = load i32 (%struct.zot*)*, i32 (%struct.zot*)** undef, align 8
++ %tmp12 = invoke i32 %tmp11(%struct.zot* nonnull undef)
++ to label %bb13 unwind label %bb21
++
++bb13:
++ invoke void @bar()
++ to label %bb14 unwind label %bb23
++
++bb14:
++ %tmp15 = load i32 (%struct.zot*)*, i32 (%struct.zot*)** undef, align 8
++ %tmp16 = invoke i32 %tmp15(%struct.zot* nonnull undef)
++ to label %bb26 unwind label %bb23
++
++bb17:
++ %tmp18 = landingpad { i8*, i32 }
++ catch i8* bitcast (i8** @global.1 to i8*)
++ catch i8* null
++ unreachable
++
++bb19:
++ %tmp20 = landingpad { i8*, i32 }
++ catch i8* bitcast (i8** @global.1 to i8*)
++ catch i8* null
++ unreachable
++
++bb21:
++ %tmp22 = landingpad { i8*, i32 }
++ catch i8* bitcast (i8** @global.1 to i8*)
++ catch i8* null
++ unreachable
++
++bb23:
++ %tmp24 = phi %struct.quux.0* [ null, %bb26 ], [ null, %bb14 ], [ undef, %bb13 ]
++ %tmp25 = landingpad { i8*, i32 }
++ catch i8* bitcast (i8** @global.1 to i8*)
++ catch i8* null
++ br label %bb30
++
++bb26:
++ %tmp27 = load i32 (%struct.zot*)*, i32 (%struct.zot*)** undef, align 8
++ %tmp28 = invoke i32 %tmp27(%struct.zot* nonnull undef)
++ to label %bb29 unwind label %bb23
++
++bb29:
++ unreachable
++
++bb30:
++ %tmp31 = icmp eq %struct.quux.0* %tmp24, null
++ br i1 %tmp31, label %bb32, label %bb29
++
++bb32:
++ unreachable
++}
++
++declare void @bar()
+Index: llvm-toolchain-6.0-6.0.1/test/Transforms/JumpThreading/ddt-crash2.ll
+===================================================================
+--- /dev/null
++++ llvm-toolchain-6.0-6.0.1/test/Transforms/JumpThreading/ddt-crash2.ll
+@@ -0,0 +1,40 @@
++; RUN: opt < %s -jump-threading -disable-output
++
++%struct.aaa = type { i8 }
++
++define void @chrome(%struct.aaa* noalias sret %arg) local_unnamed_addr #0 align 2 personality i8* bitcast (i32 (...)* @chrome2 to i8*) {
++bb:
++ %tmp = load i32, i32* undef, align 4
++ %tmp1 = icmp eq i32 %tmp, 0
++ br i1 %tmp1, label %bb2, label %bb13
++
++bb2:
++ %tmp3 = getelementptr inbounds %struct.aaa, %struct.aaa* %arg, i64 0, i32 0
++ %tmp4 = load i8, i8* %tmp3, align 1
++ %tmp5 = icmp eq i8 %tmp4, 0
++ br i1 %tmp5, label %bb6, label %bb7
++
++bb6:
++ store i8 0, i8* %tmp3, align 1
++ br label %bb7
++
++bb7:
++ %tmp8 = load i8, i8* %tmp3, align 1
++ %tmp9 = icmp ne i8 %tmp8, 0
++ %tmp10 = select i1 %tmp9, i1 true, i1 false
++ br i1 %tmp10, label %bb12, label %bb11
++
++bb11:
++ br label %bb12
++
++bb12:
++ br i1 %tmp9, label %bb14, label %bb13
++
++bb13:
++ unreachable
++
++bb14:
++ ret void
++}
++
++declare i32 @chrome2(...)
+Index: llvm-toolchain-6.0-6.0.1/test/Transforms/JumpThreading/lvi-tristate.ll
+===================================================================
+--- /dev/null
++++ llvm-toolchain-6.0-6.0.1/test/Transforms/JumpThreading/lvi-tristate.ll
+@@ -0,0 +1,50 @@
++; RUN: opt -jump-threading -simplifycfg -S < %s | FileCheck %s
++; CHECK-NOT: bb6:
++; CHECK-NOT: bb7:
++; CHECK-NOT: bb8:
++; CHECK-NOT: bb11:
++; CHECK-NOT: bb12:
++; CHECK: bb:
++; CHECK: bb2:
++; CHECK: bb4:
++; CHECK: bb10:
++; CHECK: bb13:
++declare void @ham()
++
++define void @hoge() {
++bb:
++ %tmp = and i32 undef, 1073741823
++ %tmp1 = icmp eq i32 %tmp, 2
++ br i1 %tmp1, label %bb12, label %bb2
++
++bb2:
++ %tmp3 = icmp eq i32 %tmp, 3
++ br i1 %tmp3, label %bb13, label %bb4
++
++bb4:
++ %tmp5 = icmp eq i32 %tmp, 5
++ br i1 %tmp5, label %bb6, label %bb7
++
++bb6:
++ tail call void @ham()
++ br label %bb7
++
++bb7:
++ br i1 %tmp3, label %bb13, label %bb8
++
++bb8:
++ %tmp9 = icmp eq i32 %tmp, 4
++ br i1 %tmp9, label %bb13, label %bb10
++
++bb10:
++ br i1 %tmp9, label %bb11, label %bb13
++
++bb11:
++ br label %bb13
++
++bb12:
++ br label %bb2
++
++bb13:
++ ret void
++}
+Index: llvm-toolchain-6.0-6.0.1/unittests/IR/CMakeLists.txt
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/unittests/IR/CMakeLists.txt
++++ llvm-toolchain-6.0-6.0.1/unittests/IR/CMakeLists.txt
+@@ -15,6 +15,7 @@ set(IRSources
+ ConstantsTest.cpp
+ DebugInfoTest.cpp
+ DebugTypeODRUniquingTest.cpp
++ DeferredDominanceTest.cpp
+ DominatorTreeTest.cpp
+ DominatorTreeBatchUpdatesTest.cpp
+ FunctionTest.cpp
+Index: llvm-toolchain-6.0-6.0.1/unittests/IR/DeferredDominanceTest.cpp
+===================================================================
+--- /dev/null
++++ llvm-toolchain-6.0-6.0.1/unittests/IR/DeferredDominanceTest.cpp
+@@ -0,0 +1,344 @@
++//===- llvm/unittests/IR/DeferredDominanceTest.cpp - DDT unit tests -------===//
++//
++// The LLVM Compiler Infrastructure
++//
++// This file is distributed under the University of Illinois Open Source
++// License. See LICENSE.TXT for details.
++//
++//===----------------------------------------------------------------------===//
++
++#include "llvm/AsmParser/Parser.h"
++#include "llvm/IR/Constants.h"
++#include "llvm/IR/Dominators.h"
++#include "llvm/IR/Instructions.h"
++#include "llvm/IR/LLVMContext.h"
++#include "llvm/IR/Module.h"
++#include "llvm/Support/SourceMgr.h"
++#include "gtest/gtest.h"
++
++using namespace llvm;
++
++static std::unique_ptr<Module> makeLLVMModule(LLVMContext &Context,
++ StringRef ModuleStr) {
++ SMDiagnostic Err;
++ std::unique_ptr<Module> M = parseAssemblyString(ModuleStr, Err, Context);
++ assert(M && "Bad LLVM IR?");
++ return M;
++}
++
++TEST(DeferredDominance, BasicOperations) {
++ StringRef FuncName = "f";
++ StringRef ModuleString =
++ "define i32 @f(i32 %i, i32 *%p) {\n"
++ " bb0:\n"
++ " store i32 %i, i32 *%p\n"
++ " switch i32 %i, label %bb1 [\n"
++ " i32 0, label %bb2\n"
++ " i32 1, label %bb2\n"
++ " i32 2, label %bb3\n"
++ " ]\n"
++ " bb1:\n"
++ " ret i32 1\n"
++ " bb2:\n"
++ " ret i32 2\n"
++ " bb3:\n"
++ " ret i32 3\n"
++ "}\n";
++ // Make the module.
++ LLVMContext Context;
++ std::unique_ptr<Module> M = makeLLVMModule(Context, ModuleString);
++ Function *F = M->getFunction(FuncName);
++ ASSERT_NE(F, nullptr) << "Couldn't get function " << FuncName << ".";
++
++ // Make the DDT.
++ DominatorTree DT(*F);
++ DeferredDominance DDT(DT);
++ ASSERT_TRUE(DDT.flush().verify());
++
++ Function::iterator FI = F->begin();
++ BasicBlock *BB0 = &*FI++;
++ BasicBlock *BB1 = &*FI++;
++ BasicBlock *BB2 = &*FI++;
++ BasicBlock *BB3 = &*FI++;
++
++ // Test discards of invalid self-domination updates. These use the single
++ // short-hand interface but are still queued inside DDT.
++ DDT.deleteEdge(BB0, BB0);
++ DDT.insertEdge(BB1, BB1);
++
++ // Delete edge bb0 -> bb3 and push the update twice to verify duplicate
++ // entries are discarded.
++ std::vector<DominatorTree::UpdateType> Updates;
++ Updates.reserve(4);
++ Updates.push_back({DominatorTree::Delete, BB0, BB3});
++ Updates.push_back({DominatorTree::Delete, BB0, BB3});
++
++ // Unnecessary Insert: no edge bb1 -> bb2 after change to bb0.
++ Updates.push_back({DominatorTree::Insert, BB1, BB2});
++ // Unnecessary Delete: edge exists bb0 -> bb1 after change to bb0.
++ Updates.push_back({DominatorTree::Delete, BB0, BB1});
++
++ // CFG Change: remove edge bb0 -> bb3 and one duplicate edge bb0 -> bb2.
++ EXPECT_EQ(BB0->getTerminator()->getNumSuccessors(), 4u);
++ BB0->getTerminator()->eraseFromParent();
++ BranchInst::Create(BB1, BB2, ConstantInt::getTrue(F->getContext()), BB0);
++ EXPECT_EQ(BB0->getTerminator()->getNumSuccessors(), 2u);
++
++ // Deletion of a BasicBlock is an immediate event. We remove all uses to the
++ // contained Instructions and change the Terminator to "unreachable" when
++ // queued for deletion. Its parent is still F until DDT.flush() is called. We
++ // don't defer this action because it can cause problems for other transforms
++ // or analysis as it's part of the actual CFG. We only defer updates to the
++ // DominatorTree. This code will crash if it is placed before the
++ // BranchInst::Create() call above.
++ ASSERT_FALSE(isa<UnreachableInst>(BB3->getTerminator()));
++ EXPECT_FALSE(DDT.pendingDeletedBB(BB3));
++ DDT.deleteBB(BB3);
++ EXPECT_TRUE(DDT.pendingDeletedBB(BB3));
++ ASSERT_TRUE(isa<UnreachableInst>(BB3->getTerminator()));
++ EXPECT_EQ(BB3->getParent(), F);
++
++ // Verify. Updates to DDT must be applied *after* all changes to the CFG
++ // (including block deletion).
++ DDT.applyUpdates(Updates);
++ ASSERT_TRUE(DDT.flush().verify());
++}
++
++TEST(DeferredDominance, PairedUpdate) {
++ StringRef FuncName = "f";
++ StringRef ModuleString =
++ "define i32 @f(i32 %i, i32 *%p) {\n"
++ " bb0:\n"
++ " store i32 %i, i32 *%p\n"
++ " switch i32 %i, label %bb1 [\n"
++ " i32 0, label %bb2\n"
++ " i32 1, label %bb2\n"
++ " ]\n"
++ " bb1:\n"
++ " ret i32 1\n"
++ " bb2:\n"
++ " ret i32 2\n"
++ "}\n";
++ // Make the module.
++ LLVMContext Context;
++ std::unique_ptr<Module> M = makeLLVMModule(Context, ModuleString);
++ Function *F = M->getFunction(FuncName);
++ ASSERT_NE(F, nullptr) << "Couldn't get function " << FuncName << ".";
++
++ // Make the DDT.
++ DominatorTree DT(*F);
++ DeferredDominance DDT(DT);
++ ASSERT_TRUE(DDT.flush().verify());
++
++ Function::iterator FI = F->begin();
++ BasicBlock *BB0 = &*FI++;
++ BasicBlock *BB1 = &*FI++;
++ BasicBlock *BB2 = &*FI++;
++
++ // CFG Change: only edge from bb0 is bb0 -> bb1.
++ EXPECT_EQ(BB0->getTerminator()->getNumSuccessors(), 3u);
++ BB0->getTerminator()->eraseFromParent();
++ BranchInst::Create(BB1, BB0);
++ EXPECT_EQ(BB0->getTerminator()->getNumSuccessors(), 1u);
++
++ // Must be done after the CFG change. The applyUpdate() routine analyzes the
++ // current state of the CFG.
++ DDT.deleteEdge(BB0, BB2);
++
++ // CFG Change: bb0 now has bb0 -> bb1 and bb0 -> bb2.
++ // With this change no dominance has been altered from the original IR. DT
++ // doesn't care if the type of TerminatorInstruction changed, only if the
++ // unique edges have.
++ EXPECT_EQ(BB0->getTerminator()->getNumSuccessors(), 1u);
++ BB0->getTerminator()->eraseFromParent();
++ BranchInst::Create(BB1, BB2, ConstantInt::getTrue(F->getContext()), BB0);
++ EXPECT_EQ(BB0->getTerminator()->getNumSuccessors(), 2u);
++
++ // Must be done after the CFG change. The applyUpdate() routine analyzes the
++ // current state of the CFG. This DDT update pairs with the previous one and
++ // is cancelled out before ever applying updates to DT.
++ DDT.insertEdge(BB0, BB2);
++
++ // Test the empty DeletedBB list.
++ EXPECT_FALSE(DDT.pendingDeletedBB(BB0));
++ EXPECT_FALSE(DDT.pendingDeletedBB(BB1));
++ EXPECT_FALSE(DDT.pendingDeletedBB(BB2));
++
++ // The DT has no changes, this flush() simply returns a reference to the
++ // internal DT calculated at the beginning of this test.
++ ASSERT_TRUE(DDT.flush().verify());
++}
++
++TEST(DeferredDominance, ReplaceEntryBB) {
++ StringRef FuncName = "f";
++ StringRef ModuleString =
++ "define i32 @f() {\n"
++ "bb0:\n"
++ " br label %bb1\n"
++ " bb1:\n"
++ " ret i32 1\n"
++ "}\n";
++ // Make the module.
++ LLVMContext Context;
++ std::unique_ptr<Module> M = makeLLVMModule(Context, ModuleString);
++ Function *F = M->getFunction(FuncName);
++ ASSERT_NE(F, nullptr) << "Couldn't get function " << FuncName << ".";
++
++ // Make the DDT.
++ DominatorTree DT(*F);
++ DeferredDominance DDT(DT);
++ ASSERT_TRUE(DDT.flush().verify());
++
++ Function::iterator FI = F->begin();
++ BasicBlock *BB0 = &*FI++;
++ BasicBlock *BB1 = &*FI++;
++
++ // Add a block as the new function entry BB. We also link it to BB0.
++ BasicBlock *NewEntry =
++ BasicBlock::Create(F->getContext(), "new_entry", F, BB0);
++ BranchInst::Create(BB0, NewEntry);
++ EXPECT_EQ(F->begin()->getName(), NewEntry->getName());
++ EXPECT_TRUE(&F->getEntryBlock() == NewEntry);
++
++ // Insert the new edge between new_eentry -> bb0. Without this the
++ // recalculate() call below will not actually recalculate the DT as there
++ // are no changes pending and no blocks deleted.
++ DDT.insertEdge(NewEntry, BB0);
++
++ // Changing the Entry BB requires a full recalulation.
++ DDT.recalculate(*F);
++ ASSERT_TRUE(DDT.flush().verify());
++
++ // CFG Change: remove new_edge -> bb0 and redirect to new_edge -> bb1.
++ EXPECT_EQ(NewEntry->getTerminator()->getNumSuccessors(), 1u);
++ NewEntry->getTerminator()->eraseFromParent();
++ BranchInst::Create(BB1, NewEntry);
++ EXPECT_EQ(BB0->getTerminator()->getNumSuccessors(), 1u);
++
++ // Update the DDT. At this point bb0 now has no predecessors but is still a
++ // Child of F.
++ DDT.applyUpdates({{DominatorTree::Delete, NewEntry, BB0},
++ {DominatorTree::Insert, NewEntry, BB1}});
++ ASSERT_TRUE(DDT.flush().verify());
++
++ // Now remove bb0 from F.
++ ASSERT_FALSE(isa<UnreachableInst>(BB0->getTerminator()));
++ EXPECT_FALSE(DDT.pendingDeletedBB(BB0));
++ DDT.deleteBB(BB0);
++ EXPECT_TRUE(DDT.pendingDeletedBB(BB0));
++ ASSERT_TRUE(isa<UnreachableInst>(BB0->getTerminator()));
++ EXPECT_EQ(BB0->getParent(), F);
++
++ // Perform a full recalculation of the DDT. It is not necessary here but we
++ // do this to test the case when there are no pending DT updates but there are
++ // pending deleted BBs.
++ DDT.recalculate(*F);
++ ASSERT_TRUE(DDT.flush().verify());
++}
++
++TEST(DeferredDominance, InheritedPreds) {
++ StringRef FuncName = "f";
++ StringRef ModuleString =
++ "define i32 @f(i32 %i, i32 *%p) {\n"
++ " bb0:\n"
++ " store i32 %i, i32 *%p\n"
++ " switch i32 %i, label %bb1 [\n"
++ " i32 2, label %bb2\n"
++ " i32 3, label %bb3\n"
++ " ]\n"
++ " bb1:\n"
++ " br label %bb3\n"
++ " bb2:\n"
++ " br label %bb3\n"
++ " bb3:\n"
++ " ret i32 3\n"
++ "}\n";
++ // Make the module.
++ LLVMContext Context;
++ std::unique_ptr<Module> M = makeLLVMModule(Context, ModuleString);
++ Function *F = M->getFunction(FuncName);
++ ASSERT_NE(F, nullptr) << "Couldn't get function " << FuncName << ".";
++
++ // Make the DDT.
++ DominatorTree DT(*F);
++ DeferredDominance DDT(DT);
++ ASSERT_TRUE(DDT.flush().verify());
++
++ Function::iterator FI = F->begin();
++ BasicBlock *BB0 = &*FI++;
++ BasicBlock *BB1 = &*FI++;
++ BasicBlock *BB2 = &*FI++;
++ BasicBlock *BB3 = &*FI++;
++
++ // There are several CFG locations where we have:
++ //
++ // pred1..predN
++ // | |
++ // +> curr <+ converted into: pred1..predN curr
++ // | | |
++ // v +> succ <+
++ // succ
++ //
++ // There is a specific shape of this we have to be careful of:
++ //
++ // pred1..predN
++ // || |
++ // |+> curr <+ converted into: pred1..predN curr
++ // | | | |
++ // | v +> succ <+
++ // +-> succ
++ //
++ // While the final CFG form is functionally identical the updates to
++ // DDT are not. In the first case we must have DDT.insertEdge(Pred1, Succ)
++ // while in the latter case we must *NOT* have DDT.insertEdge(Pred1, Succ).
++
++ // CFG Change: bb0 now only has bb0 -> bb1 and bb0 -> bb3. We are preparing to
++ // remove bb2.
++ EXPECT_EQ(BB0->getTerminator()->getNumSuccessors(), 3u);
++ BB0->getTerminator()->eraseFromParent();
++ BranchInst::Create(BB1, BB3, ConstantInt::getTrue(F->getContext()), BB0);
++ EXPECT_EQ(BB0->getTerminator()->getNumSuccessors(), 2u);
++
++ // Remove bb2 from F. This has to happen before the call to applyUpdates() for
++ // DDT to detect there is no longer an edge between bb2 -> bb3. The deleteBB()
++ // method converts bb2's TI into "unreachable".
++ ASSERT_FALSE(isa<UnreachableInst>(BB2->getTerminator()));
++ EXPECT_FALSE(DDT.pendingDeletedBB(BB2));
++ DDT.deleteBB(BB2);
++ EXPECT_TRUE(DDT.pendingDeletedBB(BB2));
++ ASSERT_TRUE(isa<UnreachableInst>(BB2->getTerminator()));
++ EXPECT_EQ(BB2->getParent(), F);
++
++ // Queue up the DDT updates.
++ std::vector<DominatorTree::UpdateType> Updates;
++ Updates.reserve(4);
++ Updates.push_back({DominatorTree::Delete, BB0, BB2});
++ Updates.push_back({DominatorTree::Delete, BB2, BB3});
++
++ // Handle the specific shape case next.
++ // CFG Change: bb0 now only branches to bb3. We are preparing to remove bb1.
++ EXPECT_EQ(BB0->getTerminator()->getNumSuccessors(), 2u);
++ BB0->getTerminator()->eraseFromParent();
++ BranchInst::Create(BB3, BB0);
++ EXPECT_EQ(BB0->getTerminator()->getNumSuccessors(), 1u);
++
++ // Remove bb1 from F. This has to happen before the call to applyUpdates() for
++ // DDT to detect there is no longer an edge between bb1 -> bb3. The deleteBB()
++ // method converts bb1's TI into "unreachable".
++ ASSERT_FALSE(isa<UnreachableInst>(BB1->getTerminator()));
++ EXPECT_FALSE(DDT.pendingDeletedBB(BB1));
++ DDT.deleteBB(BB1);
++ EXPECT_TRUE(DDT.pendingDeletedBB(BB1));
++ ASSERT_TRUE(isa<UnreachableInst>(BB1->getTerminator()));
++ EXPECT_EQ(BB1->getParent(), F);
++
++ // Update the DDT. In this case we don't call DDT.insertEdge(BB0, BB3) because
++ // the edge previously existed at the start of this test when DT was first
++ // created.
++ Updates.push_back({DominatorTree::Delete, BB0, BB1});
++ Updates.push_back({DominatorTree::Delete, BB1, BB3});
++
++ // Verify everything.
++ DDT.applyUpdates(Updates);
++ ASSERT_TRUE(DDT.flush().verify());
++}
--- /dev/null
+Index: llvm-toolchain-6.0-6.0.1/include/llvm/Analysis/LazyValueInfo.h
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/include/llvm/Analysis/LazyValueInfo.h
++++ llvm-toolchain-6.0-6.0.1/include/llvm/Analysis/LazyValueInfo.h
+@@ -113,6 +113,13 @@ public:
+ /// in LVI, so we need to pass it here as an argument.
+ void printLVI(Function &F, DominatorTree &DTree, raw_ostream &OS);
+
++ /// Disables use of the DominatorTree within LVI.
++ void disableDT();
++
++ /// Enables use of the DominatorTree within LVI. Does nothing if the class
++ /// instance was initialized without a DT pointer.
++ void enableDT();
++
+ // For old PM pass. Delete once LazyValueInfoWrapperPass is gone.
+ void releaseMemory();
+
+Index: llvm-toolchain-6.0-6.0.1/include/llvm/IR/Dominators.h
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/include/llvm/IR/Dominators.h
++++ llvm-toolchain-6.0-6.0.1/include/llvm/IR/Dominators.h
+@@ -342,6 +342,9 @@ public:
+ /// \brief Returns true if DelBB is awaiting deletion at a flush() event.
+ bool pendingDeletedBB(BasicBlock *DelBB);
+
++ /// \brief Returns true if pending DT updates are queued for a flush() event.
++ bool pending();
++
+ /// \brief Flushes all pending updates and block deletions. Returns a
+ /// correct DominatorTree reference to be used by the caller for analysis.
+ DominatorTree &flush();
+Index: llvm-toolchain-6.0-6.0.1/lib/Analysis/LazyValueInfo.cpp
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/Analysis/LazyValueInfo.cpp
++++ llvm-toolchain-6.0-6.0.1/lib/Analysis/LazyValueInfo.cpp
+@@ -401,6 +401,7 @@ namespace {
+ AssumptionCache *AC; ///< A pointer to the cache of @llvm.assume calls.
+ const DataLayout &DL; ///< A mandatory DataLayout
+ DominatorTree *DT; ///< An optional DT pointer.
++ DominatorTree *DisabledDT; ///< Stores DT if it's disabled.
+
+ ValueLatticeElement getBlockValue(Value *Val, BasicBlock *BB);
+ bool getEdgeValue(Value *V, BasicBlock *F, BasicBlock *T,
+@@ -463,13 +464,30 @@ namespace {
+ TheCache.eraseBlock(BB);
+ }
+
++ /// Disables use of the DominatorTree within LVI.
++ void disableDT() {
++ if (DT) {
++ assert(!DisabledDT && "Both DT and DisabledDT are not nullptr!");
++ std::swap(DT, DisabledDT);
++ }
++ }
++
++ /// Enables use of the DominatorTree within LVI. Does nothing if the class
++ /// instance was initialized without a DT pointer.
++ void enableDT() {
++ if (DisabledDT) {
++ assert(!DT && "Both DT and DisabledDT are not nullptr!");
++ std::swap(DT, DisabledDT);
++ }
++ }
++
+ /// This is the update interface to inform the cache that an edge from
+ /// PredBB to OldSucc has been threaded to be from PredBB to NewSucc.
+ void threadEdge(BasicBlock *PredBB,BasicBlock *OldSucc,BasicBlock *NewSucc);
+
+ LazyValueInfoImpl(AssumptionCache *AC, const DataLayout &DL,
+ DominatorTree *DT = nullptr)
+- : AC(AC), DL(DL), DT(DT) {}
++ : AC(AC), DL(DL), DT(DT), DisabledDT(nullptr) {}
+ };
+ } // end anonymous namespace
+
+@@ -1791,6 +1809,16 @@ void LazyValueInfo::printLVI(Function &F
+ }
+ }
+
++void LazyValueInfo::disableDT() {
++ if (PImpl)
++ getImpl(PImpl, AC, DL, DT).disableDT();
++}
++
++void LazyValueInfo::enableDT() {
++ if (PImpl)
++ getImpl(PImpl, AC, DL, DT).enableDT();
++}
++
+ // Print the LVI for the function arguments at the start of each basic block.
+ void LazyValueInfoAnnotatedWriter::emitBasicBlockStartAnnot(
+ const BasicBlock *BB, formatted_raw_ostream &OS) {
+Index: llvm-toolchain-6.0-6.0.1/lib/IR/Dominators.cpp
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/IR/Dominators.cpp
++++ llvm-toolchain-6.0-6.0.1/lib/IR/Dominators.cpp
+@@ -453,6 +453,9 @@ bool DeferredDominance::pendingDeletedBB
+ return DeletedBBs.count(DelBB) != 0;
+ }
+
++/// \brief Returns true if pending DT updates are queued for a flush() event.
++bool DeferredDominance::pending() { return !PendUpdates.empty(); }
++
+ /// \brief Flushes all pending updates and block deletions. Returns a
+ /// correct DominatorTree reference to be used by the caller for analysis.
+ DominatorTree &DeferredDominance::flush() {
+Index: llvm-toolchain-6.0-6.0.1/lib/Transforms/Scalar/JumpThreading.cpp
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/Transforms/Scalar/JumpThreading.cpp
++++ llvm-toolchain-6.0-6.0.1/lib/Transforms/Scalar/JumpThreading.cpp
+@@ -425,6 +425,7 @@ bool JumpThreadingPass::runImpl(Function
+
+ LoopHeaders.clear();
+ DDT->flush();
++ LVI->enableDT();
+ return EverChanged;
+ }
+
+@@ -617,6 +618,10 @@ bool JumpThreadingPass::ComputeValueKnow
+ // "X < 4" and "X < 3" is known true but "X < 4" itself is not available.
+ // Perhaps getConstantOnEdge should be smart enough to do this?
+
++ if (DDT->pending())
++ LVI->disableDT();
++ else
++ LVI->enableDT();
+ for (BasicBlock *P : predecessors(BB)) {
+ // If the value is known by LazyValueInfo to be a constant in a
+ // predecessor, use that information to try to thread this block.
+@@ -630,6 +635,10 @@ bool JumpThreadingPass::ComputeValueKnow
+
+ /// If I is a PHI node, then we know the incoming values for any constants.
+ if (PHINode *PN = dyn_cast<PHINode>(I)) {
++ if (DDT->pending())
++ LVI->disableDT();
++ else
++ LVI->enableDT();
+ for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i) {
+ Value *InVal = PN->getIncomingValue(i);
+ if (Constant *KC = getKnownConstant(InVal, Preference)) {
+@@ -759,6 +768,10 @@ bool JumpThreadingPass::ComputeValueKnow
+ const DataLayout &DL = PN->getModule()->getDataLayout();
+ // We can do this simplification if any comparisons fold to true or false.
+ // See if any do.
++ if (DDT->pending())
++ LVI->disableDT();
++ else
++ LVI->enableDT();
+ for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i) {
+ BasicBlock *PredBB = PN->getIncomingBlock(i);
+ Value *LHS = PN->getIncomingValue(i);
+@@ -792,6 +805,10 @@ bool JumpThreadingPass::ComputeValueKnow
+
+ if (!isa<Instruction>(CmpLHS) ||
+ cast<Instruction>(CmpLHS)->getParent() != BB) {
++ if (DDT->pending())
++ LVI->disableDT();
++ else
++ LVI->enableDT();
+ for (BasicBlock *P : predecessors(BB)) {
+ // If the value is known by LazyValueInfo to be a constant in a
+ // predecessor, use that information to try to thread this block.
+@@ -820,6 +837,10 @@ bool JumpThreadingPass::ComputeValueKnow
+ match(CmpLHS, m_Add(m_Value(AddLHS), m_ConstantInt(AddConst)))) {
+ if (!isa<Instruction>(AddLHS) ||
+ cast<Instruction>(AddLHS)->getParent() != BB) {
++ if (DDT->pending())
++ LVI->disableDT();
++ else
++ LVI->enableDT();
+ for (BasicBlock *P : predecessors(BB)) {
+ // If the value is known by LazyValueInfo to be a ConstantRange in
+ // a predecessor, use that information to try to thread this
+@@ -901,6 +922,10 @@ bool JumpThreadingPass::ComputeValueKnow
+ }
+
+ // If all else fails, see if LVI can figure out a constant value for us.
++ if (DDT->pending())
++ LVI->disableDT();
++ else
++ LVI->enableDT();
+ Constant *CI = LVI->getConstant(V, BB, CxtI);
+ if (Constant *KC = getKnownConstant(CI, Preference)) {
+ for (BasicBlock *Pred : predecessors(BB))
+@@ -1102,6 +1127,10 @@ bool JumpThreadingPass::ProcessBlock(Bas
+ // threading is concerned.
+ assert(CondBr->isConditional() && "Threading on unconditional terminator");
+
++ if (DDT->pending())
++ LVI->disableDT();
++ else
++ LVI->enableDT();
+ LazyValueInfo::Tristate Ret =
+ LVI->getPredicateAt(CondCmp->getPredicate(), CondCmp->getOperand(0),
+ CondConst, CondBr);
+@@ -1914,6 +1943,10 @@ bool JumpThreadingPass::ThreadEdge(Basic
+ << ", across block:\n "
+ << *BB << "\n");
+
++ if (DDT->pending())
++ LVI->disableDT();
++ else
++ LVI->enableDT();
+ LVI->threadEdge(PredBB, BB, SuccBB);
+
+ // We are going to have to map operands from the original BB block to the new
+@@ -2383,6 +2416,10 @@ bool JumpThreadingPass::TryToUnfoldSelec
+ // Now check if one of the select values would allow us to constant fold the
+ // terminator in BB. We don't do the transform if both sides fold, those
+ // cases will be threaded in any case.
++ if (DDT->pending())
++ LVI->disableDT();
++ else
++ LVI->enableDT();
+ LazyValueInfo::Tristate LHSFolds =
+ LVI->getPredicateOnEdge(CondCmp->getPredicate(), SI->getOperand(1),
+ CondRHS, Pred, BB, CondCmp);
+Index: llvm-toolchain-6.0-6.0.1/test/Transforms/JumpThreading/pr36133.ll
+===================================================================
+--- /dev/null
++++ llvm-toolchain-6.0-6.0.1/test/Transforms/JumpThreading/pr36133.ll
+@@ -0,0 +1,44 @@
++; RUN: opt -jump-threading -S < %s | FileCheck %s
++@global = external global i8*, align 8
++
++define i32 @foo(i32 %arg) {
++; CHECK-LABEL: @foo
++; CHECK-LABEL: bb:
++; CHECK: icmp eq
++; CHECK-NEXT: br i1 %tmp1, label %bb7, label %bb7
++bb:
++ %tmp = load i8*, i8** @global, align 8
++ %tmp1 = icmp eq i8* %tmp, null
++ br i1 %tmp1, label %bb3, label %bb2
++
++; CHECK-NOT: bb2:
++bb2:
++ br label %bb3
++
++; CHECK-NOT: bb3:
++bb3:
++ %tmp4 = phi i8 [ 1, %bb2 ], [ 0, %bb ]
++ %tmp5 = icmp eq i8 %tmp4, 0
++ br i1 %tmp5, label %bb7, label %bb6
++
++; CHECK-NOT: bb6:
++bb6:
++ br label %bb7
++
++; CHECK-LABEL: bb7:
++bb7:
++ %tmp8 = icmp eq i32 %arg, -1
++ br i1 %tmp8, label %bb9, label %bb10
++
++; CHECK-LABEL: bb9:
++bb9:
++ ret i32 0
++
++; CHECK-LABEL: bb10:
++bb10:
++ %tmp11 = icmp sgt i32 %arg, -1
++ call void @llvm.assume(i1 %tmp11)
++ ret i32 1
++}
++
++declare void @llvm.assume(i1)
--- /dev/null
+Index: llvm-toolchain-6.0-6.0.1/lib/Target/PowerPC/PPCISelLowering.cpp
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/Target/PowerPC/PPCISelLowering.cpp
++++ llvm-toolchain-6.0-6.0.1/lib/Target/PowerPC/PPCISelLowering.cpp
+@@ -3351,9 +3351,14 @@
+ // Argument stored in memory.
+ assert(VA.isMemLoc());
+
++ // Get the extended size of the argument type in stack
+ unsigned ArgSize = VA.getLocVT().getStoreSize();
+- int FI = MFI.CreateFixedObject(ArgSize, VA.getLocMemOffset(),
+- isImmutable);
++ // Get the actual size of the argument type
++ unsigned ObjSize = VA.getValVT().getStoreSize();
++ unsigned ArgOffset = VA.getLocMemOffset();
++ // Stack objects in PPC32 are right justified.
++ ArgOffset += ArgSize - ObjSize;
++ int FI = MFI.CreateFixedObject(ArgSize, ArgOffset, isImmutable);
+
+ // Create load nodes to retrieve arguments from the stack.
+ SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
+@@ -5303,10 +5308,11 @@
+ Arg = PtrOff;
+ }
+
+- if (VA.isRegLoc()) {
+- if (Arg.getValueType() == MVT::i1)
+- Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Arg);
++ // Ensure callee will get either 0x00000001 or 0x00000000.
++ if (Arg.getValueType() == MVT::i1)
++ Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Arg);
+
++ if (VA.isRegLoc()) {
+ seenFloatArg |= VA.getLocVT().isFloatingPoint();
+ // Put argument in a physical register.
+ RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
+Index: llvm-toolchain-6.0-6.0.1/test/CodeGen/PowerPC/ppc32-i1-stack-arguments-abi-bug.ll
+===================================================================
+--- /dev/null
++++ llvm-toolchain-6.0-6.0.1/test/CodeGen/PowerPC/ppc32-i1-stack-arguments-abi-bug.ll
+@@ -0,0 +1,24 @@
++; RUN: llc -verify-machineinstrs < %s -mcpu=ppc32 -mattr=+crbits | FileCheck %s
++target triple = "powerpc-unknown-linux-gnu"
++
++define zeroext i1 @check_callee(
++ i1 zeroext, i1 zeroext, i1 zeroext, i1 zeroext,
++ i1 zeroext, i1 zeroext, i1 zeroext, i1 zeroext,
++ i1 zeroext %s1
++) {
++ call void @check_caller(
++ i1 zeroext true, i1 zeroext true, i1 zeroext true, i1 zeroext true,
++ i1 zeroext true, i1 zeroext true, i1 zeroext true, i1 zeroext true,
++ i1 zeroext %s1)
++ ret i1 true
++}
++
++; CHECK-LABEL: @check_callee
++; CHECK: lbz {{[0-9]+}}, 27(1)
++; CHECK: stw {{[0-9]+}}, 8(1)
++
++declare void @check_caller(
++ i1 zeroext, i1 zeroext, i1 zeroext, i1 zeroext,
++ i1 zeroext, i1 zeroext, i1 zeroext, i1 zeroext,
++ i1 zeroext
++)
--- /dev/null
+Index: llvm-toolchain-6.0-6.0.1/lib/Transforms/Scalar/SROA.cpp
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/Transforms/Scalar/SROA.cpp
++++ llvm-toolchain-6.0-6.0.1/lib/Transforms/Scalar/SROA.cpp
+@@ -2987,6 +2987,42 @@ private:
+ return true;
+ }
+
++ void fixLoadStoreAlign(Instruction &Root) {
++ // This algorithm implements the same visitor loop as
++ // hasUnsafePHIOrSelectUse, and fixes the alignment of each load
++ // or store found.
++ SmallPtrSet<Instruction *, 4> Visited;
++ SmallVector<Instruction *, 4> Uses;
++ Visited.insert(&Root);
++ Uses.push_back(&Root);
++ do {
++ Instruction *I = Uses.pop_back_val();
++
++ if (LoadInst *LI = dyn_cast<LoadInst>(I)) {
++ unsigned LoadAlign = LI->getAlignment();
++ if (!LoadAlign)
++ LoadAlign = DL.getABITypeAlignment(LI->getType());
++ LI->setAlignment(std::min(LoadAlign, getSliceAlign()));
++ continue;
++ }
++ if (StoreInst *SI = dyn_cast<StoreInst>(I)) {
++ unsigned StoreAlign = SI->getAlignment();
++ if (!StoreAlign) {
++ Value *Op = SI->getOperand(0);
++ StoreAlign = DL.getABITypeAlignment(Op->getType());
++ }
++ SI->setAlignment(std::min(StoreAlign, getSliceAlign()));
++ continue;
++ }
++
++ assert(isa<BitCastInst>(I) || isa<PHINode>(I) ||
++ isa<SelectInst>(I) || isa<GetElementPtrInst>(I));
++ for (User *U : I->users())
++ if (Visited.insert(cast<Instruction>(U)).second)
++ Uses.push_back(cast<Instruction>(U));
++ } while (!Uses.empty());
++ }
++
+ bool visitPHINode(PHINode &PN) {
+ DEBUG(dbgs() << " original: " << PN << "\n");
+ assert(BeginOffset >= NewAllocaBeginOffset && "PHIs are unsplittable");
+@@ -3010,6 +3046,9 @@ private:
+ DEBUG(dbgs() << " to: " << PN << "\n");
+ deleteIfTriviallyDead(OldPtr);
+
++ // Fix the alignment of any loads or stores using this PHI node.
++ fixLoadStoreAlign(PN);
++
+ // PHIs can't be promoted on their own, but often can be speculated. We
+ // check the speculation outside of the rewriter so that we see the
+ // fully-rewritten alloca.
+@@ -3034,6 +3073,9 @@ private:
+ DEBUG(dbgs() << " to: " << SI << "\n");
+ deleteIfTriviallyDead(OldPtr);
+
++ // Fix the alignment of any loads or stores using this select.
++ fixLoadStoreAlign(SI);
++
+ // Selects can't be promoted on their own, but often can be speculated. We
+ // check the speculation outside of the rewriter so that we see the
+ // fully-rewritten alloca.
+Index: llvm-toolchain-6.0-6.0.1/test/Transforms/SROA/phi-and-select.ll
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/test/Transforms/SROA/phi-and-select.ll
++++ llvm-toolchain-6.0-6.0.1/test/Transforms/SROA/phi-and-select.ll
+@@ -600,3 +600,35 @@ if.then5:
+ store %struct.S undef, %struct.S* %f1, align 4
+ ret void
+ }
++
++define i32 @phi_align(i32* %z) {
++; CHECK-LABEL: @phi_align(
++entry:
++ %a = alloca [8 x i8], align 8
++; CHECK: alloca [7 x i8]
++
++ %a0x = getelementptr [8 x i8], [8 x i8]* %a, i64 0, i32 1
++ %a0 = bitcast i8* %a0x to i32*
++ %a1x = getelementptr [8 x i8], [8 x i8]* %a, i64 0, i32 4
++ %a1 = bitcast i8* %a1x to i32*
++; CHECK: store i32 0, {{.*}}, align 1
++ store i32 0, i32* %a0, align 1
++; CHECK: store i32 1, {{.*}}, align 1
++ store i32 1, i32* %a1, align 4
++; CHECK: load {{.*}}, align 1
++ %v0 = load i32, i32* %a0, align 1
++; CHECK: load {{.*}}, align 1
++ %v1 = load i32, i32* %a1, align 4
++ %cond = icmp sle i32 %v0, %v1
++ br i1 %cond, label %then, label %exit
++
++then:
++ br label %exit
++
++exit:
++; CHECK: %phi = phi i32* [ {{.*}}, %then ], [ %z, %entry ]
++; CHECK-NEXT: %result = load i32, i32* %phi, align 1
++ %phi = phi i32* [ %a1, %then ], [ %z, %entry ]
++ %result = load i32, i32* %phi, align 4
++ ret i32 %result
++}
--- /dev/null
+Index: llvm-toolchain/lib/Transforms/Vectorize/LoopVectorize.cpp
+===================================================================
+--- llvm-toolchain.orig/lib/Transforms/Vectorize/LoopVectorize.cpp
++++ llvm-toolchain/lib/Transforms/Vectorize/LoopVectorize.cpp
+@@ -5770,6 +5770,11 @@ void LoopVectorizationCostModel::collect
+ for (auto OV : I->operand_values()) {
+ if (isOutOfScope(OV))
+ continue;
++ // First order recurrence Phi's should typically be considered
++ // non-uniform.
++ auto *OP = dyn_cast<PHINode>(OV);
++ if (OP && Legal->isFirstOrderRecurrence(OP))
++ continue;
+ auto *OI = cast<Instruction>(OV);
+ if (llvm::all_of(OI->users(), [&](User *U) -> bool {
+ auto *J = cast<Instruction>(U);
+Index: llvm-toolchain/test/Transforms/LoopVectorize/X86/uniform-phi.ll
+===================================================================
+--- llvm-toolchain.orig/test/Transforms/LoopVectorize/X86/uniform-phi.ll
++++ llvm-toolchain/test/Transforms/LoopVectorize/X86/uniform-phi.ll
+@@ -75,3 +75,25 @@ for.end:
+ ret i64 %retval
+ }
+
++; CHECK-LABEL: PR38786
++; Check that first order recurrence phis (%phi32 and %phi64) are not uniform.
++; CHECK-NOT: LV: Found uniform instruction: %phi
++define void @PR38786(double* %y, double* %x, i64 %n) {
++entry:
++ br label %for.body
++
++for.body:
++ %phi32 = phi i32 [ 0, %entry ], [ %i32next, %for.body ]
++ %phi64 = phi i64 [ 0, %entry ], [ %i64next, %for.body ]
++ %i32next = add i32 %phi32, 1
++ %i64next = zext i32 %i32next to i64
++ %xip = getelementptr inbounds double, double* %x, i64 %i64next
++ %yip = getelementptr inbounds double, double* %y, i64 %phi64
++ %xi = load double, double* %xip, align 8
++ store double %xi, double* %yip, align 8
++ %cmp = icmp slt i64 %i64next, %n
++ br i1 %cmp, label %for.body, label %for.end
++
++for.end:
++ ret void
++}
--- /dev/null
+[hurd] Make getMainExecutable get the real binary path
+
+On GNU/Hurd, llvm-config is returning bogus value, such as:
+
+$ llvm-config-6.0 --includedir
+/usr/include
+
+while it should be:
+$ llvm-config-6.0 --includedir
+/usr/lib/llvm-6.0/include
+
+This is because getMainExecutable does not get the actual installation
+path. On GNU/Hurd, /proc/self/exe is indeed a symlink to the path that
+was used to start the program, and not the eventual binary file. Llvm's
+getMainExecutable thus needs to run realpath over it to get the actual
+place where llvm was installed (/usr/lib/llvm-6.0/bin/llvm-config), and
+not /usr/bin/llvm-config-6.0. This will not change the result on Linux,
+where /proc/self/exe already points to the eventual file.
+
+Patch by Samuel Thibault!
+
+While making changes here, I reformatted this block a bit to reduce
+indentation and match 2 space indent style.
+
+Differential Revision: https://reviews.llvm.org/D53557
+
+Index: llvm-toolchain-6.0-6.0.1/lib/Support/Unix/Path.inc
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/Support/Unix/Path.inc
++++ llvm-toolchain-6.0-6.0.1/lib/Support/Unix/Path.inc
+@@ -191,14 +191,34 @@ std::string getMainExecutable(const char
+ char exe_path[MAXPATHLEN];
+ StringRef aPath("/proc/self/exe");
+ if (sys::fs::exists(aPath)) {
+- // /proc is not always mounted under Linux (chroot for example).
+- ssize_t len = readlink(aPath.str().c_str(), exe_path, sizeof(exe_path));
+- if (len >= 0)
+- return std::string(exe_path, len);
++ // /proc is not always mounted under Linux (chroot for example).
++ ssize_t len = readlink(aPath.str().c_str(), exe_path, sizeof(exe_path));
++ if (len < 0)
++ return "";
++
++ // Null terminate the string for realpath. readlink never null
++ // terminates its output.
++ len = std::min(len, ssize_t(sizeof(exe_path) - 1));
++ exe_path[len] = '\0';
++
++ // At least on GNU/Hurd, /proc/self/exe is a symlink to the path that
++ // was used to start the program, and not the eventual binary file.
++ // We thus needs to run realpath over it to get the actual place
++ // where llvm was installed.
++#if _POSIX_VERSION >= 200112 || defined(__GLIBC__)
++ char *real_path = realpath(exe_path, NULL);
++ std::string ret = std::string(real_path);
++ free(real_path);
++ return ret;
++#else
++ char real_path[MAXPATHLEN];
++ realpath(exe_path, real_path);
++ return std::string(real_path);
++#endif
+ } else {
+- // Fall back to the classical detection.
+- if (getprogpath(exe_path, argv0))
+- return exe_path;
++ // Fall back to the classical detection.
++ if (getprogpath(exe_path, argv0))
++ return exe_path;
+ }
+ #elif defined(HAVE_DLFCN_H) && defined(HAVE_DLADDR)
+ // Use dladdr to get executable path if available.
--- /dev/null
+Index: llvm-toolchain-6.0-6.0.1/CodeGen/PowerPC/addrspacecast.ll
+===================================================================
+--- /dev/null
++++ llvm-toolchain-6.0-6.0.1/CodeGen/PowerPC/addrspacecast.ll
+@@ -0,0 +1,22 @@
++; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu %s -o - | FileCheck %s
++
++; Check that codegen for an addrspace cast succeeds without error.
++define <4 x i32 addrspace(1)*> @f (<4 x i32*> %x) {
++ %1 = addrspacecast <4 x i32*> %x to <4 x i32 addrspace(1)*>
++ ret <4 x i32 addrspace(1)*> %1
++ ; CHECK-LABEL: @f
++}
++
++; Check that fairly complicated addrspace cast and operations succeed without error.
++%struct = type opaque
++define void @g (%struct addrspace(10)** %x) {
++ %1 = load %struct addrspace(10)*, %struct addrspace(10)** %x
++ %2 = addrspacecast %struct addrspace(10)* %1 to %struct addrspace(11)*
++ %3 = bitcast %struct addrspace(11)* %2 to i8 addrspace(11)*
++ %4 = getelementptr i8, i8 addrspace(11)* %3, i64 16
++ %5 = bitcast i8 addrspace(11)* %4 to %struct addrspace(10)* addrspace(11)*
++ %6 = load %struct addrspace(10)*, %struct addrspace(10)* addrspace(11)* %5
++ store %struct addrspace(10)* %6, %struct addrspace(10)** undef
++ ret void
++ ; CHECK-LABEL: @g
++}
+Index: llvm-toolchain-6.0-6.0.1/lib/Target/PowerPC/PPCISelLowering.h
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/Target/PowerPC/PPCISelLowering.h
++++ llvm-toolchain-6.0-6.0.1/lib/Target/PowerPC/PPCISelLowering.h
+@@ -884,6 +884,11 @@ namespace llvm {
+ }
+ };
+
++ bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override {
++ // Addrspacecasts are always noops.
++ return true;
++ }
++
+ bool canReuseLoadAddress(SDValue Op, EVT MemVT, ReuseLoadInfo &RLI,
+ SelectionDAG &DAG,
+ ISD::LoadExtType ET = ISD::NON_EXTLOAD) const;
--- /dev/null
+---
+ clang/lib/Basic/Targets.cpp | 14 ++++++++++++++
+ clang/test/CodeGen/linux-arm-atomic.c | 10 ++++++++++
+ 2 files changed, 24 insertions(+)
+
+Index: llvm-toolchain-snapshot_6.0~svn309319/clang/test/CodeGen/linux-arm-atomic.c
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn309319.orig/clang/test/CodeGen/linux-arm-atomic.c
++++ llvm-toolchain-snapshot_6.0~svn309319/clang/test/CodeGen/linux-arm-atomic.c
+@@ -1,5 +1,15 @@
+ // RUN: %clang_cc1 %s -emit-llvm -o - -triple=armv7-unknown-linux | FileCheck %s
+ // RUN: %clang_cc1 %s -emit-llvm -o - -triple=armv6-unknown-linux | FileCheck %s
++
++typedef int _Atomic_word;
++_Atomic_word exchange_and_add(volatile _Atomic_word *__mem, int __val) {
++ return __atomic_fetch_add(__mem, __val, __ATOMIC_ACQ_REL);
++}
++
++// CHECK: define {{.*}} @exchange_and_add
++// CHECK: atomicrmw {{.*}} add
++// RUN: %clang_cc1 %s -emit-llvm -o - -triple=armv7-unknown-linux | FileCheck %s
++// RUN: %clang_cc1 %s -emit-llvm -o - -triple=armv6-unknown-linux | FileCheck %s
+ // RUN: %clang_cc1 %s -emit-llvm -o - -triple=thumbv7-unknown-linux | FileCheck %s
+ // RUN: %clang_cc1 %s -emit-llvm -o - -triple=armv6-unknown-freebsd | FileCheck %s
+
--- /dev/null
+# Force the version of clang in the analyzer
+# This was causing the static analyzer to fail silently if the clang & clang++ are
+# not installed
+Index: llvm-toolchain-snapshot_6.0~svn256.06/clang/tools/scan-build/libexec/ccc-analyzer
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn256.06.orig/clang/tools/scan-build/libexec/ccc-analyzer
++++ llvm-toolchain-snapshot_6.0~svn256.06/clang/tools/scan-build/libexec/ccc-analyzer
+@@ -91,7 +91,7 @@ if ($FindBin::Script =~ /c\+\+-analyzer/
+ if (!defined $Compiler || (! -x $Compiler && ! SearchInPath($Compiler))) { $Compiler = $DefaultCXXCompiler; }
+
+ $Clang = $ENV{'CLANG_CXX'};
+- if (!defined $Clang || ! -x $Clang) { $Clang = 'clang++'; }
++ if (!defined $Clang || ! -x $Clang) { $Clang = 'clang++-6.0'; }
+
+ $IsCXX = 1
+ }
+@@ -100,7 +100,7 @@ else {
+ if (!defined $Compiler || (! -x $Compiler && ! SearchInPath($Compiler))) { $Compiler = $DefaultCCompiler; }
+
+ $Clang = $ENV{'CLANG'};
+- if (!defined $Clang || ! -x $Clang) { $Clang = 'clang'; }
++ if (!defined $Clang || ! -x $Clang) { $Clang = 'clang-6.0'; }
+
+ $IsCXX = 0
+ }
--- /dev/null
+--- llvm-toolchain-6.0-6.0.1.orig/include/llvm/Support/ARMTargetParser.def
++++ llvm-toolchain-6.0-6.0.1/include/llvm/Support/ARMTargetParser.def
+@@ -75,7 +75,7 @@ ARM_ARCH("armv6kz", ARMV6KZ, "6KZ", "v6k
+ ARM_ARCH("armv6-m", ARMV6M, "6-M", "v6m", ARMBuildAttrs::CPUArch::v6_M,
+ FK_NONE, ARM::AEK_NONE)
+ ARM_ARCH("armv7-a", ARMV7A, "7-A", "v7", ARMBuildAttrs::CPUArch::v7,
+- FK_NEON, ARM::AEK_DSP)
++ FK_VFPV3_D16, ARM::AEK_DSP)
+ ARM_ARCH("armv7ve", ARMV7VE, "7VE", "v7ve", ARMBuildAttrs::CPUArch::v7,
+ FK_NEON, (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT |
+ ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP))
+--- llvm-toolchain-6.0-6.0.1.orig/lib/Target/ARM/ARM.td
++++ llvm-toolchain-6.0-6.0.1/lib/Target/ARM/ARM.td
+@@ -530,7 +530,8 @@ def ARMv6sm : Architecture<"armv6s-m",
+ FeatureMClass]>;
+
+ def ARMv7a : Architecture<"armv7-a", "ARMv7a", [HasV7Ops,
+- FeatureNEON,
++ FeatureVFP3,
++ FeatureD16,
+ FeatureDB,
+ FeatureDSP,
+ FeatureAClass]>;
--- /dev/null
+libcxx atomic tests for old i386 fail with wrong Atomic inline width.
+cmpxchg8b instruction is required for 8 byte atomics that clang was
+assuming.
+
+Too bad _GCC_ATOMIC_LLONG_LOCK_FREE 2 isn't supported even with this change
+because llvm doesn't support unaligned atomic compare and exchange operation.
+Fallback calls to libatomic.so should handle long long lock free but clang
+can't tell program if libatomic is always lock free.
+
+Related bug: https://llvm.org/bugs/show_bug.cgi?id=19355
+
+Index: llvm-toolchain-snapshot_6.0~svn309319/clang/lib/Basic/Targets/X86.cpp
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn309319.orig/clang/lib/Basic/Targets/X86.cpp
++++ llvm-toolchain-snapshot_6.0~svn309319/clang/lib/Basic/Targets/X86.cpp
+@@ -1133,7 +1133,7 @@ void X86TargetInfo::getTargetDefines(con
+ Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
+ Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
+ }
+- if (CPU >= CK_i586)
++ if (isCmpXChg8Supported())
+ Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
+
+ if (HasFloat128)
+Index: llvm-toolchain-snapshot_6.0~svn309319/clang/lib/Basic/Targets/X86.h
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn309319.orig/clang/lib/Basic/Targets/X86.h
++++ llvm-toolchain-snapshot_6.0~svn309319/clang/lib/Basic/Targets/X86.h
+@@ -281,6 +281,8 @@ class LLVM_LIBRARY_VISIBILITY X86TargetI
+ // acceptable.
+ // FIXME: This results in terrible diagnostics. Clang just says the CPU is
+ // invalid without explaining *why*.
++ if (!isCmpXChg8Supported())
++ MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
+ switch (Kind) {
+ case CK_Generic:
+ // No processor selected!
+@@ -548,8 +550,6 @@ public:
+ (1 << TargetInfo::LongDouble));
+
+ // x86-32 has atomics up to 8 bytes
+- // FIXME: Check that we actually have cmpxchg8b before setting
+- // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.)
+ MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
+ }
+
--- /dev/null
+---
+ clang/tools/clang-format/clang-format-diff.py | 2 +-
+ clang/tools/clang-format/clang-format.el | 2 +-
+ clang/tools/clang-format/clang-format.py | 2 +-
+ 3 files changed, 3 insertions(+), 3 deletions(-)
+
+--- a/clang/tools/clang-format/clang-format-diff.py
++++ b/clang/tools/clang-format/clang-format-diff.py
+@@ -55,7 +55,7 @@ def main():
+ parser.add_argument('-style',
+ help='formatting style to apply (LLVM, Google, Chromium, '
+ 'Mozilla, WebKit)')
+- parser.add_argument('-binary', default='clang-format',
++ parser.add_argument('-binary', default='clang-format-6.0',
+ help='location of binary to use for clang-format')
+ args = parser.parse_args()
+
+--- a/clang/tools/clang-format/clang-format.el
++++ b/clang/tools/clang-format/clang-format.el
+@@ -36,7 +36,7 @@
+ :group 'tools)
+
+ (defcustom clang-format-executable
+- (or (executable-find "clang-format")
++ (or (executable-find "clang-format-6.0")
+ "clang-format")
+ "Location of the clang-format executable.
+
+--- a/clang/tools/clang-format/clang-format.py
++++ b/clang/tools/clang-format/clang-format.py
+@@ -35,7 +35,7 @@ import vim
+
+ # set g:clang_format_path to the path to clang-format if it is not on the path
+ # Change this to the full path if clang-format is not on the path.
+-binary = 'clang-format'
++binary = 'clang-format-6.0'
+ if vim.eval('exists("g:clang_format_path")') == "1":
+ binary = vim.eval('g:clang_format_path')
+
--- /dev/null
+Index: llvm-toolchain-snapshot_6.0~svn309541/clang-tools-extra/clang-tidy/tool/run-clang-tidy.py
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn309541.orig/clang-tools-extra/clang-tidy/tool/run-clang-tidy.py
++++ llvm-toolchain-snapshot_6.0~svn309541/clang-tools-extra/clang-tidy/tool/run-clang-tidy.py
+@@ -157,10 +157,10 @@ def main():
+ 'clang-tidy and clang-apply-replacements in '
+ '$PATH.')
+ parser.add_argument('-clang-tidy-binary', metavar='PATH',
+- default='clang-tidy',
++ default='clang-tidy-6.0',
+ help='path to clang-tidy binary')
+ parser.add_argument('-clang-apply-replacements-binary', metavar='PATH',
+- default='clang-apply-replacements',
++ default='clang-apply-replacements-6.0',
+ help='path to clang-apply-replacements binary')
+ parser.add_argument('-checks', default=None,
+ help='checks filter, when not specified, use clang-tidy '
--- /dev/null
+---
+ lib/Support/Unix/Memory.inc | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/lib/Support/Unix/Memory.inc
++++ b/lib/Support/Unix/Memory.inc
+@@ -319,7 +319,7 @@ void Memory::InvalidateInstructionCache(
+ // FIXME: Can we safely always call this for __GNUC__ everywhere?
+ const char *Start = static_cast<const char *>(Addr);
+ const char *End = Start + Len;
+- __clear_cache(const_cast<char *>(Start), const_cast<char *>(End));
++ __builtin___clear_cache(const_cast<char *>(Start), const_cast<char *>(End));
+ # endif
+
+ #endif // end apple
--- /dev/null
+Index: llvm-toolchain-snapshot_4.0~svn280802/lldb/third_party/Python/module/unittest2/unittest2/runner.py
+===================================================================
+--- llvm-toolchain-snapshot_4.0~svn280802.orig/lldb/third_party/Python/module/unittest2/unittest2/runner.py
++++ llvm-toolchain-snapshot_4.0~svn280802/lldb/third_party/Python/module/unittest2/unittest2/runner.py
+@@ -174,9 +174,9 @@ class TextTestRunner(unittest.TextTestRu
+ if hasattr(result, 'separator2'):
+ self.stream.writeln(result.separator2)
+ run = result.testsRun
+- self.stream.writeln("Ran %d test%s in %.3fs" %
+- (run, run != 1 and "s" or "", timeTaken))
+- self.stream.writeln()
++# self.stream.writeln("Ran %d test%s in %.3fs" %
++# (run, run != 1 and "s" or "", timeTaken))
++# self.stream.writeln()
+
+ expectedFails = unexpectedSuccesses = skipped = passed = failed = errored = 0
+ try:
--- /dev/null
+Index: llvm-toolchain-snapshot_5.0~svn300419/compiler-rt/lib/xray/xray_tsc.h
+===================================================================
+--- llvm-toolchain-snapshot_5.0~svn300419.orig/compiler-rt/lib/xray/xray_tsc.h
++++ llvm-toolchain-snapshot_5.0~svn300419/compiler-rt/lib/xray/xray_tsc.h
+@@ -61,8 +61,6 @@ inline uint64_t getTSCFrequency() XRAY_N
+
+ } // namespace __xray
+
+-#else
+-#error Target architecture is not supported.
+ #endif // CPU architecture
+
+ #endif // XRAY_EMULATE_TSC_H
--- /dev/null
+Description: Silent a test failing on yakkety amd64
+ /tmp/buildd/llvm-toolchain-snapshot-4.0~svn279801/test/tools/llvm-symbolizer/print_context.c:16:11: error: expected string not found in input
+ // CHECK: inc
+ ^
+ <stdin>:1:1: note: scanning from here
+ _fini
+ ^
+ <stdin>:1:3: note: possible intended match here
+ _fini
+ ^
+Author: Sylvestre <sylvestre@debian.org>
+Last-Update: 2016-08-26
+
+Index: llvm-toolchain-snapshot_6.0~svn311429/test/tools/llvm-symbolizer/print_context.c
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn311429.orig/test/tools/llvm-symbolizer/print_context.c
++++ llvm-toolchain-snapshot_6.0~svn311429/test/tools/llvm-symbolizer/print_context.c
+@@ -14,6 +14,7 @@ int main() {
+ // RUN: cp %p/Inputs/print_context.o %t
+ // RUN: cd %t
+ // RUN: echo "%t/print_context.o 0x0" | llvm-symbolizer -print-source-context-lines=5 | FileCheck %s
++// XFAIL: *
+
+ // Inputs/print_context.o built with plain -g -c from this source file
+ // Specifying -Xclang -fdebug-compilation-dir -Xclang . to make the debug info
--- /dev/null
+Index: llvm-toolchain-snapshot_6.0~svn309541/unittests/Support/Path.cpp
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn309541.orig/unittests/Support/Path.cpp
++++ llvm-toolchain-snapshot_6.0~svn309541/unittests/Support/Path.cpp
+@@ -473,7 +473,7 @@ protected:
+ errs().flush();
+ }
+
+- void TearDown() override { ASSERT_NO_ERROR(fs::remove(TestDirectory.str())); }
++// void TearDown() override { ASSERT_NO_ERROR(fs::remove(TestDirectory.str())); }
+ };
+
+ TEST_F(FileSystemTest, Unique) {
+@@ -553,13 +553,13 @@ TEST_F(FileSystemTest, RealPath) {
+
+ SmallString<64> HomeDir;
+ bool Result = llvm::sys::path::home_directory(HomeDir);
+- if (Result) {
++/* if (Result) {
+ ASSERT_NO_ERROR(fs::real_path(HomeDir, Expected));
+ ASSERT_NO_ERROR(fs::real_path("~", Actual, true));
+ EXPECT_EQ(Expected, Actual);
+ ASSERT_NO_ERROR(fs::real_path("~/", Actual, true));
+ EXPECT_EQ(Expected, Actual);
+- }
++ }*/
+
+ ASSERT_NO_ERROR(fs::remove_directories(Twine(TestDirectory) + "/test1"));
+ }
--- /dev/null
+Index: llvm-toolchain-snapshot_4.0~svn290969/test/tools/llvm-objdump/X86/source-interleave-x86_64.ll
+===================================================================
+--- llvm-toolchain-snapshot_4.0~svn290969.orig/test/tools/llvm-objdump/X86/source-interleave-x86_64.ll
++++ llvm-toolchain-snapshot_4.0~svn290969/test/tools/llvm-objdump/X86/source-interleave-x86_64.ll
+@@ -4,6 +4,7 @@
+ ; RUN: llvm-objdump -d -l %t.o | FileCheck --check-prefix="LINES" %t.ll
+ ; RUN: llvm-objdump -d -S %t.o | FileCheck --check-prefix="SOURCE" %t.ll
+ ; ModuleID = 'source-interleave-x86_64.bc'
++; XFAIL: *
+ source_filename = "source-interleave-x86_64.c"
+ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+ target triple = "x86_64-unknown-linux-gnu"
--- /dev/null
+Index: llvm-toolchain-6.0-6.0.1/clang/lib/Basic/Targets/X86.cpp
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/clang/lib/Basic/Targets/X86.cpp
++++ llvm-toolchain-6.0-6.0.1/clang/lib/Basic/Targets/X86.cpp
+@@ -207,7 +207,6 @@ bool X86TargetInfo::initFeatureMap(
+ setFeatureEnabledImpl(Features, "cx16", true);
+ LLVM_FALLTHROUGH;
+ case CK_PentiumM:
+- case CK_Pentium4:
+ case CK_x86_64:
+ setFeatureEnabledImpl(Features, "sse2", true);
+ LLVM_FALLTHROUGH;
--- /dev/null
+Index: llvm-toolchain-snapshot_3.9~svn268880/utils/lit/lit/Test.py
+===================================================================
+--- llvm-toolchain-snapshot_3.9~svn268880.orig/utils/lit/lit/Test.py
++++ llvm-toolchain-snapshot_3.9~svn268880/utils/lit/lit/Test.py
+@@ -30,7 +30,7 @@ PASS = ResultCode('PASS', False)
+ FLAKYPASS = ResultCode('FLAKYPASS', False)
+ XFAIL = ResultCode('XFAIL', False)
+ FAIL = ResultCode('FAIL', True)
+-XPASS = ResultCode('XPASS', True)
++XPASS = ResultCode('XPASS', False)
+ UNRESOLVED = ResultCode('UNRESOLVED', True)
+ UNSUPPORTED = ResultCode('UNSUPPORTED', False)
+ TIMEOUT = ResultCode('TIMEOUT', True)
--- /dev/null
+---
+ clang/lib/Driver/ToolChains.cpp | 2 ++
+ 1 file changed, 2 insertions(+)
+
+Index: llvm-toolchain-5.0-5.0~+rc2/clang/lib/Driver/ToolChains/Gnu.cpp
+===================================================================
+--- llvm-toolchain-5.0-5.0~+rc2.orig/clang/lib/Driver/ToolChains/Gnu.cpp
++++ llvm-toolchain-5.0-5.0~+rc2/clang/lib/Driver/ToolChains/Gnu.cpp
+@@ -15,6 +15,7 @@
+ #include "Arch/SystemZ.h"
+ #include "CommonArgs.h"
+ #include "clang/Basic/VirtualFileSystem.h"
++#include "clang/Basic/Version.h"
+ #include "clang/Config/config.h" // for GCC_INSTALL_PREFIX
+ #include "clang/Driver/Compilation.h"
+ #include "clang/Driver/Driver.h"
+@@ -2368,6 +2369,7 @@ void Generic_GCC::AddClangCXXStdlibInclu
+ addLibStdCxxIncludePaths(DriverArgs, CC1Args);
+ break;
+ }
++ addSystemInclude(DriverArgs, CC1Args, "/usr/include/clang/" + std::string(CLANG_VERSION_STRING) + "/include/");
+ }
+
+ std::string Generic_GCC::findLibCxxIncludePath() const {
--- /dev/null
+---
+ tools/llvm-config/llvm-config.cpp | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+Index: llvm-toolchain-snapshot_5.0~svn298810/tools/llvm-config/llvm-config.cpp
+===================================================================
+--- llvm-toolchain-snapshot_5.0~svn298810.orig/tools/llvm-config/llvm-config.cpp
++++ llvm-toolchain-snapshot_5.0~svn298810/tools/llvm-config/llvm-config.cpp
+@@ -555,9 +555,9 @@ int main(int argc, char **argv) {
+ } else if (Arg == "--shared-mode") {
+ PrintSharedMode = true;
+ } else if (Arg == "--obj-root") {
+- OS << ActivePrefix << '\n';
++ OS << ActivePrefix << "/build/" << '\n';
+ } else if (Arg == "--src-root") {
+- OS << LLVM_SRC_ROOT << '\n';
++ OS << ActivePrefix << "/build/" << '\n';
+ } else if (Arg == "--ignore-libllvm") {
+ LinkDyLib = false;
+ LinkMode = BuiltSharedLibs ? LinkModeShared : LinkModeAuto;
--- /dev/null
+Index: llvm-toolchain-3.9-3.9/clang/tools/scan-view/bin/scan-view
+===================================================================
+--- llvm-toolchain-3.9-3.9.orig/clang/tools/scan-view/bin/scan-view
++++ llvm-toolchain-3.9-3.9/clang/tools/scan-view/bin/scan-view
+@@ -23,6 +23,7 @@ kDefaultPort = 8181
+ kMaxPortsToTry = 100
+
+ ###
++BASE_DIR = '/usr/share/clang/scan-view-6.0'
+
+
+ def url_is_up(url):
+@@ -61,7 +62,7 @@ def start_browser(port, options):
+
+ def run(port, options, root):
+ # Prefer to look relative to the installed binary
+- share = os.path.dirname(__file__) + "/../share/"
++ share = os.path.join(BASE_DIR, 'share')
+ if not os.path.isdir(share):
+ # Otherwise look relative to the source
+ share = os.path.dirname(__file__) + "/../../scan-view/share"
--- /dev/null
+Index: llvm-toolchain-5.0-5.0.2~+rc1/clang/lib/Driver/ToolChains/Linux.cpp
+===================================================================
+--- llvm-toolchain-5.0-5.0.2~+rc1.orig/clang/lib/Driver/ToolChains/Linux.cpp
++++ llvm-toolchain-5.0-5.0.2~+rc1/clang/lib/Driver/ToolChains/Linux.cpp
+@@ -571,6 +571,11 @@ void Linux::AddClangSystemIncludeArgs(co
+ return;
+ }
+
++ // Force the inclusion of the gcc headers (objc/objc.h)
++ addExternCSystemIncludeIfExists(
++ DriverArgs, CC1Args, GCCInstallation.getInstallPath() + "/include");
++// std::cout << GCCInstallation.getInstallPath().str() << "/include" << std::endl;
++
+ // Lacking those, try to detect the correct set of system includes for the
+ // target triple.
+
--- /dev/null
+Index: llvm-toolchain-snapshot_3.9~svn268880/utils/TableGen/CodeEmitterGen.cpp
+===================================================================
+--- llvm-toolchain-snapshot_3.9~svn268880.orig/utils/TableGen/CodeEmitterGen.cpp
++++ llvm-toolchain-snapshot_3.9~svn268880/utils/TableGen/CodeEmitterGen.cpp
+@@ -229,6 +229,9 @@ void CodeEmitterGen::run(raw_ostream &o)
+ ArrayRef<const CodeGenInstruction*> NumberedInstructions =
+ Target.getInstructionsByEnumValue();
+
++ o << "// Undef for HURD\n";
++ o << "#ifdef EIEIO\n#undef EIEIO\n#endif\n";
++
+ // Emit function declaration
+ o << "uint64_t " << Target.getName();
+ o << "MCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,\n"
--- /dev/null
+Index: llvm-toolchain-6.0-6.0.1/lib/Support/Unix/Path.inc
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/Support/Unix/Path.inc
++++ llvm-toolchain-6.0-6.0.1/lib/Support/Unix/Path.inc
+@@ -98,7 +98,7 @@
+ #define STATVFS_F_FRSIZE(vfs) static_cast<uint64_t>(vfs.f_bsize)
+ #endif
+
+-#if defined(__NetBSD__)
++#if defined(__NetBSD__) || defined(__GNU__)
+ #define STATVFS_F_FLAG(vfs) (vfs).f_flag
+ #else
+ #define STATVFS_F_FLAG(vfs) (vfs).f_flags
+@@ -111,7 +111,7 @@ namespace sys {
+ namespace fs {
+ #if defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__) || \
+ defined(__minix) || defined(__FreeBSD_kernel__) || defined(__linux__) || \
+- defined(__CYGWIN__) || defined(__DragonFly__) || defined(_AIX)
++ defined(__CYGWIN__) || defined(__DragonFly__) || defined(_AIX) || defined(__GNU__)
+ static int
+ test_dir(char ret[PATH_MAX], const char *dir, const char *bin)
+ {
+@@ -187,7 +187,7 @@ std::string getMainExecutable(const char
+
+ if (getprogpath(exe_path, argv0) != NULL)
+ return exe_path;
+-#elif defined(__linux__) || defined(__CYGWIN__)
++#elif defined(__linux__) || defined(__CYGWIN__) || defined(__GNU__)
+ char exe_path[MAXPATHLEN];
+ StringRef aPath("/proc/self/exe");
+ if (sys::fs::exists(aPath)) {
+@@ -360,7 +360,7 @@ std::error_code remove(const Twine &path
+ }
+
+ static bool is_local_impl(struct STATVFS &Vfs) {
+-#if defined(__linux__)
++#if defined(__linux__) || defined(__GNU__)
+ #ifndef NFS_SUPER_MAGIC
+ #define NFS_SUPER_MAGIC 0x6969
+ #endif
+@@ -370,7 +370,11 @@ static bool is_local_impl(struct STATVFS
+ #ifndef CIFS_MAGIC_NUMBER
+ #define CIFS_MAGIC_NUMBER 0xFF534D42
+ #endif
++#ifdef __GNU__
++ switch ((uint32_t)Vfs.__f_type) {
++#else
+ switch ((uint32_t)Vfs.f_type) {
++#endif
+ case NFS_SUPER_MAGIC:
+ case SMB_SUPER_MAGIC:
+ case CIFS_MAGIC_NUMBER:
--- /dev/null
+Index: llvm-toolchain-snapshot_6.0~svn317126/clang/lib/Basic/FileManager.cpp
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn317126.orig/clang/lib/Basic/FileManager.cpp
++++ llvm-toolchain-snapshot_6.0~svn317126/clang/lib/Basic/FileManager.cpp
+@@ -501,6 +501,12 @@ void FileManager::invalidateCache(const
+ UniqueRealFiles.erase(Entry->getUniqueID());
+ }
+
++// For GNU Hurd
++#if defined(__GNU__) && !defined(PATH_MAX)
++# define PATH_MAX 4096
++#endif
++
++
+ void FileManager::GetUniqueIDMapping(
+ SmallVectorImpl<const FileEntry *> &UIDToFiles) const {
+ UIDToFiles.clear();
+Index: llvm-toolchain-snapshot_6.0~svn317126/lldb/include/lldb/lldb-defines.h
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn317126.orig/lldb/include/lldb/lldb-defines.h
++++ llvm-toolchain-snapshot_6.0~svn317126/lldb/include/lldb/lldb-defines.h
+@@ -28,6 +28,11 @@
+ #define INT32_MAX 2147483647
+ #endif
+
++// For GNU Hurd
++#if defined(__GNU__) && !defined(PATH_MAX)
++# define PATH_MAX 4096
++#endif
++
+ #if !defined(UINT32_MAX)
+ #define UINT32_MAX 4294967295U
+ #endif
+Index: llvm-toolchain-snapshot_6.0~svn317126/lib/Support/Unix/Path.inc
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn317126.orig/lib/Support/Unix/Path.inc
++++ llvm-toolchain-snapshot_6.0~svn317126/lib/Support/Unix/Path.inc
+@@ -64,6 +64,7 @@
+ // For GNU Hurd
+ #if defined(__GNU__) && !defined(PATH_MAX)
+ # define PATH_MAX 4096
++# define MAXPATHLEN 4096
+ #endif
+
+ #include <sys/types.h>
+Index: llvm-toolchain-snapshot_6.0~svn317126/tools/dsymutil/DwarfLinker.cpp
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn317126.orig/tools/dsymutil/DwarfLinker.cpp
++++ llvm-toolchain-snapshot_6.0~svn317126/tools/dsymutil/DwarfLinker.cpp
+@@ -93,6 +93,11 @@
+ #include <utility>
+ #include <vector>
+
++// For GNU Hurd
++#if defined(__GNU__) && !defined(PATH_MAX)
++# define PATH_MAX 4096
++#endif
++
+ namespace llvm {
+ namespace dsymutil {
+
+Index: llvm-toolchain-snapshot_6.0~svn317126/polly/lib/External/ppcg/cuda_common.c
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn317126.orig/polly/lib/External/ppcg/cuda_common.c
++++ llvm-toolchain-snapshot_6.0~svn317126/polly/lib/External/ppcg/cuda_common.c
+@@ -15,6 +15,11 @@
+ #include "cuda_common.h"
+ #include "ppcg.h"
+
++// For GNU Hurd
++#if defined(__GNU__) && !defined(PATH_MAX)
++# define PATH_MAX 4096
++#endif
++
+ /* Open the host .cu file and the kernel .hu and .cu files for writing.
+ * Add the necessary includes.
+ */
+Index: llvm-toolchain-6.0-6.0.1/clang/lib/Frontend/ModuleDependencyCollector.cpp
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/clang/lib/Frontend/ModuleDependencyCollector.cpp
++++ llvm-toolchain-6.0-6.0.1/clang/lib/Frontend/ModuleDependencyCollector.cpp
+@@ -97,6 +97,11 @@ struct ModuleDependencyMMCallbacks : pub
+
+ }
+
++// For GNU Hurd
++#if defined(__GNU__) && !defined(PATH_MAX)
++# define PATH_MAX 4096
++#endif
++
+ // TODO: move this to Support/Path.h and check for HAVE_REALPATH?
+ static bool real_path(StringRef SrcPath, SmallVectorImpl<char> &RealPath) {
+ #ifdef LLVM_ON_UNIX
--- /dev/null
+Index: llvm-toolchain-6.0-6.0.1/tools/llvm-shlib/CMakeLists.txt
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/tools/llvm-shlib/CMakeLists.txt
++++ llvm-toolchain-6.0-6.0.1/tools/llvm-shlib/CMakeLists.txt
+@@ -40,6 +40,7 @@ set_property(TARGET LLVM PROPERTY VERSIO
+ list(REMOVE_DUPLICATES LIB_NAMES)
+ if(("${CMAKE_SYSTEM_NAME}" STREQUAL "Linux") OR (MINGW) OR (HAIKU)
+ OR ("${CMAKE_SYSTEM_NAME}" STREQUAL "FreeBSD")
++ OR ("${CMAKE_SYSTEM_NAME}" STREQUAL "GNU")
+ OR ("${CMAKE_SYSTEM_NAME}" STREQUAL "DragonFly")
+ OR ("${CMAKE_SYSTEM_NAME}" STREQUAL "SunOS")) # FIXME: It should be "GNU ld for elf"
+ configure_file(
--- /dev/null
+---
+ clang/tools/CMakeLists.txt | 1 +
+ 1 file changed, 1 insertion(+)
+
+Index: llvm-toolchain-snapshot_6.0~svn314025/clang/tools/CMakeLists.txt
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn314025.orig/clang/tools/CMakeLists.txt
++++ llvm-toolchain-snapshot_6.0~svn314025/clang/tools/CMakeLists.txt
+@@ -23,6 +23,7 @@ if(CLANG_ENABLE_STATIC_ANALYZER)
+ add_clang_subdirectory(clang-check)
+ add_clang_subdirectory(clang-func-mapping)
+ add_clang_subdirectory(scan-build)
++ add_clang_subdirectory(scan-build-py)
+ add_clang_subdirectory(scan-view)
+ endif()
+
--- /dev/null
+diff --git a/lib/Target/NVPTX/NVPTXISelLowering.cpp b/lib/Target/NVPTX/NVPTXISelLowering.cpp
+index f1e4251a44b..73d49f5d7e4 100644
+--- a/lib/Target/NVPTX/NVPTXISelLowering.cpp
++++ b/lib/Target/NVPTX/NVPTXISelLowering.cpp
+@@ -1248,6 +1248,14 @@ SDValue NVPTXTargetLowering::getSqrtEstimate(SDValue Operand, SelectionDAG &DAG,
+ }
+ }
+
++bool NVPTXTargetLowering::isNoopAddrSpaceCast(unsigned SrcAS,
++ unsigned DestAS) const {
++ assert(SrcAS != DestAS && "Expected different address spaces!");
++
++ return (SrcAS == ADDRESS_SPACE_GENERIC || SrcAS > ADDRESS_SPACE_LOCAL) &&
++ (DestAS == ADDRESS_SPACE_GENERIC || DestAS > ADDRESS_SPACE_LOCAL);
++}
++
+ SDValue
+ NVPTXTargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const {
+ SDLoc dl(Op);
+diff --git a/lib/Target/NVPTX/NVPTXISelLowering.h b/lib/Target/NVPTX/NVPTXISelLowering.h
+index ef04a8573d4..68a9a7195c4 100644
+--- a/lib/Target/NVPTX/NVPTXISelLowering.h
++++ b/lib/Target/NVPTX/NVPTXISelLowering.h
+@@ -443,6 +443,8 @@ public:
+ const NVPTXSubtarget &STI);
+ SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
+
++ bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override;
++
+ SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
+
+ const char *getTargetNodeName(unsigned Opcode) const override;
--- /dev/null
+From f76abe65e6d07fea5e838c4f8c9a9421c16debb0 Mon Sep 17 00:00:00 2001
+From: Valentin Churavy <v.churavy@gmail.com>
+Date: Thu, 5 Jul 2018 12:37:50 -0400
+Subject: [PATCH] Fix unwind info relocation with large code model on AArch64
+
+---
+ lib/MC/MCObjectFileInfo.cpp | 2 ++
+ .../AArch64/ELF_ARM64_large-relocations.s | 20 +++++++++++++++++++
+ 2 files changed, 22 insertions(+)
+ create mode 100644 test/ExecutionEngine/RuntimeDyld/AArch64/ELF_ARM64_large-relocations.s
+
+Index: llvm-toolchain-6.0-6.0.1/lib/MC/MCObjectFileInfo.cpp
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/MC/MCObjectFileInfo.cpp
++++ llvm-toolchain-6.0-6.0.1/lib/MC/MCObjectFileInfo.cpp
+@@ -291,6 +291,8 @@ void MCObjectFileInfo::initELFMCObjectFi
+ break;
+ case Triple::ppc64:
+ case Triple::ppc64le:
++ case Triple::aarch64:
++ case Triple::aarch64_be:
+ case Triple::x86_64:
+ FDECFIEncoding = dwarf::DW_EH_PE_pcrel |
+ (Large ? dwarf::DW_EH_PE_sdata8 : dwarf::DW_EH_PE_sdata4);
--- /dev/null
+From f94d12b6108b944199b715f31f25a022f75d2feb Mon Sep 17 00:00:00 2001
+From: Yichao Yu <yyc1992@gmail.com>
+Date: Sat, 10 Jun 2017 08:45:13 -0400
+Subject: [PATCH 4/4] Enable support for floating-point division reductions
+
+Similar to fsub, fdiv can also be vectorized using fmul.
+---
+ lib/Transforms/Utils/LoopUtils.cpp | 1 +
+ test/Transforms/LoopVectorize/float-reduction.ll | 22 ++++++++++++++++++++++
+ 2 files changed, 23 insertions(+)
+
+Index: llvm-toolchain-6.0-6.0.1/lib/Transforms/Utils/LoopUtils.cpp
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/Transforms/Utils/LoopUtils.cpp
++++ llvm-toolchain-6.0-6.0.1/lib/Transforms/Utils/LoopUtils.cpp
+@@ -513,6 +513,7 @@ RecurrenceDescriptor::isRecurrenceInstr(
+ return InstDesc(Kind == RK_IntegerOr, I);
+ case Instruction::Xor:
+ return InstDesc(Kind == RK_IntegerXor, I);
++ case Instruction::FDiv:
+ case Instruction::FMul:
+ return InstDesc(Kind == RK_FloatMult, I, UAI);
+ case Instruction::FSub:
+Index: llvm-toolchain-6.0-6.0.1/test/Transforms/LoopVectorize/float-reduction.ll
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/test/Transforms/LoopVectorize/float-reduction.ll
++++ llvm-toolchain-6.0-6.0.1/test/Transforms/LoopVectorize/float-reduction.ll
+@@ -44,3 +44,25 @@ for.body:
+ for.end: ; preds = %for.body
+ ret float %sub
+ }
++
++;CHECK-LABEL: @foodiv(
++;CHECK: fdiv fast <4 x float>
++;CHECK: ret
++define float @foodiv(float* nocapture %A, i32* nocapture %n) nounwind uwtable readonly ssp {
++entry:
++ br label %for.body
++
++for.body: ; preds = %for.body, %entry
++ %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
++ %sum.04 = phi float [ 1.000000e+00, %entry ], [ %sub, %for.body ]
++ %arrayidx = getelementptr inbounds float, float* %A, i64 %indvars.iv
++ %0 = load float, float* %arrayidx, align 4
++ %sub = fdiv fast float %sum.04, %0
++ %indvars.iv.next = add i64 %indvars.iv, 1
++ %lftr.wideiv = trunc i64 %indvars.iv.next to i32
++ %exitcond = icmp eq i32 %lftr.wideiv, 200
++ br i1 %exitcond, label %for.end, label %for.body
++
++for.end: ; preds = %for.body
++ ret float %sub
++}
--- /dev/null
+commit 6a311a7a804831fea43cfb2f61322adcb407a1af
+Author: Keno Fischer <keno@juliacomputing.com>
+Date: Thu Jan 18 15:57:05 2018 -0500
+
+ [JumpThreading] Don't restrict cast-traversal to i1
+
+ Summary:
+ In D17663, JumpThreading learned to look trough simple cast instructions,
+ but only if the source of those cast instructions was a phi/cmp i1
+ (in an effort to limit compile time effects). I think this condition
+ is too restrictive. For switches with limited value range, InstCombine
+ will readily introduce an extra `trunc` instruction to a smaller
+ integer type (e.g. from i8 to i2), leaving us in the somewhat perverse
+ situation that jump-threading would work before running instcombine,
+ but not after. Since instcombine produces this pattern, I think we
+ need to consider it canonical and support it in JumpThreading.
+ In general, for limiting recursion, I think the existing restriction
+ to phi and cmp nodes should be sufficient to avoid looking through
+ unprofitable chains of instructions.
+
+ Reviewers: haicheng, gberry, bmakam, mcrosier
+
+ Subscribers: llvm-commits
+
+ Differential Revision: https://reviews.llvm.org/D42262
+
+Index: llvm-toolchain-6.0-6.0.1/lib/Transforms/Scalar/JumpThreading.cpp
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/Transforms/Scalar/JumpThreading.cpp
++++ llvm-toolchain-6.0-6.0.1/lib/Transforms/Scalar/JumpThreading.cpp
+@@ -656,11 +656,9 @@ bool JumpThreadingPass::ComputeValueKnow
+ }
+
+ // Handle Cast instructions. Only see through Cast when the source operand is
+- // PHI or Cmp and the source type is i1 to save the compilation time.
++ // PHI or Cmp to save the compilation time.
+ if (CastInst *CI = dyn_cast<CastInst>(I)) {
+ Value *Source = CI->getOperand(0);
+- if (!Source->getType()->isIntegerTy(1))
+- return false;
+ if (!isa<PHINode>(Source) && !isa<CmpInst>(Source))
+ return false;
+ ComputeValueKnownInPredecessors(Source, BB, Result, Preference, CxtI);
+Index: llvm-toolchain-6.0-6.0.1/test/Transforms/JumpThreading/basic.ll
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/test/Transforms/JumpThreading/basic.ll
++++ llvm-toolchain-6.0-6.0.1/test/Transforms/JumpThreading/basic.ll
+@@ -547,6 +547,34 @@ l5:
+ ; CHECK: }
+ }
+
++define i1 @trunc_switch(i1 %arg) {
++; CHECK-LABEL: @trunc_switch
++top:
++; CHECK: br i1 %arg, label %exitA, label %exitB
++ br i1 %arg, label %common, label %B
++
++B:
++ br label %common
++
++common:
++ %phi = phi i8 [ 2, %B ], [ 1, %top ]
++ %trunc = trunc i8 %phi to i2
++; CHECK-NOT: switch
++ switch i2 %trunc, label %unreach [
++ i2 1, label %exitA
++ i2 -2, label %exitB
++ ]
++
++unreach:
++ unreachable
++
++exitA:
++ ret i1 true
++
++exitB:
++ ret i1 false
++}
++
+ ; CHECK-LABEL: define void @h_con(i32 %p) {
+ define void @h_con(i32 %p) {
+ %x = icmp ult i32 %p, 5
--- /dev/null
+From 45bc0f0badbdbabaed7d204757c2aad7ab49a3fe Mon Sep 17 00:00:00 2001
+From: DokFaust <rodia@autistici.org>
+Date: Mon, 11 Jun 2018 12:59:42 +0200
+Subject: [PATCH] PerfJITEventListener integration, requires compile flag
+ LLVM_USE_PERF
+
+---
+ CMakeLists.txt | 13 +
+ include/llvm/Config/config.h.cmake | 3 +
+ include/llvm/Config/llvm-config.h.cmake | 3 +
+ .../llvm/ExecutionEngine/JITEventListener.h | 9 +
+ lib/ExecutionEngine/CMakeLists.txt | 4 +
+ lib/ExecutionEngine/LLVMBuild.txt | 2 +-
+ lib/ExecutionEngine/Orc/LLVMBuild.txt | 2 +-
+ .../PerfJITEvents/CMakeLists.txt | 5 +
+ .../PerfJITEvents/LLVMBuild.txt | 23 +
+ .../PerfJITEvents/PerfJITEventListener.cpp | 492 ++++++++++++++++++
+ 10 files changed, 554 insertions(+), 2 deletions(-)
+ create mode 100644 lib/ExecutionEngine/PerfJITEvents/CMakeLists.txt
+ create mode 100644 lib/ExecutionEngine/PerfJITEvents/LLVMBuild.txt
+ create mode 100644 lib/ExecutionEngine/PerfJITEvents/PerfJITEventListener.cpp
+
+diff --git a/CMakeLists.txt b/CMakeLists.txt
+index f8da6cf9211..fb92c825a46 100644
+--- a/CMakeLists.txt
++++ b/CMakeLists.txt
+@@ -426,6 +426,16 @@ if( LLVM_USE_OPROFILE )
+ endif( NOT CMAKE_SYSTEM_NAME MATCHES "Linux" )
+ endif( LLVM_USE_OPROFILE )
+
++option(LLVM_USE_PERF
++ "Use perf JIT interface to inform perf about JIT code" OFF)
++
++# If enabled, verify we are on a platform that supports perf.
++if( LLVM_USE_PERF )
++ if( NOT CMAKE_SYSTEM_NAME MATCHES "Linux" )
++ message(FATAL_ERROR "perf support is available on Linux only.")
++ endif( NOT CMAKE_SYSTEM_NAME MATCHES "Linux" )
++endif( LLVM_USE_PERF )
++
+ set(LLVM_USE_SANITIZER "" CACHE STRING
+ "Define the sanitizer used to build binaries and tests.")
+ set(LLVM_LIB_FUZZING_ENGINE "" CACHE PATH
+@@ -634,6 +644,9 @@ endif (LLVM_USE_INTEL_JITEVENTS)
+ if (LLVM_USE_OPROFILE)
+ set(LLVMOPTIONALCOMPONENTS ${LLVMOPTIONALCOMPONENTS} OProfileJIT)
+ endif (LLVM_USE_OPROFILE)
++if (LLVM_USE_PERF)
++ set(LLVMOPTIONALCOMPONENTS ${LLVMOPTIONALCOMPONENTS} PerfJITEvents)
++endif (LLVM_USE_PERF)
+
+ message(STATUS "Constructing LLVMBuild project information")
+ execute_process(
+diff --git a/include/llvm/Config/config.h.cmake b/include/llvm/Config/config.h.cmake
+index 940f8420304..17787ed779b 100644
+--- a/include/llvm/Config/config.h.cmake
++++ b/include/llvm/Config/config.h.cmake
+@@ -377,6 +377,9 @@
+ /* Define if we have the oprofile JIT-support library */
+ #cmakedefine01 LLVM_USE_OPROFILE
+
++/* Define if we have the perf JIT-support library */
++#cmakedefine01 LLVM_USE_PERF
++
+ /* LLVM version information */
+ #cmakedefine LLVM_VERSION_INFO "${LLVM_VERSION_INFO}"
+
+diff --git a/include/llvm/Config/llvm-config.h.cmake b/include/llvm/Config/llvm-config.h.cmake
+index 4daa00f3bc4..8d9c3b24d52 100644
+--- a/include/llvm/Config/llvm-config.h.cmake
++++ b/include/llvm/Config/llvm-config.h.cmake
+@@ -65,6 +65,9 @@
+ /* Define if we have the oprofile JIT-support library */
+ #cmakedefine01 LLVM_USE_OPROFILE
+
++/* Define if we have the perf JIT-support library */
++#cmakedefine01 LLVM_USE_PERF
++
+ /* Major version of the LLVM API */
+ #define LLVM_VERSION_MAJOR ${LLVM_VERSION_MAJOR}
+
+diff --git a/include/llvm/ExecutionEngine/JITEventListener.h b/include/llvm/ExecutionEngine/JITEventListener.h
+index ff7840f00a4..1cc2c423a8b 100644
+--- a/include/llvm/ExecutionEngine/JITEventListener.h
++++ b/include/llvm/ExecutionEngine/JITEventListener.h
+@@ -115,6 +115,15 @@ public:
+ }
+ #endif // USE_OPROFILE
+
++#ifdef LLVM_USE_PERF
++ static JITEventListener *createPerfJITEventListener();
++#else
++ static JITEventListener *createPerfJITEventListener()
++ {
++ return nullptr;
++ }
++#endif //USE_PERF
++
+ private:
+ virtual void anchor();
+ };
+diff --git a/lib/ExecutionEngine/CMakeLists.txt b/lib/ExecutionEngine/CMakeLists.txt
+index 84b34919e44..893d113a685 100644
+--- a/lib/ExecutionEngine/CMakeLists.txt
++++ b/lib/ExecutionEngine/CMakeLists.txt
+@@ -30,3 +30,7 @@ endif( LLVM_USE_OPROFILE )
+ if( LLVM_USE_INTEL_JITEVENTS )
+ add_subdirectory(IntelJITEvents)
+ endif( LLVM_USE_INTEL_JITEVENTS )
++
++if( LLVM_USE_PERF )
++ add_subdirectory(PerfJITEvents)
++endif( LLVM_USE_PERF )
+diff --git a/lib/ExecutionEngine/LLVMBuild.txt b/lib/ExecutionEngine/LLVMBuild.txt
+index 9d29a41f504..b6e1bda6a51 100644
+--- a/lib/ExecutionEngine/LLVMBuild.txt
++++ b/lib/ExecutionEngine/LLVMBuild.txt
+@@ -16,7 +16,7 @@
+ ;===------------------------------------------------------------------------===;
+
+ [common]
+-subdirectories = Interpreter MCJIT RuntimeDyld IntelJITEvents OProfileJIT Orc
++subdirectories = Interpreter MCJIT RuntimeDyld IntelJITEvents OProfileJIT Orc PerfJITEvents
+
+ [component_0]
+ type = Library
+diff --git a/lib/ExecutionEngine/Orc/LLVMBuild.txt b/lib/ExecutionEngine/Orc/LLVMBuild.txt
+index 8f05172e77a..ef4ae64e823 100644
+--- a/lib/ExecutionEngine/Orc/LLVMBuild.txt
++++ b/lib/ExecutionEngine/Orc/LLVMBuild.txt
+@@ -19,4 +19,4 @@
+ type = Library
+ name = OrcJIT
+ parent = ExecutionEngine
+-required_libraries = Core ExecutionEngine Object RuntimeDyld Support TransformUtils
++required_libraries = Core ExecutionEngine Object RuntimeDyld Support TransformUtils
+diff --git a/lib/ExecutionEngine/PerfJITEvents/CMakeLists.txt b/lib/ExecutionEngine/PerfJITEvents/CMakeLists.txt
+new file mode 100644
+index 00000000000..136cc429d02
+--- /dev/null
++++ b/lib/ExecutionEngine/PerfJITEvents/CMakeLists.txt
+@@ -0,0 +1,5 @@
++add_llvm_library(LLVMPerfJITEvents
++ PerfJITEventListener.cpp
++ )
++
++add_dependencies(LLVMPerfJITEvents LLVMCodeGen)
+diff --git a/lib/ExecutionEngine/PerfJITEvents/LLVMBuild.txt b/lib/ExecutionEngine/PerfJITEvents/LLVMBuild.txt
+new file mode 100644
+index 00000000000..b1958a69260
+--- /dev/null
++++ b/lib/ExecutionEngine/PerfJITEvents/LLVMBuild.txt
+@@ -0,0 +1,23 @@
++;===- ./lib/ExecutionEngine/PerfJITEvents/LLVMBuild.txt ----------------*- Conf -*--===;
++;
++; The LLVM Compiler Infrastructure
++;
++; This file is distributed under the University of Illinois Open Source
++; License. See LICENSE.TXT for details.
++;
++;===------------------------------------------------------------------------===;
++;
++; This is an LLVMBuild description file for the components in this subdirectory.
++;
++; For more information on the LLVMBuild system, please see:
++;
++; http://llvm.org/docs/LLVMBuild.html
++;
++;===------------------------------------------------------------------------===;
++
++[component_0]
++type = OptionalLibrary
++name = PerfJITEvents
++parent = ExecutionEngine
++required_libraries = CodeGen Core DebugInfoDWARF ExecutionEngine Object Support TransformUtils
++
+diff --git a/lib/ExecutionEngine/PerfJITEvents/PerfJITEventListener.cpp b/lib/ExecutionEngine/PerfJITEvents/PerfJITEventListener.cpp
+new file mode 100644
+index 00000000000..c2b97dd59f3
+--- /dev/null
++++ b/lib/ExecutionEngine/PerfJITEvents/PerfJITEventListener.cpp
+@@ -0,0 +1,492 @@
++//===-- PerfJITEventListener.cpp - Tell Linux's perf about JITted code ----===//
++//
++// The LLVM Compiler Infrastructure
++//
++// This file is distributed under the University of Illinois Open Source
++// License. See LICENSE.TXT for details.
++//
++//===----------------------------------------------------------------------===//
++//
++// This file defines a JITEventListener object that tells perf about JITted
++// functions, including source line information.
++//
++// Documentation for perf jit integration is available at:
++// https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/tools/perf/Documentation/jitdump-specification.txt
++// https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/tools/perf/Documentation/jit-interface.txt
++//
++//===----------------------------------------------------------------------===//
++
++#include "llvm/ADT/Twine.h"
++#include "llvm/Config/config.h"
++#include "llvm/DebugInfo/DWARF/DWARFContext.h"
++#include "llvm/ExecutionEngine/JITEventListener.h"
++#include "llvm/Object/ObjectFile.h"
++#include "llvm/Object/SymbolSize.h"
++#include "llvm/Support/Debug.h"
++#include "llvm/Support/Errno.h"
++#include "llvm/Support/FileSystem.h"
++#include "llvm/Support/MemoryBuffer.h"
++#include "llvm/Support/Mutex.h"
++#include "llvm/Support/MutexGuard.h"
++#include "llvm/Support/Path.h"
++#include "llvm/Support/Process.h"
++#include "llvm/Support/Threading.h"
++#include "llvm/Support/raw_ostream.h"
++
++#include <sys/mman.h> // mmap()
++#include <sys/types.h> // getpid()
++#include <time.h> // clock_gettime(), time(), localtime_r() */
++#include <unistd.h> // for getpid(), read(), close()
++
++using namespace llvm;
++using namespace llvm::object;
++typedef DILineInfoSpecifier::FileLineInfoKind FileLineInfoKind;
++
++namespace {
++
++// language identifier (XXX: should we generate something better from debug
++// info?)
++#define JIT_LANG "llvm-IR"
++#define LLVM_PERF_JIT_MAGIC \
++ ((uint32_t)'J' << 24 | (uint32_t)'i' << 16 | (uint32_t)'T' << 8 | \
++ (uint32_t)'D')
++#define LLVM_PERF_JIT_VERSION 1
++
++// bit 0: set if the jitdump file is using an architecture-specific timestamp
++// clock source
++#define JITDUMP_FLAGS_ARCH_TIMESTAMP (1ULL << 0)
++
++struct LLVMPerfJitHeader;
++
++class PerfJITEventListener : public JITEventListener {
++public:
++ PerfJITEventListener();
++ ~PerfJITEventListener() {
++ if (MarkerAddr)
++ CloseMarker();
++ }
++
++ void NotifyObjectEmitted(const ObjectFile &Obj,
++ const RuntimeDyld::LoadedObjectInfo &L) override;
++ void NotifyFreeingObject(const ObjectFile &Obj) override;
++
++private:
++ bool InitDebuggingDir();
++ bool OpenMarker();
++ void CloseMarker();
++ static bool FillMachine(LLVMPerfJitHeader &hdr);
++
++ void NotifyCode(Expected<llvm::StringRef> &Symbol, uint64_t CodeAddr,
++ uint64_t CodeSize);
++ void NotifyDebug(uint64_t CodeAddr, DILineInfoTable Lines);
++
++ // cache lookups
++ pid_t Pid;
++
++ // base directory for output data
++ std::string JitPath;
++
++ // output data stream, closed via Dumpstream
++ int DumpFd = -1;
++
++ // output data stream
++ std::unique_ptr<raw_fd_ostream> Dumpstream;
++
++ // prevent concurrent dumps from messing up the output file
++ sys::Mutex Mutex;
++
++ // perf mmap marker
++ void *MarkerAddr = NULL;
++
++ // perf support ready
++ bool SuccessfullyInitialized = false;
++
++ // identifier for functions, primarily to identify when moving them around
++ uint64_t CodeGeneration = 1;
++};
++
++// The following are POD struct definitions from the perf jit specification
++
++enum LLVMPerfJitRecordType {
++ JIT_CODE_LOAD = 0,
++ JIT_CODE_MOVE = 1, // not emitted, code isn't moved
++ JIT_CODE_DEBUG_INFO = 2,
++ JIT_CODE_CLOSE = 3, // not emitted, unnecessary
++ JIT_CODE_UNWINDING_INFO = 4, // not emitted
++
++ JIT_CODE_MAX
++};
++
++struct LLVMPerfJitHeader {
++ uint32_t Magic; // characters "JiTD"
++ uint32_t Version; // header version
++ uint32_t TotalSize; // total size of header
++ uint32_t ElfMach; // elf mach target
++ uint32_t Pad1; // reserved
++ uint32_t Pid;
++ uint64_t Timestamp; // timestamp
++ uint64_t Flags; // flags
++};
++
++// record prefix (mandatory in each record)
++struct LLVMPerfJitRecordPrefix {
++ uint32_t Id; // record type identifier
++ uint32_t TotalSize;
++ uint64_t Timestamp;
++};
++
++struct LLVMPerfJitRecordCodeLoad {
++ LLVMPerfJitRecordPrefix Prefix;
++
++ uint32_t Pid;
++ uint32_t Tid;
++ uint64_t Vma;
++ uint64_t CodeAddr;
++ uint64_t CodeSize;
++ uint64_t CodeIndex;
++};
++
++struct LLVMPerfJitDebugEntry {
++ uint64_t Addr;
++ int Lineno; // source line number starting at 1
++ int Discrim; // column discriminator, 0 is default
++ // followed by null terminated filename, \xff\0 if same as previous entry
++};
++
++struct LLVMPerfJitRecordDebugInfo {
++ LLVMPerfJitRecordPrefix Prefix;
++
++ uint64_t CodeAddr;
++ uint64_t NrEntry;
++ // followed by NrEntry LLVMPerfJitDebugEntry records
++};
++
++static inline uint64_t timespec_to_ns(const struct timespec *ts) {
++ const uint64_t NanoSecPerSec = 1000000000;
++ return ((uint64_t)ts->tv_sec * NanoSecPerSec) + ts->tv_nsec;
++}
++
++static inline uint64_t perf_get_timestamp(void) {
++ struct timespec ts;
++ int ret;
++
++ ret = clock_gettime(CLOCK_MONOTONIC, &ts);
++ if (ret)
++ return 0;
++
++ return timespec_to_ns(&ts);
++}
++
++PerfJITEventListener::PerfJITEventListener() : Pid(::getpid()) {
++ // check if clock-source is supported
++ if (!perf_get_timestamp()) {
++ errs() << "kernel does not support CLOCK_MONOTONIC\n";
++ return;
++ }
++
++ if (!InitDebuggingDir()) {
++ errs() << "could not initialize debugging directory\n";
++ return;
++ }
++
++ std::string Filename;
++ raw_string_ostream FilenameBuf(Filename);
++ FilenameBuf << JitPath << "/jit-" << Pid << ".dump";
++
++ // Need to open ourselves, because we need to hand the FD to OpenMarker() and
++ // raw_fd_ostream doesn't expose the FD.
++ using sys::fs::openFileForWrite;
++ if (auto EC =
++ openFileForWrite(FilenameBuf.str(), DumpFd, sys::fs::F_RW, 0666)) {
++ errs() << "could not open JIT dump file " << FilenameBuf.str() << ": "
++ << EC.message() << "\n";
++ return;
++ }
++
++ Dumpstream = make_unique<raw_fd_ostream>(DumpFd, true);
++
++ LLVMPerfJitHeader Header = {0};
++ if (!FillMachine(Header))
++ return;
++
++ // signal this process emits JIT information
++ if (!OpenMarker())
++ return;
++
++ // emit dumpstream header
++ Header.Magic = LLVM_PERF_JIT_MAGIC;
++ Header.Version = LLVM_PERF_JIT_VERSION;
++ Header.TotalSize = sizeof(Header);
++ Header.Pid = Pid;
++ Header.Timestamp = perf_get_timestamp();
++ Dumpstream->write(reinterpret_cast<const char *>(&Header), sizeof(Header));
++
++ // Everything initialized, can do profiling now.
++ if (!Dumpstream->has_error())
++ SuccessfullyInitialized = true;
++}
++
++void PerfJITEventListener::NotifyObjectEmitted(
++ const ObjectFile &Obj, const RuntimeDyld::LoadedObjectInfo &L) {
++
++ if (!SuccessfullyInitialized)
++ return;
++
++ OwningBinary<ObjectFile> DebugObjOwner = L.getObjectForDebug(Obj);
++ const ObjectFile &DebugObj = *DebugObjOwner.getBinary();
++
++ // Get the address of the object image for use as a unique identifier
++ std::unique_ptr<DIContext> Context = DWARFContext::create(DebugObj);
++
++ // Use symbol info to iterate over functions in the object.
++ for (const std::pair<SymbolRef, uint64_t> &P : computeSymbolSizes(DebugObj)) {
++ SymbolRef Sym = P.first;
++ std::string SourceFileName;
++
++ Expected<SymbolRef::Type> SymTypeOrErr = Sym.getType();
++ if (!SymTypeOrErr) {
++ // There's not much we can with errors here
++ consumeError(SymTypeOrErr.takeError());
++ continue;
++ }
++ SymbolRef::Type SymType = *SymTypeOrErr;
++ if (SymType != SymbolRef::ST_Function)
++ continue;
++
++ Expected<StringRef> Name = Sym.getName();
++ if (!Name) {
++ consumeError(Name.takeError());
++ continue;
++ }
++
++ Expected<uint64_t> AddrOrErr = Sym.getAddress();
++ if (!AddrOrErr) {
++ consumeError(AddrOrErr.takeError());
++ continue;
++ }
++ uint64_t Addr = *AddrOrErr;
++ uint64_t Size = P.second;
++
++ // According to spec debugging info has to come before loading the
++ // corresonding code load.
++ DILineInfoTable Lines = Context->getLineInfoForAddressRange(
++ Addr, Size, FileLineInfoKind::AbsoluteFilePath);
++
++ NotifyDebug(Addr, Lines);
++ NotifyCode(Name, Addr, Size);
++ }
++
++ Dumpstream->flush();
++}
++
++void PerfJITEventListener::NotifyFreeingObject(const ObjectFile &Obj) {
++ // perf currently doesn't have an interface for unloading. But munmap()ing the
++ // code section does, so that's ok.
++}
++
++bool PerfJITEventListener::InitDebuggingDir() {
++ time_t Time;
++ struct tm LocalTime;
++ char TimeBuffer[sizeof("YYYYMMDD")];
++ SmallString<64> Path;
++
++ // search for location to dump data to
++ if (const char *BaseDir = getenv("JITDUMPDIR"))
++ Path.append(BaseDir);
++ else if (!sys::path::home_directory(Path))
++ Path = ".";
++
++ // create debug directory
++ Path += "/.debug/jit/";
++ if (auto EC = sys::fs::create_directories(Path)) {
++ errs() << "could not create jit cache directory " << Path << ": "
++ << EC.message() << "\n";
++ return false;
++ }
++
++ // create unique directory for dump data related to this process
++ time(&Time);
++ localtime_r(&Time, &LocalTime);
++ strftime(TimeBuffer, sizeof(TimeBuffer), "%Y%m%d", &LocalTime);
++ Path += JIT_LANG "-jit-";
++ Path += TimeBuffer;
++
++ SmallString<128> UniqueDebugDir;
++
++ using sys::fs::createUniqueDirectory;
++ if (auto EC = createUniqueDirectory(Path, UniqueDebugDir)) {
++ errs() << "could not create unique jit cache directory " << UniqueDebugDir
++ << ": " << EC.message() << "\n";
++ return false;
++ }
++
++ JitPath = UniqueDebugDir.str();
++
++ return true;
++}
++
++bool PerfJITEventListener::OpenMarker() {
++ // We mmap the jitdump to create an MMAP RECORD in perf.data file. The mmap
++ // is captured either live (perf record running when we mmap) or in deferred
++ // mode, via /proc/PID/maps. The MMAP record is used as a marker of a jitdump
++ // file for more meta data info about the jitted code. Perf report/annotate
++ // detect this special filename and process the jitdump file.
++ //
++ // Mapping must be PROT_EXEC to ensure it is captured by perf record
++ // even when not using -d option.
++ MarkerAddr = ::mmap(NULL, sys::Process::getPageSize(), PROT_READ | PROT_EXEC,
++ MAP_PRIVATE, DumpFd, 0);
++
++ if (MarkerAddr == MAP_FAILED) {
++ errs() << "could not mmap JIT marker\n";
++ return false;
++ }
++ return true;
++}
++
++void PerfJITEventListener::CloseMarker() {
++ if (!MarkerAddr)
++ return;
++
++ munmap(MarkerAddr, sys::Process::getPageSize());
++ MarkerAddr = nullptr;
++}
++
++bool PerfJITEventListener::FillMachine(LLVMPerfJitHeader &hdr) {
++ char id[16];
++ struct {
++ uint16_t e_type;
++ uint16_t e_machine;
++ } info;
++
++ size_t RequiredMemory = sizeof(id) + sizeof(info);
++
++ ErrorOr<std::unique_ptr<MemoryBuffer>> MB =
++ MemoryBuffer::getFileSlice("/proc/self/exe",
++ RequiredMemory,
++ 0);
++
++ // This'll not guarantee that enough data was actually read from the
++ // underlying file. Instead the trailing part of the buffer would be
++ // zeroed. Given the ELF signature check below that seems ok though,
++ // it's unlikely that the file ends just after that, and the
++ // consequence would just be that perf wouldn't recognize the
++ // signature.
++ if (auto EC = MB.getError()) {
++ errs() << "could not open /proc/self/exe: " << EC.message() << "\n";
++ return false;
++ }
++
++ memcpy(&id, (*MB)->getBufferStart(), sizeof(id));
++ memcpy(&info, (*MB)->getBufferStart() + sizeof(id), sizeof(info));
++
++ // check ELF signature
++ if (id[0] != 0x7f || id[1] != 'E' || id[2] != 'L' || id[3] != 'F') {
++ errs() << "invalid elf signature\n";
++ return false;
++ }
++
++ hdr.ElfMach = info.e_machine;
++
++ return true;
++}
++
++void PerfJITEventListener::NotifyCode(Expected<llvm::StringRef> &Symbol,
++ uint64_t CodeAddr, uint64_t CodeSize) {
++ assert(SuccessfullyInitialized);
++
++ // 0 length functions can't have samples.
++ if (CodeSize == 0)
++ return;
++
++ LLVMPerfJitRecordCodeLoad rec;
++ rec.Prefix.Id = JIT_CODE_LOAD;
++ rec.Prefix.TotalSize = sizeof(rec) + // debug record itself
++ Symbol->size() + 1 + // symbol name
++ CodeSize; // and code
++ rec.Prefix.Timestamp = perf_get_timestamp();
++
++ rec.CodeSize = CodeSize;
++ rec.Vma = 0;
++ rec.CodeAddr = CodeAddr;
++ rec.Pid = Pid;
++ rec.Tid = get_threadid();
++
++ // avoid interspersing output
++ MutexGuard Guard(Mutex);
++
++ rec.CodeIndex = CodeGeneration++; // under lock!
++
++ Dumpstream->write(reinterpret_cast<const char *>(&rec), sizeof(rec));
++ Dumpstream->write(Symbol->data(), Symbol->size() + 1);
++ Dumpstream->write(reinterpret_cast<const char *>(CodeAddr), CodeSize);
++}
++
++void PerfJITEventListener::NotifyDebug(uint64_t CodeAddr,
++ DILineInfoTable Lines) {
++ assert(SuccessfullyInitialized);
++
++ // Didn't get useful debug info.
++ if (Lines.empty())
++ return;
++
++ LLVMPerfJitRecordDebugInfo rec;
++ rec.Prefix.Id = JIT_CODE_DEBUG_INFO;
++ rec.Prefix.TotalSize = sizeof(rec); // will be increased further
++ rec.Prefix.Timestamp = perf_get_timestamp();
++ rec.CodeAddr = CodeAddr;
++ rec.NrEntry = Lines.size();
++
++ // compute total size size of record (variable due to filenames)
++ DILineInfoTable::iterator Begin = Lines.begin();
++ DILineInfoTable::iterator End = Lines.end();
++ for (DILineInfoTable::iterator It = Begin; It != End; ++It) {
++ DILineInfo &line = It->second;
++ rec.Prefix.TotalSize += sizeof(LLVMPerfJitDebugEntry);
++ rec.Prefix.TotalSize += line.FileName.size() + 1;
++ }
++
++ // The debug_entry describes the source line information. It is defined as
++ // follows in order:
++ // * uint64_t code_addr: address of function for which the debug information
++ // is generated
++ // * uint32_t line : source file line number (starting at 1)
++ // * uint32_t discrim : column discriminator, 0 is default
++ // * char name[n] : source file name in ASCII, including null termination
++
++ // avoid interspersing output
++ MutexGuard Guard(Mutex);
++
++ Dumpstream->write(reinterpret_cast<const char *>(&rec), sizeof(rec));
++
++ for (DILineInfoTable::iterator It = Begin; It != End; ++It) {
++ LLVMPerfJitDebugEntry LineInfo;
++ DILineInfo &Line = It->second;
++
++ LineInfo.Addr = It->first;
++ // The function re-created by perf is preceded by a elf
++ // header. Need to adjust for that, otherwise the results are
++ // wrong.
++ LineInfo.Addr += 0x40;
++ LineInfo.Lineno = Line.Line;
++ LineInfo.Discrim = Line.Discriminator;
++
++ Dumpstream->write(reinterpret_cast<const char *>(&LineInfo),
++ sizeof(LineInfo));
++ Dumpstream->write(Line.FileName.c_str(), Line.FileName.size() + 1);
++ }
++}
++
++// There should be only a single event listener per process, otherwise perf gets
++// confused.
++llvm::ManagedStatic<PerfJITEventListener> PerfListener;
++
++} // end anonymous namespace
++
++namespace llvm {
++JITEventListener *JITEventListener::createPerfJITEventListener() {
++ return &*PerfListener;
++}
++
++} // namespace llvm
++
+--
+2.17.1
+
--- /dev/null
+commit 8eb2b102a203d83fb713f3bf79acf235dabdd8cd
+Author: Keno Fischer <keno@juliacomputing.com>
+Date: Mon Jul 30 16:59:08 2018 -0400
+
+ [VNCoercion] Disallow coercion between different ni addrspaces
+
+ Summary:
+ I'm not sure if it would be legal by the IR reference to introduce
+ an addrspacecast here, since the IR reference is a bit vague on
+ the exact semantics, but at least for our usage of it (and I
+ suspect for many other's usage) it is not. For us, addrspacecasts
+ between non-integral address spaces carry frontend information that the
+ optimizer cannot deduce afterwards in a generic way (though we
+ have frontend specific passes in our pipline that do propagate
+ these). In any case, I'm sure nobody is using it this way at
+ the moment, since it would have introduced inttoptrs, which
+ are definitely illegal.
+
+ Fixes PR38375
+
+ Reviewers: sanjoy, reames, dberlin
+
+ Subscribers: llvm-commits
+
+ Differential Revision: https://reviews.llvm.org/D50010
+
+diff --git a/lib/Transforms/Utils/VNCoercion.cpp b/lib/Transforms/Utils/VNCoercion.cpp
+index c3feea6a0a4..735d1e7b792 100644
+--- a/lib/Transforms/Utils/VNCoercion.cpp
++++ b/lib/Transforms/Utils/VNCoercion.cpp
+@@ -20,14 +20,21 @@ bool canCoerceMustAliasedValueToLoad(Value *StoredVal, Type *LoadTy,
+ StoredVal->getType()->isStructTy() || StoredVal->getType()->isArrayTy())
+ return false;
+
++ Type *StoredValTy = StoredVal->getType();
++
+ // The store has to be at least as big as the load.
+ if (DL.getTypeSizeInBits(StoredVal->getType()) < DL.getTypeSizeInBits(LoadTy))
+ return false;
+
+- // Don't coerce non-integral pointers to integers or vice versa.
+- if (DL.isNonIntegralPointerType(StoredVal->getType()) !=
+- DL.isNonIntegralPointerType(LoadTy))
++ bool StoredNI = DL.isNonIntegralPointerType(StoredValTy);
++ bool LoadNI = DL.isNonIntegralPointerType(LoadTy);
++ if (StoredNI != LoadNI) {
+ return false;
++ } else if (StoredNI && LoadNI &&
++ cast<PointerType>(StoredValTy)->getAddressSpace() !=
++ cast<PointerType>(LoadTy)->getAddressSpace()) {
++ return false;
++ }
+
+ return true;
+ }
+diff --git a/test/Transforms/GVN/non-integral-pointers.ll b/test/Transforms/GVN/non-integral-pointers.ll
+index 9ae4132231d..5217fc1a06a 100644
+--- a/test/Transforms/GVN/non-integral-pointers.ll
++++ b/test/Transforms/GVN/non-integral-pointers.ll
+@@ -1,6 +1,6 @@
+ ; RUN: opt -gvn -S < %s | FileCheck %s
+
+-target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:4"
++target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:4:5"
+ target triple = "x86_64-unknown-linux-gnu"
+
+ define void @f0(i1 %alwaysFalse, i64 %val, i64* %loc) {
+@@ -37,3 +37,21 @@ define i64 @f1(i1 %alwaysFalse, i8 addrspace(4)* %val, i8 addrspace(4)** %loc) {
+ alwaysTaken:
+ ret i64 42
+ }
++
++ define i8 addrspace(5)* @multini(i1 %alwaysFalse, i8 addrspace(4)* %val, i8 addrspace(4)** %loc) {
++ ; CHECK-LABEL: @multini(
++ ; CHECK-NOT: inttoptr
++ ; CHECK-NOT: ptrtoint
++ ; CHECK-NOT: addrspacecast
++ entry:
++ store i8 addrspace(4)* %val, i8 addrspace(4)** %loc
++ br i1 %alwaysFalse, label %neverTaken, label %alwaysTaken
++
++ neverTaken:
++ %loc.bc = bitcast i8 addrspace(4)** %loc to i8 addrspace(5)**
++ %differentas = load i8 addrspace(5)*, i8 addrspace(5)** %loc.bc
++ ret i8 addrspace(5)* %differentas
++
++ alwaysTaken:
++ ret i8 addrspace(5)* null
++ }
--- /dev/null
+commit 556c30af1c797be294edde0ce621884f5acf11f0
+Author: Keno Fischer <keno@juliacomputing.com>
+Date: Wed Aug 1 20:45:11 2018 -0400
+
+ RFC: [SCEV] Add explicit representations of umin/smin
+
+ Summary:
+ Currently we express umin as `~umax(~x, ~y)`. However, this becomes
+ a problem for operands in non-integral pointer spaces, because `~x`
+ is not something we can compute for `x` non-integral. However, since
+ comparisons are generally still allowed, we are actually able to
+ express `umin(x, y)` directly as long as we don't try to express is
+ as a umax. Support this by adding an explicit umin/smin representation
+ to SCEV. We do this by factoring the existing getUMax/getSMax functions
+ into a new function that does all four. The previous two functions
+ were largely identical, except that the SMax variant used `isKnownPredicate`
+ while the UMax variant used `isKnownViaNonRecursiveReasoning`.
+
+ Trying to make the UMax variant also use `isKnownPredicate` yields to
+ an infinite recursion, while trying to make the `SMax` variant use
+ `isKnownViaNonRecursiveReasoning` causes
+ `Transforms/IndVarSimplify/backedge-on-min-max.ll` to fail.
+
+ I would appreciate any insight into which predicate is correct here.
+
+ Reviewers: reames, sanjoy
+
+ Subscribers: javed.absar, llvm-commits
+
+ Differential Revision: https://reviews.llvm.org/D50167
+
+Index: llvm-toolchain-6.0-6.0.1/include/llvm/Analysis/ScalarEvolution.h
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/include/llvm/Analysis/ScalarEvolution.h
++++ llvm-toolchain-6.0-6.0.1/include/llvm/Analysis/ScalarEvolution.h
+@@ -582,12 +582,15 @@ public:
+ /// \p IndexExprs The expressions for the indices.
+ const SCEV *getGEPExpr(GEPOperator *GEP,
+ const SmallVectorImpl<const SCEV *> &IndexExprs);
++ const SCEV *getUSMinMaxExpr(unsigned Kind, SmallVectorImpl<const SCEV *> &Operands);
+ const SCEV *getSMaxExpr(const SCEV *LHS, const SCEV *RHS);
+ const SCEV *getSMaxExpr(SmallVectorImpl<const SCEV *> &Operands);
+ const SCEV *getUMaxExpr(const SCEV *LHS, const SCEV *RHS);
+ const SCEV *getUMaxExpr(SmallVectorImpl<const SCEV *> &Operands);
+ const SCEV *getSMinExpr(const SCEV *LHS, const SCEV *RHS);
++ const SCEV *getSMinExpr(SmallVectorImpl<const SCEV *> &Operands);
+ const SCEV *getUMinExpr(const SCEV *LHS, const SCEV *RHS);
++ const SCEV *getUMinExpr(SmallVectorImpl<const SCEV *> &Operands);
+ const SCEV *getUnknown(Value *V);
+ const SCEV *getCouldNotCompute();
+
+Index: llvm-toolchain-6.0-6.0.1/include/llvm/Analysis/ScalarEvolutionExpander.h
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/include/llvm/Analysis/ScalarEvolutionExpander.h
++++ llvm-toolchain-6.0-6.0.1/include/llvm/Analysis/ScalarEvolutionExpander.h
+@@ -367,6 +367,10 @@ namespace llvm {
+
+ Value *visitUMaxExpr(const SCEVUMaxExpr *S);
+
++ Value *visitSMinExpr(const SCEVSMinExpr *S);
++
++ Value *visitUMinExpr(const SCEVUMinExpr *S);
++
+ Value *visitUnknown(const SCEVUnknown *S) {
+ return S->getValue();
+ }
+Index: llvm-toolchain-6.0-6.0.1/include/llvm/Analysis/ScalarEvolutionExpressions.h
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/include/llvm/Analysis/ScalarEvolutionExpressions.h
++++ llvm-toolchain-6.0-6.0.1/include/llvm/Analysis/ScalarEvolutionExpressions.h
+@@ -40,7 +40,7 @@ class Type;
+ // These should be ordered in terms of increasing complexity to make the
+ // folders simpler.
+ scConstant, scTruncate, scZeroExtend, scSignExtend, scAddExpr, scMulExpr,
+- scUDivExpr, scAddRecExpr, scUMaxExpr, scSMaxExpr,
++ scUDivExpr, scAddRecExpr, scUMaxExpr, scSMaxExpr, scUMinExpr, scSMinExpr,
+ scUnknown, scCouldNotCompute
+ };
+
+@@ -187,6 +187,8 @@ class Type;
+ S->getSCEVType() == scMulExpr ||
+ S->getSCEVType() == scSMaxExpr ||
+ S->getSCEVType() == scUMaxExpr ||
++ S->getSCEVType() == scSMinExpr ||
++ S->getSCEVType() == scUMinExpr ||
+ S->getSCEVType() == scAddRecExpr;
+ }
+ };
+@@ -204,7 +206,9 @@ class Type;
+ return S->getSCEVType() == scAddExpr ||
+ S->getSCEVType() == scMulExpr ||
+ S->getSCEVType() == scSMaxExpr ||
+- S->getSCEVType() == scUMaxExpr;
++ S->getSCEVType() == scUMaxExpr ||
++ S->getSCEVType() == scSMinExpr ||
++ S->getSCEVType() == scUMinExpr;
+ }
+
+ /// Set flags for a non-recurrence without clearing previously set flags.
+@@ -396,6 +400,42 @@ class Type;
+ }
+ };
+
++ /// This class represents a signed minimum selection.
++ class SCEVSMinExpr : public SCEVCommutativeExpr {
++ friend class ScalarEvolution;
++
++ SCEVSMinExpr(const FoldingSetNodeIDRef ID,
++ const SCEV *const *O, size_t N)
++ : SCEVCommutativeExpr(ID, scSMinExpr, O, N) {
++ // Min never overflows.
++ setNoWrapFlags((NoWrapFlags)(FlagNUW | FlagNSW));
++ }
++
++ public:
++ /// Methods for support type inquiry through isa, cast, and dyn_cast:
++ static bool classof(const SCEV *S) {
++ return S->getSCEVType() == scSMinExpr;
++ }
++ };
++
++ /// This class represents an unsigned minimum selection.
++ class SCEVUMinExpr : public SCEVCommutativeExpr {
++ friend class ScalarEvolution;
++
++ SCEVUMinExpr(const FoldingSetNodeIDRef ID,
++ const SCEV *const *O, size_t N)
++ : SCEVCommutativeExpr(ID, scUMinExpr, O, N) {
++ // Min never overflows.
++ setNoWrapFlags((NoWrapFlags)(FlagNUW | FlagNSW));
++ }
++
++ public:
++ /// Methods for support type inquiry through isa, cast, and dyn_cast:
++ static bool classof(const SCEV *S) {
++ return S->getSCEVType() == scUMinExpr;
++ }
++ };
++
+ /// This means that we are dealing with an entirely unknown SCEV
+ /// value, and only represent it as its LLVM Value. This is the
+ /// "bottom" value for the analysis.
+@@ -468,6 +508,10 @@ class Type;
+ return ((SC*)this)->visitSMaxExpr((const SCEVSMaxExpr*)S);
+ case scUMaxExpr:
+ return ((SC*)this)->visitUMaxExpr((const SCEVUMaxExpr*)S);
++ case scSMinExpr:
++ return ((SC*)this)->visitSMinExpr((const SCEVSMinExpr*)S);
++ case scUMinExpr:
++ return ((SC*)this)->visitUMinExpr((const SCEVUMinExpr*)S);
+ case scUnknown:
+ return ((SC*)this)->visitUnknown((const SCEVUnknown*)S);
+ case scCouldNotCompute:
+@@ -521,6 +565,8 @@ class Type;
+ case scMulExpr:
+ case scSMaxExpr:
+ case scUMaxExpr:
++ case scSMinExpr:
++ case scUMinExpr:
+ case scAddRecExpr:
+ for (const auto *Op : cast<SCEVNAryExpr>(S)->operands())
+ push(Op);
+@@ -683,6 +729,26 @@ class Type;
+ return !Changed ? Expr : SE.getUMaxExpr(Operands);
+ }
+
++ const SCEV *visitSMinExpr(const SCEVSMinExpr *Expr) {
++ SmallVector<const SCEV *, 2> Operands;
++ bool Changed = false;
++ for (auto *Op : Expr->operands()) {
++ Operands.push_back(((SC *)this)->visit(Op));
++ Changed |= Op != Operands.back();
++ }
++ return !Changed ? Expr : SE.getSMinExpr(Operands);
++ }
++
++ const SCEV *visitUMinExpr(const SCEVUMinExpr *Expr) {
++ SmallVector<const SCEV *, 2> Operands;
++ bool Changed = false;
++ for (auto *Op : Expr->operands()) {
++ Operands.push_back(((SC*)this)->visit(Op));
++ Changed |= Op != Operands.back();
++ }
++ return !Changed ? Expr : SE.getUMinExpr(Operands);
++ }
++
+ const SCEV *visitUnknown(const SCEVUnknown *Expr) {
+ return Expr;
+ }
+Index: llvm-toolchain-6.0-6.0.1/lib/Analysis/ScalarEvolution.cpp
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/Analysis/ScalarEvolution.cpp
++++ llvm-toolchain-6.0-6.0.1/lib/Analysis/ScalarEvolution.cpp
+@@ -271,7 +271,9 @@ void SCEV::print(raw_ostream &OS) const
+ case scAddExpr:
+ case scMulExpr:
+ case scUMaxExpr:
+- case scSMaxExpr: {
++ case scSMaxExpr:
++ case scUMinExpr:
++ case scSMinExpr: {
+ const SCEVNAryExpr *NAry = cast<SCEVNAryExpr>(this);
+ const char *OpStr = nullptr;
+ switch (NAry->getSCEVType()) {
+@@ -279,6 +281,8 @@ void SCEV::print(raw_ostream &OS) const
+ case scMulExpr: OpStr = " * "; break;
+ case scUMaxExpr: OpStr = " umax "; break;
+ case scSMaxExpr: OpStr = " smax "; break;
++ case scUMinExpr: OpStr = " umin "; break;
++ case scSMinExpr: OpStr = " smin "; break;
+ }
+ OS << "(";
+ for (SCEVNAryExpr::op_iterator I = NAry->op_begin(), E = NAry->op_end();
+@@ -347,6 +351,8 @@ Type *SCEV::getType() const {
+ case scMulExpr:
+ case scUMaxExpr:
+ case scSMaxExpr:
++ case scUMinExpr:
++ case scSMinExpr:
+ return cast<SCEVNAryExpr>(this)->getType();
+ case scAddExpr:
+ return cast<SCEVAddExpr>(this)->getType();
+@@ -718,7 +724,9 @@ static int CompareSCEVComplexity(
+ case scAddExpr:
+ case scMulExpr:
+ case scSMaxExpr:
+- case scUMaxExpr: {
++ case scUMaxExpr:
++ case scSMinExpr:
++ case scUMinExpr: {
+ const SCEVNAryExpr *LC = cast<SCEVNAryExpr>(LHS);
+ const SCEVNAryExpr *RC = cast<SCEVNAryExpr>(RHS);
+
+@@ -922,6 +930,8 @@ public:
+ void visitUDivExpr(const SCEVUDivExpr *Numerator) {}
+ void visitSMaxExpr(const SCEVSMaxExpr *Numerator) {}
+ void visitUMaxExpr(const SCEVUMaxExpr *Numerator) {}
++ void visitSMinExpr(const SCEVSMinExpr *Numerator) {}
++ void visitUMinExpr(const SCEVUMinExpr *Numerator) {}
+ void visitUnknown(const SCEVUnknown *Numerator) {}
+ void visitCouldNotCompute(const SCEVCouldNotCompute *Numerator) {}
+
+@@ -2276,6 +2286,8 @@ bool ScalarEvolution::isAvailableAtLoopE
+ case scMulExpr:
+ case scUMaxExpr:
+ case scSMaxExpr:
++ case scUMinExpr:
++ case scSMinExpr:
+ case scUDivExpr:
+ return true;
+ case scUnknown:
+@@ -3405,23 +3417,20 @@ ScalarEvolution::getGEPExpr(GEPOperator
+ return getAddExpr(BaseExpr, TotalOffset, Wrap);
+ }
+
+-const SCEV *ScalarEvolution::getSMaxExpr(const SCEV *LHS,
+- const SCEV *RHS) {
+- SmallVector<const SCEV *, 2> Ops = {LHS, RHS};
+- return getSMaxExpr(Ops);
+-}
+-
+ const SCEV *
+-ScalarEvolution::getSMaxExpr(SmallVectorImpl<const SCEV *> &Ops) {
+- assert(!Ops.empty() && "Cannot get empty smax!");
++ScalarEvolution::getUSMinMaxExpr(unsigned Kind, SmallVectorImpl<const SCEV *> &Ops) {
++ assert(!Ops.empty() && "Cannot get empty (u|s)(min|max)!");
+ if (Ops.size() == 1) return Ops[0];
+ #ifndef NDEBUG
+ Type *ETy = getEffectiveSCEVType(Ops[0]->getType());
+ for (unsigned i = 1, e = Ops.size(); i != e; ++i)
+ assert(getEffectiveSCEVType(Ops[i]->getType()) == ETy &&
+- "SCEVSMaxExpr operand types don't match!");
++ "Operand types don't match!");
+ #endif
+
++ bool IsSigned = Kind == scSMaxExpr || Kind == scSMinExpr;
++ bool IsMax = Kind == scSMaxExpr || Kind == scUMaxExpr;
++
+ // Sort by complexity, this groups all similar expression types together.
+ GroupByComplexity(Ops, &LI, DT);
+
+@@ -3430,61 +3439,85 @@ ScalarEvolution::getSMaxExpr(SmallVector
+ if (const SCEVConstant *LHSC = dyn_cast<SCEVConstant>(Ops[0])) {
+ ++Idx;
+ assert(Idx < Ops.size());
++ auto &FoldOp =
++ Kind == scSMaxExpr ? APIntOps::smax :
++ Kind == scSMinExpr ? APIntOps::smin :
++ Kind == scUMaxExpr ? APIntOps::umax :
++ APIntOps::umin;
+ while (const SCEVConstant *RHSC = dyn_cast<SCEVConstant>(Ops[Idx])) {
+ // We found two constants, fold them together!
+ ConstantInt *Fold = ConstantInt::get(
+- getContext(), APIntOps::smax(LHSC->getAPInt(), RHSC->getAPInt()));
++ getContext(), FoldOp(LHSC->getAPInt(), RHSC->getAPInt()));
+ Ops[0] = getConstant(Fold);
+ Ops.erase(Ops.begin()+1); // Erase the folded element
+ if (Ops.size() == 1) return Ops[0];
+ LHSC = cast<SCEVConstant>(Ops[0]);
+ }
+
+- // If we are left with a constant minimum-int, strip it off.
+- if (cast<SCEVConstant>(Ops[0])->getValue()->isMinValue(true)) {
+- Ops.erase(Ops.begin());
+- --Idx;
+- } else if (cast<SCEVConstant>(Ops[0])->getValue()->isMaxValue(true)) {
+- // If we have an smax with a constant maximum-int, it will always be
+- // maximum-int.
+- return Ops[0];
++ if (IsMax) {
++ // If we are left with a constant minimum-int, strip it off.
++ if (cast<SCEVConstant>(Ops[0])->getValue()->isMinValue(IsSigned)) {
++ Ops.erase(Ops.begin());
++ --Idx;
++ } else if (cast<SCEVConstant>(Ops[0])->getValue()->isMaxValue(IsSigned)) {
++ // If we have an smax with a constant maximum-int, it will always be
++ // maximum-int.
++ return Ops[0];
++ }
++ } else {
++ // If we are left with a constant maximum-int, strip it off.
++ if (cast<SCEVConstant>(Ops[0])->getValue()->isMaxValue(IsSigned)) {
++ Ops.erase(Ops.begin());
++ --Idx;
++ } else if (cast<SCEVConstant>(Ops[0])->getValue()->isMinValue(IsSigned)) {
++ // If we have an smax with a constant minimum-int, it will always be
++ // maximum-int.
++ return Ops[0];
++ }
+ }
+
+ if (Ops.size() == 1) return Ops[0];
+ }
+
+- // Find the first SMax
+- while (Idx < Ops.size() && Ops[Idx]->getSCEVType() < scSMaxExpr)
++ // Find the first operation of the same kind
++ while (Idx < Ops.size() && Ops[Idx]->getSCEVType() != Kind)
+ ++Idx;
+
+ // Check to see if one of the operands is an SMax. If so, expand its operands
+ // onto our operand list, and recurse to simplify.
+ if (Idx < Ops.size()) {
+- bool DeletedSMax = false;
+- while (const SCEVSMaxExpr *SMax = dyn_cast<SCEVSMaxExpr>(Ops[Idx])) {
++ bool DeletedAny = false;
++ while (Ops[Idx]->getSCEVType() == Kind) {
++ const SCEVCommutativeExpr *SCE = cast<SCEVCommutativeExpr>(Ops[Idx]);
+ Ops.erase(Ops.begin()+Idx);
+- Ops.append(SMax->op_begin(), SMax->op_end());
+- DeletedSMax = true;
++ Ops.append(SCE->op_begin(), SCE->op_end());
++ DeletedAny = true;
+ }
+
+- if (DeletedSMax)
+- return getSMaxExpr(Ops);
++ if (DeletedAny)
++ return getUSMinMaxExpr(Kind, Ops);
+ }
+
+ // Okay, check to see if the same value occurs in the operand list twice. If
+ // so, delete one. Since we sorted the list, these values are required to
+ // be adjacent.
+- for (unsigned i = 0, e = Ops.size()-1; i != e; ++i)
+- // X smax Y smax Y --> X smax Y
+- // X smax Y --> X, if X is always greater than Y
+- if (Ops[i] == Ops[i+1] ||
+- isKnownPredicate(ICmpInst::ICMP_SGE, Ops[i], Ops[i+1])) {
+- Ops.erase(Ops.begin()+i+1, Ops.begin()+i+2);
+- --i; --e;
+- } else if (isKnownPredicate(ICmpInst::ICMP_SLE, Ops[i], Ops[i+1])) {
+- Ops.erase(Ops.begin()+i, Ops.begin()+i+1);
+- --i; --e;
+- }
++ llvm::CmpInst::Predicate GEPred = IsSigned ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE;
++ llvm::CmpInst::Predicate LEPred = IsSigned ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE;
++ llvm::CmpInst::Predicate FirstPred = IsMax ? GEPred : LEPred;
++ llvm::CmpInst::Predicate SecondPred = IsMax ? LEPred : GEPred;
++ for (unsigned i = 0, e = Ops.size()-1; i != e; ++i) {
++ if (Ops[i] == Ops[i+1] ||
++ isKnownPredicate(FirstPred, Ops[i], Ops[i+1])) {
++ // X op Y op Y --> X op Y
++ // X op Y --> X, if we know X, Y are ordered appropriately
++ Ops.erase(Ops.begin()+i+1, Ops.begin()+i+2);
++ --i; --e;
++ } else if (isKnownPredicate(SecondPred, Ops[i], Ops[i+1])) {
++ // X op Y --> Y, if we know X, Y are ordered appropriately
++ Ops.erase(Ops.begin()+i, Ops.begin()+i+1);
++ --i; --e;
++ }
++ }
+
+ if (Ops.size() == 1) return Ops[0];
+
+@@ -3493,132 +3526,73 @@ ScalarEvolution::getSMaxExpr(SmallVector
+ // Okay, it looks like we really DO need an smax expr. Check to see if we
+ // already have one, otherwise create a new one.
+ FoldingSetNodeID ID;
+- ID.AddInteger(scSMaxExpr);
++ ID.AddInteger(Kind);
+ for (unsigned i = 0, e = Ops.size(); i != e; ++i)
+ ID.AddPointer(Ops[i]);
+ void *IP = nullptr;
+ if (const SCEV *S = UniqueSCEVs.FindNodeOrInsertPos(ID, IP)) return S;
+ const SCEV **O = SCEVAllocator.Allocate<const SCEV *>(Ops.size());
+ std::uninitialized_copy(Ops.begin(), Ops.end(), O);
+- SCEV *S = new (SCEVAllocator) SCEVSMaxExpr(ID.Intern(SCEVAllocator),
+- O, Ops.size());
++ SCEV *S = nullptr;
++
++ if (Kind == scSMaxExpr) {
++ S = new (SCEVAllocator) SCEVSMaxExpr(ID.Intern(SCEVAllocator),
++ O, Ops.size());
++ } else if (Kind == scUMaxExpr) {
++ S = new (SCEVAllocator) SCEVUMaxExpr(ID.Intern(SCEVAllocator),
++ O, Ops.size());
++ } else if (Kind == scSMinExpr) {
++ S = new (SCEVAllocator) SCEVSMinExpr(ID.Intern(SCEVAllocator),
++ O, Ops.size());
++ } else {
++ assert(Kind == scUMinExpr);
++ S = new (SCEVAllocator) SCEVUMinExpr(ID.Intern(SCEVAllocator),
++ O, Ops.size());
++ }
++
+ UniqueSCEVs.InsertNode(S, IP);
+ addToLoopUseLists(S);
+ return S;
+ }
+
+-const SCEV *ScalarEvolution::getUMaxExpr(const SCEV *LHS,
++const SCEV *ScalarEvolution::getSMaxExpr(const SCEV *LHS,
+ const SCEV *RHS) {
+ SmallVector<const SCEV *, 2> Ops = {LHS, RHS};
+- return getUMaxExpr(Ops);
++ return getSMaxExpr(Ops);
+ }
+
+-const SCEV *
+-ScalarEvolution::getUMaxExpr(SmallVectorImpl<const SCEV *> &Ops) {
+- assert(!Ops.empty() && "Cannot get empty umax!");
+- if (Ops.size() == 1) return Ops[0];
+-#ifndef NDEBUG
+- Type *ETy = getEffectiveSCEVType(Ops[0]->getType());
+- for (unsigned i = 1, e = Ops.size(); i != e; ++i)
+- assert(getEffectiveSCEVType(Ops[i]->getType()) == ETy &&
+- "SCEVUMaxExpr operand types don't match!");
+-#endif
+-
+- // Sort by complexity, this groups all similar expression types together.
+- GroupByComplexity(Ops, &LI, DT);
+-
+- // If there are any constants, fold them together.
+- unsigned Idx = 0;
+- if (const SCEVConstant *LHSC = dyn_cast<SCEVConstant>(Ops[0])) {
+- ++Idx;
+- assert(Idx < Ops.size());
+- while (const SCEVConstant *RHSC = dyn_cast<SCEVConstant>(Ops[Idx])) {
+- // We found two constants, fold them together!
+- ConstantInt *Fold = ConstantInt::get(
+- getContext(), APIntOps::umax(LHSC->getAPInt(), RHSC->getAPInt()));
+- Ops[0] = getConstant(Fold);
+- Ops.erase(Ops.begin()+1); // Erase the folded element
+- if (Ops.size() == 1) return Ops[0];
+- LHSC = cast<SCEVConstant>(Ops[0]);
+- }
+-
+- // If we are left with a constant minimum-int, strip it off.
+- if (cast<SCEVConstant>(Ops[0])->getValue()->isMinValue(false)) {
+- Ops.erase(Ops.begin());
+- --Idx;
+- } else if (cast<SCEVConstant>(Ops[0])->getValue()->isMaxValue(false)) {
+- // If we have an umax with a constant maximum-int, it will always be
+- // maximum-int.
+- return Ops[0];
+- }
+-
+- if (Ops.size() == 1) return Ops[0];
+- }
+-
+- // Find the first UMax
+- while (Idx < Ops.size() && Ops[Idx]->getSCEVType() < scUMaxExpr)
+- ++Idx;
+-
+- // Check to see if one of the operands is a UMax. If so, expand its operands
+- // onto our operand list, and recurse to simplify.
+- if (Idx < Ops.size()) {
+- bool DeletedUMax = false;
+- while (const SCEVUMaxExpr *UMax = dyn_cast<SCEVUMaxExpr>(Ops[Idx])) {
+- Ops.erase(Ops.begin()+Idx);
+- Ops.append(UMax->op_begin(), UMax->op_end());
+- DeletedUMax = true;
+- }
+-
+- if (DeletedUMax)
+- return getUMaxExpr(Ops);
+- }
+-
+- // Okay, check to see if the same value occurs in the operand list twice. If
+- // so, delete one. Since we sorted the list, these values are required to
+- // be adjacent.
+- for (unsigned i = 0, e = Ops.size()-1; i != e; ++i)
+- // X umax Y umax Y --> X umax Y
+- // X umax Y --> X, if X is always greater than Y
+- if (Ops[i] == Ops[i+1] ||
+- isKnownPredicate(ICmpInst::ICMP_UGE, Ops[i], Ops[i+1])) {
+- Ops.erase(Ops.begin()+i+1, Ops.begin()+i+2);
+- --i; --e;
+- } else if (isKnownPredicate(ICmpInst::ICMP_ULE, Ops[i], Ops[i+1])) {
+- Ops.erase(Ops.begin()+i, Ops.begin()+i+1);
+- --i; --e;
+- }
+-
+- if (Ops.size() == 1) return Ops[0];
++const SCEV *ScalarEvolution::getSMaxExpr(SmallVectorImpl<const SCEV *> &Ops) {
++ return getUSMinMaxExpr(scSMaxExpr, Ops);
++}
+
+- assert(!Ops.empty() && "Reduced umax down to nothing!");
++const SCEV *ScalarEvolution::getUMaxExpr(const SCEV *LHS,
++ const SCEV *RHS) {
++ SmallVector<const SCEV *, 2> Ops = {LHS, RHS};
++ return getUMaxExpr(Ops);
++}
+
+- // Okay, it looks like we really DO need a umax expr. Check to see if we
+- // already have one, otherwise create a new one.
+- FoldingSetNodeID ID;
+- ID.AddInteger(scUMaxExpr);
+- for (unsigned i = 0, e = Ops.size(); i != e; ++i)
+- ID.AddPointer(Ops[i]);
+- void *IP = nullptr;
+- if (const SCEV *S = UniqueSCEVs.FindNodeOrInsertPos(ID, IP)) return S;
+- const SCEV **O = SCEVAllocator.Allocate<const SCEV *>(Ops.size());
+- std::uninitialized_copy(Ops.begin(), Ops.end(), O);
+- SCEV *S = new (SCEVAllocator) SCEVUMaxExpr(ID.Intern(SCEVAllocator),
+- O, Ops.size());
+- UniqueSCEVs.InsertNode(S, IP);
+- addToLoopUseLists(S);
+- return S;
++const SCEV *ScalarEvolution::getUMaxExpr(SmallVectorImpl<const SCEV *> &Ops) {
++ return getUSMinMaxExpr(scUMaxExpr, Ops);
+ }
+
+ const SCEV *ScalarEvolution::getSMinExpr(const SCEV *LHS,
+ const SCEV *RHS) {
+- // ~smax(~x, ~y) == smin(x, y).
+- return getNotSCEV(getSMaxExpr(getNotSCEV(LHS), getNotSCEV(RHS)));
++ SmallVector<const SCEV *, 2> Ops = { LHS, RHS };
++ return getSMinExpr(Ops);
++}
++
++const SCEV *ScalarEvolution::getSMinExpr(SmallVectorImpl<const SCEV *> &Ops) {
++ return getUSMinMaxExpr(scSMinExpr, Ops);
+ }
+
+ const SCEV *ScalarEvolution::getUMinExpr(const SCEV *LHS,
+ const SCEV *RHS) {
+- // ~umax(~x, ~y) == umin(x, y)
+- return getNotSCEV(getUMaxExpr(getNotSCEV(LHS), getNotSCEV(RHS)));
++ SmallVector<const SCEV *, 2> Ops = { LHS, RHS };
++ return getUMinExpr(Ops);
++}
++
++const SCEV *ScalarEvolution::getUMinExpr(SmallVectorImpl<const SCEV *> &Ops) {
++ return getUSMinMaxExpr(scUMinExpr, Ops);
+ }
+
+ const SCEV *ScalarEvolution::getSizeOfExpr(Type *IntTy, Type *AllocTy) {
+@@ -5002,6 +4976,7 @@ static bool IsAvailableOnEntry(const Loo
+ switch (S->getSCEVType()) {
+ case scConstant: case scTruncate: case scZeroExtend: case scSignExtend:
+ case scAddExpr: case scMulExpr: case scUMaxExpr: case scSMaxExpr:
++ case scUMinExpr: case scSMinExpr:
+ // These expressions are available if their operand(s) is/are.
+ return true;
+
+@@ -7885,7 +7860,9 @@ static Constant *BuildConstantFromSCEV(c
+ }
+ case scSMaxExpr:
+ case scUMaxExpr:
+- break; // TODO: smax, umax.
++ case scSMinExpr:
++ case scUMinExpr:
++ break; // TODO: smax, umax, smin, umax.
+ }
+ return nullptr;
+ }
+@@ -8015,6 +7992,10 @@ const SCEV *ScalarEvolution::computeSCEV
+ return getSMaxExpr(NewOps);
+ if (isa<SCEVUMaxExpr>(Comm))
+ return getUMaxExpr(NewOps);
++ if (isa<SCEVSMinExpr>(Comm))
++ return getSMinExpr(NewOps);
++ if (isa<SCEVUMinExpr>(Comm))
++ return getUMinExpr(NewOps);
+ llvm_unreachable("Unknown commutative SCEV type!");
+ }
+ }
+@@ -10998,7 +10979,9 @@ ScalarEvolution::computeLoopDisposition(
+ case scAddExpr:
+ case scMulExpr:
+ case scUMaxExpr:
+- case scSMaxExpr: {
++ case scSMaxExpr:
++ case scUMinExpr:
++ case scSMinExpr: {
+ bool HasVarying = false;
+ for (auto *Op : cast<SCEVNAryExpr>(S)->operands()) {
+ LoopDisposition D = getLoopDisposition(Op, L);
+@@ -11085,7 +11068,9 @@ ScalarEvolution::computeBlockDisposition
+ case scAddExpr:
+ case scMulExpr:
+ case scUMaxExpr:
+- case scSMaxExpr: {
++ case scSMaxExpr:
++ case scUMinExpr:
++ case scSMinExpr: {
+ const SCEVNAryExpr *NAry = cast<SCEVNAryExpr>(S);
+ bool Proper = true;
+ for (const SCEV *NAryOp : NAry->operands()) {
+Index: llvm-toolchain-6.0-6.0.1/lib/Analysis/ScalarEvolutionExpander.cpp
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/Analysis/ScalarEvolutionExpander.cpp
++++ llvm-toolchain-6.0-6.0.1/lib/Analysis/ScalarEvolutionExpander.cpp
+@@ -1629,14 +1629,15 @@ Value *SCEVExpander::visitSMaxExpr(const
+ for (int i = S->getNumOperands()-2; i >= 0; --i) {
+ // In the case of mixed integer and pointer types, do the
+ // rest of the comparisons as integer.
+- if (S->getOperand(i)->getType() != Ty) {
++ Type *OpTy = S->getOperand(i)->getType();
++ if (OpTy->isIntegerTy() != Ty->isIntegerTy()) {
+ Ty = SE.getEffectiveSCEVType(Ty);
+ LHS = InsertNoopCastOfTo(LHS, Ty);
+ }
+ Value *RHS = expandCodeFor(S->getOperand(i), Ty);
+ Value *ICmp = Builder.CreateICmpSGT(LHS, RHS);
+ rememberInstruction(ICmp);
+- Value *Sel = Builder.CreateSelect(ICmp, LHS, RHS, "smax");
++ Value *Sel = Builder.CreateSelect(ICmp, LHS, RHS, "smin");
+ rememberInstruction(Sel);
+ LHS = Sel;
+ }
+@@ -1653,13 +1654,64 @@ Value *SCEVExpander::visitUMaxExpr(const
+ for (int i = S->getNumOperands()-2; i >= 0; --i) {
+ // In the case of mixed integer and pointer types, do the
+ // rest of the comparisons as integer.
+- if (S->getOperand(i)->getType() != Ty) {
++ Type *OpTy = S->getOperand(i)->getType();
++ if (OpTy->isIntegerTy() != Ty->isIntegerTy()) {
+ Ty = SE.getEffectiveSCEVType(Ty);
+ LHS = InsertNoopCastOfTo(LHS, Ty);
+ }
+ Value *RHS = expandCodeFor(S->getOperand(i), Ty);
+ Value *ICmp = Builder.CreateICmpUGT(LHS, RHS);
+ rememberInstruction(ICmp);
++ Value *Sel = Builder.CreateSelect(ICmp, LHS, RHS, "umin");
++ rememberInstruction(Sel);
++ LHS = Sel;
++ }
++ // In the case of mixed integer and pointer types, cast the
++ // final result back to the pointer type.
++ if (LHS->getType() != S->getType())
++ LHS = InsertNoopCastOfTo(LHS, S->getType());
++ return LHS;
++}
++
++Value *SCEVExpander::visitSMinExpr(const SCEVSMinExpr *S) {
++ Value *LHS = expand(S->getOperand(S->getNumOperands()-1));
++ Type *Ty = LHS->getType();
++ for (int i = S->getNumOperands()-2; i >= 0; --i) {
++ // In the case of mixed integer and pointer types, do the
++ // rest of the comparisons as integer.
++ Type *OpTy = S->getOperand(i)->getType();
++ if (OpTy->isIntegerTy() != Ty->isIntegerTy()) {
++ Ty = SE.getEffectiveSCEVType(Ty);
++ LHS = InsertNoopCastOfTo(LHS, Ty);
++ }
++ Value *RHS = expandCodeFor(S->getOperand(i), Ty);
++ Value *ICmp = Builder.CreateICmpSLT(LHS, RHS);
++ rememberInstruction(ICmp);
++ Value *Sel = Builder.CreateSelect(ICmp, LHS, RHS, "smax");
++ rememberInstruction(Sel);
++ LHS = Sel;
++ }
++ // In the case of mixed integer and pointer types, cast the
++ // final result back to the pointer type.
++ if (LHS->getType() != S->getType())
++ LHS = InsertNoopCastOfTo(LHS, S->getType());
++ return LHS;
++}
++
++Value *SCEVExpander::visitUMinExpr(const SCEVUMinExpr *S) {
++ Value *LHS = expand(S->getOperand(S->getNumOperands()-1));
++ Type *Ty = LHS->getType();
++ for (int i = S->getNumOperands()-2; i >= 0; --i) {
++ // In the case of mixed integer and pointer types, do the
++ // rest of the comparisons as integer.
++ Type *OpTy = S->getOperand(i)->getType();
++ if (OpTy->isIntegerTy() != Ty->isIntegerTy()) {
++ Ty = SE.getEffectiveSCEVType(Ty);
++ LHS = InsertNoopCastOfTo(LHS, Ty);
++ }
++ Value *RHS = expandCodeFor(S->getOperand(i), Ty);
++ Value *ICmp = Builder.CreateICmpULT(LHS, RHS);
++ rememberInstruction(ICmp);
+ Value *Sel = Builder.CreateSelect(ICmp, LHS, RHS, "umax");
+ rememberInstruction(Sel);
+ LHS = Sel;
+Index: llvm-toolchain-6.0-6.0.1/test/Analysis/LoopAccessAnalysis/memcheck-ni.ll
+===================================================================
+--- /dev/null
++++ llvm-toolchain-6.0-6.0.1/test/Analysis/LoopAccessAnalysis/memcheck-ni.ll
+@@ -0,0 +1,50 @@
++; RUN: opt -loop-versioning -S < %s | FileCheck %s
++
++; NB: addrspaces 10-13 are non-integral
++target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:10:11:12:13"
++
++%jl_value_t = type opaque
++%jl_array_t = type { i8 addrspace(13)*, i64, i16, i16, i32 }
++
++define void @"japi1_permutedims!_33509"(%jl_value_t addrspace(10)**) {
++; CHECK: [[CMP:%[^ ]*]] = icmp ult double addrspace(13)* [[A:%[^ ]*]], [[B:%[^ ]*]]
++; CHECK: [[SELECT:%[^ ]*]] = select i1 %18, double addrspace(13)* [[A]], double addrspace(13)* [[B]]
++top:
++ %1 = alloca [3 x i64], align 8
++ %2 = load %jl_value_t addrspace(10)*, %jl_value_t addrspace(10)** %0, align 8
++ %3 = getelementptr inbounds %jl_value_t addrspace(10)*, %jl_value_t addrspace(10)** %0, i64 1
++ %4 = load %jl_value_t addrspace(10)*, %jl_value_t addrspace(10)** %3, align 8
++ %5 = getelementptr inbounds [3 x i64], [3 x i64]* %1, i64 0, i64 0
++ store i64 1, i64* %5, align 8
++ %6 = getelementptr inbounds [3 x i64], [3 x i64]* %1, i64 0, i64 1
++ %7 = load i64, i64* inttoptr (i64 24 to i64*), align 8
++ %8 = addrspacecast %jl_value_t addrspace(10)* %4 to %jl_value_t addrspace(11)*
++ %9 = bitcast %jl_value_t addrspace(11)* %8 to double addrspace(13)* addrspace(11)*
++ %10 = load double addrspace(13)*, double addrspace(13)* addrspace(11)* %9, align 8
++ %11 = addrspacecast %jl_value_t addrspace(10)* %2 to %jl_value_t addrspace(11)*
++ %12 = bitcast %jl_value_t addrspace(11)* %11 to double addrspace(13)* addrspace(11)*
++ %13 = load double addrspace(13)*, double addrspace(13)* addrspace(11)* %12, align 8
++ %14 = load i64, i64* %6, align 8
++ br label %L74
++
++L74:
++ %value_phi20 = phi i64 [ 1, %top ], [ %22, %L74 ]
++ %value_phi21 = phi i64 [ 1, %top ], [ %23, %L74 ]
++ %value_phi22 = phi i64 [ 1, %top ], [ %25, %L74 ]
++ %15 = add i64 %value_phi21, -1
++ %16 = getelementptr inbounds double, double addrspace(13)* %10, i64 %15
++ %17 = bitcast double addrspace(13)* %16 to i64 addrspace(13)*
++ %18 = load i64, i64 addrspace(13)* %17, align 8
++ %19 = add i64 %value_phi20, -1
++ %20 = getelementptr inbounds double, double addrspace(13)* %13, i64 %19
++ %21 = bitcast double addrspace(13)* %20 to i64 addrspace(13)*
++ store i64 %18, i64 addrspace(13)* %21, align 8
++ %22 = add i64 %value_phi20, 1
++ %23 = add i64 %14, %value_phi21
++ %24 = icmp eq i64 %value_phi22, %7
++ %25 = add i64 %value_phi22, 1
++ br i1 %24, label %L94, label %L74
++
++L94:
++ ret void
++}
+Index: llvm-toolchain-6.0-6.0.1/test/Analysis/LoopAccessAnalysis/reverse-memcheck-bounds.ll
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/test/Analysis/LoopAccessAnalysis/reverse-memcheck-bounds.ll
++++ llvm-toolchain-6.0-6.0.1/test/Analysis/LoopAccessAnalysis/reverse-memcheck-bounds.ll
+@@ -58,7 +58,7 @@ for.end:
+
+ ; Here it is not obvious what the limits are, since 'step' could be negative.
+
+-; CHECK: Low: (-1 + (-1 * ((-60001 + (-1 * %a)) umax (-60001 + (40000 * %step) + (-1 * %a)))))
++; CHECK: Low: ((60000 + %a)<nsw> umin (60000 + (-40000 * %step) + %a))
+ ; CHECK: High: (4 + ((60000 + %a)<nsw> umax (60000 + (-40000 * %step) + %a)))
+
+ define void @g(i64 %step) {
+Index: llvm-toolchain-6.0-6.0.1/test/Analysis/ScalarEvolution/2008-07-29-SMinExpr.ll
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/test/Analysis/ScalarEvolution/2008-07-29-SMinExpr.ll
++++ llvm-toolchain-6.0-6.0.1/test/Analysis/ScalarEvolution/2008-07-29-SMinExpr.ll
+@@ -22,5 +22,5 @@ afterfor: ; preds = %forinc, %entry
+ ret i32 %j.0.lcssa
+ }
+
+-; CHECK: backedge-taken count is (-2147483632 + ((-1 + (-1 * %{{[xy]}})) smax (-1 + (-1 * %{{[xy]}}))))
++; CHECK: backedge-taken count is (-2147483633 + (-1 * (%x smin %y)))
+
+Index: llvm-toolchain-6.0-6.0.1/test/Analysis/ScalarEvolution/min-max-exprs.ll
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/test/Analysis/ScalarEvolution/min-max-exprs.ll
++++ llvm-toolchain-6.0-6.0.1/test/Analysis/ScalarEvolution/min-max-exprs.ll
+@@ -33,7 +33,7 @@ bb2:
+ %tmp9 = select i1 %tmp4, i64 %tmp5, i64 %tmp6
+ ; min(N, i+3)
+ ; CHECK: select i1 %tmp4, i64 %tmp5, i64 %tmp6
+-; CHECK-NEXT: --> (-1 + (-1 * ((-1 + (-1 * (sext i32 {3,+,1}<nuw><%bb1> to i64))<nsw>)<nsw> smax (-1 + (-1 * (sext i32 %N to i64))<nsw>)<nsw>))<nsw>)<nsw>
++; CHECK-NEXT: --> ((sext i32 {3,+,1}<nuw><%bb1> to i64) smin (sext i32 %N to i64))
+ %tmp11 = getelementptr inbounds i32, i32* %A, i64 %tmp9
+ %tmp12 = load i32, i32* %tmp11, align 4
+ %tmp13 = shl nsw i32 %tmp12, 1
+Index: llvm-toolchain-6.0-6.0.1/test/Analysis/ScalarEvolution/pr28705.ll
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/test/Analysis/ScalarEvolution/pr28705.ll
++++ llvm-toolchain-6.0-6.0.1/test/Analysis/ScalarEvolution/pr28705.ll
+@@ -5,7 +5,7 @@
+ ; with "%.sroa.speculated + 1".
+ ;
+ ; CHECK-LABEL: @foo(
+-; CHECK: %[[EXIT:.+]] = sub i32 %.sroa.speculated, -1
++; CHECK: %[[EXIT:.+]] = add i32 %.sroa.speculated, 1
+ ; CHECK: %DB.sroa.9.0.lcssa = phi i32 [ 1, %entry ], [ %[[EXIT]], %loopexit ]
+ ;
+ define void @foo(i32 %sub.ptr.div.i, i8* %ref.i1174) local_unnamed_addr {
+Index: llvm-toolchain-6.0-6.0.1/test/Analysis/ScalarEvolution/predicated-trip-count.ll
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/test/Analysis/ScalarEvolution/predicated-trip-count.ll
++++ llvm-toolchain-6.0-6.0.1/test/Analysis/ScalarEvolution/predicated-trip-count.ll
+@@ -80,7 +80,7 @@ return: ; preds = %bb5
+ ; CHECK-NEXT: --> (sext i16 {%Start,+,-1}<%bb3> to i32)
+ ; CHECK: Loop %bb3: Unpredictable backedge-taken count.
+ ; CHECK-NEXT: Loop %bb3: Unpredictable max backedge-taken count.
+-; CHECK-NEXT: Loop %bb3: Predicated backedge-taken count is (2 + (sext i16 %Start to i32) + ((-2 + (-1 * (sext i16 %Start to i32))) smax (-1 + (-1 * %M))))
++; CHECK-NEXT: Loop %bb3: Predicated backedge-taken count is (1 + (sext i16 %Start to i32) + (-1 * ((1 + (sext i16 %Start to i32))<nsw> smin %M)))
+ ; CHECK-NEXT: Predicates:
+ ; CHECK-NEXT: {%Start,+,-1}<%bb3> Added Flags: <nssw>
+
+Index: llvm-toolchain-6.0-6.0.1/test/Analysis/ScalarEvolution/trip-count3.ll
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/test/Analysis/ScalarEvolution/trip-count3.ll
++++ llvm-toolchain-6.0-6.0.1/test/Analysis/ScalarEvolution/trip-count3.ll
+@@ -4,7 +4,7 @@
+ ; dividing by the stride will have a remainder. This could theoretically
+ ; be teaching it how to use a more elaborate trip count computation.
+
+-; CHECK: Loop %bb3.i: backedge-taken count is ((64 + (-64 smax (-1 + (-1 * %0))) + %0) /u 64)
++; CHECK: Loop %bb3.i: backedge-taken count is ((63 + (-1 * (63 smin %0)) + %0) /u 64)
+ ; CHECK: Loop %bb3.i: max backedge-taken count is 33554431
+
+ %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i64, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i64, i32, [20 x i8] }
+Index: llvm-toolchain-6.0-6.0.1/test/Transforms/IRCE/conjunctive-checks.ll
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/test/Transforms/IRCE/conjunctive-checks.ll
++++ llvm-toolchain-6.0-6.0.1/test/Transforms/IRCE/conjunctive-checks.ll
+@@ -4,16 +4,6 @@ define void @f_0(i32 *%arr, i32 *%a_len_
+ ; CHECK-LABEL: @f_0(
+
+ ; CHECK: loop.preheader:
+-; CHECK: [[not_n:[^ ]+]] = sub i32 -1, %n
+-; CHECK: [[not_safe_range_end:[^ ]+]] = sub i32 3, %len
+-; CHECK: [[not_exit_main_loop_at_hiclamp_cmp:[^ ]+]] = icmp sgt i32 [[not_n]], [[not_safe_range_end]]
+-; CHECK: [[not_exit_main_loop_at_hiclamp:[^ ]+]] = select i1 [[not_exit_main_loop_at_hiclamp_cmp]], i32 [[not_n]], i32 [[not_safe_range_end]]
+-; CHECK: [[exit_main_loop_at_hiclamp:[^ ]+]] = sub i32 -1, [[not_exit_main_loop_at_hiclamp]]
+-; CHECK: [[exit_main_loop_at_loclamp_cmp:[^ ]+]] = icmp sgt i32 [[exit_main_loop_at_hiclamp]], 0
+-; CHECK: [[exit_main_loop_at_loclamp:[^ ]+]] = select i1 [[exit_main_loop_at_loclamp_cmp]], i32 [[exit_main_loop_at_hiclamp]], i32 0
+-; CHECK: [[enter_main_loop:[^ ]+]] = icmp slt i32 0, [[exit_main_loop_at_loclamp]]
+-; CHECK: br i1 [[enter_main_loop]], label %loop.preheader2, label %main.pseudo.exit
+-
+ ; CHECK: loop.preheader2:
+ ; CHECK: br label %loop
+
+@@ -57,14 +47,10 @@ define void @f_1(
+ ; CHECK-LABEL: @f_1(
+
+ ; CHECK: loop.preheader:
+-; CHECK: [[not_len_b:[^ ]+]] = sub i32 -1, %len.b
+-; CHECK: [[not_len_a:[^ ]+]] = sub i32 -1, %len.a
+-; CHECK: [[smax_not_len_cond:[^ ]+]] = icmp sgt i32 [[not_len_b]], [[not_len_a]]
+-; CHECK: [[smax_not_len:[^ ]+]] = select i1 [[smax_not_len_cond]], i32 [[not_len_b]], i32 [[not_len_a]]
+-; CHECK: [[not_n:[^ ]+]] = sub i32 -1, %n
+-; CHECK: [[not_upper_limit_cond_loclamp:[^ ]+]] = icmp sgt i32 [[smax_not_len]], [[not_n]]
+-; CHECK: [[not_upper_limit_loclamp:[^ ]+]] = select i1 [[not_upper_limit_cond_loclamp]], i32 [[smax_not_len]], i32 [[not_n]]
+-; CHECK: [[upper_limit_loclamp:[^ ]+]] = sub i32 -1, [[not_upper_limit_loclamp]]
++; CHECK: [[smax_len_cond:[^ ]+]] = icmp slt i32 %len.b, %len.a
++; CHECK: [[smax_len:[^ ]+]] = select i1 [[smax_len_cond]], i32 %len.b, i32 %len.a
++; CHECK: [[upper_limit_cond_loclamp:[^ ]+]] = icmp slt i32 [[smax_len]], %n
++; CHECK: [[upper_limit_loclamp:[^ ]+]] = select i1 [[upper_limit_cond_loclamp]], i32 [[smax_len]], i32 %n
+ ; CHECK: [[upper_limit_cmp:[^ ]+]] = icmp sgt i32 [[upper_limit_loclamp]], 0
+ ; CHECK: [[upper_limit:[^ ]+]] = select i1 [[upper_limit_cmp]], i32 [[upper_limit_loclamp]], i32 0
+
+Index: llvm-toolchain-6.0-6.0.1/test/Transforms/IRCE/decrementing-loop.ll
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/test/Transforms/IRCE/decrementing-loop.ll
++++ llvm-toolchain-6.0-6.0.1/test/Transforms/IRCE/decrementing-loop.ll
+@@ -28,11 +28,8 @@ define void @decrementing_loop(i32 *%arr
+ ret void
+
+ ; CHECK: loop.preheader:
+-; CHECK: [[not_len:[^ ]+]] = sub i32 -1, %len
+-; CHECK: [[not_n:[^ ]+]] = sub i32 -1, %n
+-; CHECK: [[not_len_hiclamp_cmp:[^ ]+]] = icmp sgt i32 [[not_len]], [[not_n]]
+-; CHECK: [[not_len_hiclamp:[^ ]+]] = select i1 [[not_len_hiclamp_cmp]], i32 [[not_len]], i32 [[not_n]]
+-; CHECK: [[len_hiclamp:[^ ]+]] = sub i32 -1, [[not_len_hiclamp]]
++; CHECK: [[len_hiclamp_cmp:[^ ]+]] = icmp slt i32 %len, %n
++; CHECK: [[len_hiclamp:[^ ]+]] = select i1 [[len_hiclamp_cmp]], i32 %len, i32 %n
+ ; CHECK: [[not_exit_preloop_at_cmp:[^ ]+]] = icmp sgt i32 [[len_hiclamp]], 0
+ ; CHECK: [[not_exit_preloop_at:[^ ]+]] = select i1 [[not_exit_preloop_at_cmp]], i32 [[len_hiclamp]], i32 0
+ ; CHECK: %exit.preloop.at = add i32 [[not_exit_preloop_at]], -1
+Index: llvm-toolchain-6.0-6.0.1/test/Transforms/IRCE/multiple-access-no-preloop.ll
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/test/Transforms/IRCE/multiple-access-no-preloop.ll
++++ llvm-toolchain-6.0-6.0.1/test/Transforms/IRCE/multiple-access-no-preloop.ll
+@@ -37,14 +37,10 @@ define void @multiple_access_no_preloop(
+ ; CHECK-LABEL: @multiple_access_no_preloop(
+
+ ; CHECK: loop.preheader:
+-; CHECK: [[not_len_b:[^ ]+]] = sub i32 -1, %len.b
+-; CHECK: [[not_len_a:[^ ]+]] = sub i32 -1, %len.a
+-; CHECK: [[smax_not_len_cond:[^ ]+]] = icmp sgt i32 [[not_len_b]], [[not_len_a]]
+-; CHECK: [[smax_not_len:[^ ]+]] = select i1 [[smax_not_len_cond]], i32 [[not_len_b]], i32 [[not_len_a]]
+-; CHECK: [[not_n:[^ ]+]] = sub i32 -1, %n
+-; CHECK: [[not_upper_limit_cond_loclamp:[^ ]+]] = icmp sgt i32 [[smax_not_len]], [[not_n]]
+-; CHECK: [[not_upper_limit_loclamp:[^ ]+]] = select i1 [[not_upper_limit_cond_loclamp]], i32 [[smax_not_len]], i32 [[not_n]]
+-; CHECK: [[upper_limit_loclamp:[^ ]+]] = sub i32 -1, [[not_upper_limit_loclamp]]
++; CHECK: [[smax_len_cond:[^ ]+]] = icmp slt i32 %len.b, %len.a
++; CHECK: [[smax_len:[^ ]+]] = select i1 [[smax_len_cond]], i32 %len.b, i32 %len.a
++; CHECK: [[upper_limit_cond_loclamp:[^ ]+]] = icmp slt i32 [[smax_len]], %n
++; CHECK: [[upper_limit_loclamp:[^ ]+]] = select i1 [[upper_limit_cond_loclamp]], i32 [[smax_len]], i32 %n
+ ; CHECK: [[upper_limit_cmp:[^ ]+]] = icmp sgt i32 [[upper_limit_loclamp]], 0
+ ; CHECK: [[upper_limit:[^ ]+]] = select i1 [[upper_limit_cmp]], i32 [[upper_limit_loclamp]], i32 0
+
+Index: llvm-toolchain-6.0-6.0.1/test/Transforms/IRCE/ranges_of_different_types.ll
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/test/Transforms/IRCE/ranges_of_different_types.ll
++++ llvm-toolchain-6.0-6.0.1/test/Transforms/IRCE/ranges_of_different_types.ll
+@@ -22,12 +22,11 @@ define void @test_01(i32* %arr, i32* %a_
+ ; CHECK-NOT: preloop
+ ; CHECK: entry:
+ ; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0
+-; CHECK-NEXT: [[SUB1:%[^ ]+]] = sub i32 12, %len
+-; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp sgt i32 [[SUB1]], -102
+-; CHECK-NEXT: [[SMAX:%[^ ]+]] = select i1 [[CMP1]], i32 [[SUB1]], i32 -102
+-; CHECK-NEXT: [[SUB2:%[^ ]+]] = sub i32 -1, [[SMAX]]
+-; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp sgt i32 [[SUB2]], 0
+-; CHECK-NEXT: %exit.mainloop.at = select i1 [[CMP2]], i32 [[SUB2]], i32 0
++; CHECK-NEXT: [[SUB1:%[^ ]+]] = add i32 %len, -13
++; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp slt i32 [[SUB1]], 101
++; CHECK-NEXT: [[SMAX:%[^ ]+]] = select i1 [[CMP1]], i32 [[SUB1]], i32 101
++; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp sgt i32 [[SMAX]], 0
++; CHECK-NEXT: %exit.mainloop.at = select i1 [[CMP2]], i32 [[SMAX]], i32 0
+ ; CHECK-NEXT: [[GOTO_LOOP:%[^ ]+]] = icmp slt i32 0, %exit.mainloop.at
+ ; CHECK-NEXT: br i1 [[GOTO_LOOP]], label %loop.preheader, label %main.pseudo.exit
+ ; CHECK: loop
+@@ -82,13 +81,11 @@ define void @test_02(i32* %arr, i32* %a_
+ ; CHECK-NEXT: [[LEN_MINUS_SMAX:%[^ ]+]] = add i32 %len, -2147483647
+ ; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp sgt i32 [[LEN_MINUS_SMAX]], -13
+ ; CHECK-NEXT: [[SMAX1:%[^ ]+]] = select i1 [[CMP1]], i32 [[LEN_MINUS_SMAX]], i32 -13
+-; CHECK-NEXT: [[ADD1:%[^ ]+]] = add i32 [[SMAX1]], -1
+-; CHECK-NEXT: [[SUB1:%[^ ]+]] = sub i32 [[ADD1]], %len
+-; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp sgt i32 [[SUB1]], -102
+-; CHECK-NEXT: [[SMAX2:%[^ ]+]] = select i1 [[CMP2]], i32 [[SUB1]], i32 -102
+-; CHECK-NEXT: [[SUB2:%[^ ]+]] = sub i32 -1, [[SMAX2]]
+-; CHECK-NEXT: [[CMP3:%[^ ]+]] = icmp sgt i32 [[SUB2]], 0
+-; CHECK-NEXT: %exit.mainloop.at = select i1 [[CMP3]], i32 [[SUB2]], i32 0
++; CHECK-NEXT: [[SUB1:%[^ ]+]] = sub i32 %len, [[SMAX1]]
++; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp slt i32 [[SUB1]], 101
++; CHECK-NEXT: [[SMAX2:%[^ ]+]] = select i1 [[CMP2]], i32 [[SUB1]], i32 101
++; CHECK-NEXT: [[CMP3:%[^ ]+]] = icmp sgt i32 [[SMAX2]], 0
++; CHECK-NEXT: %exit.mainloop.at = select i1 [[CMP3]], i32 [[SMAX2]], i32 0
+ ; CHECK-NEXT: br i1 true, label %loop.preloop.preheader
+ ; CHECK: loop.preloop:
+ ; CHECK-NEXT: %idx.preloop = phi i32 [ %idx.next.preloop, %in.bounds.preloop ], [ 0, %loop.preloop.preheader ]
+@@ -150,14 +147,11 @@ define void @test_03(i32* %arr, i32* %a_
+ ; CHECK-NOT: preloop
+ ; CHECK: entry:
+ ; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0
+-; CHECK-NEXT: [[SUB1:%[^ ]+]] = sub i32 -2, %len
+-; CHECK-NEXT: [[SUB2:%[^ ]+]] = sub i32 -1, %len
+-; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp sgt i32 [[SUB2]], -14
+-; CHECK-NEXT: [[SMAX1:%[^ ]+]] = select i1 [[CMP1]], i32 [[SUB2]], i32 -14
+-; CHECK-NEXT: [[SUB3:%[^ ]+]] = sub i32 [[SUB1]], [[SMAX1]]
+-; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp ugt i32 [[SUB3]], -102
+-; CHECK-NEXT: [[UMAX1:%[^ ]+]] = select i1 [[CMP2]], i32 [[SUB3]], i32 -102
+-; CHECK-NEXT: %exit.mainloop.at = sub i32 -1, [[UMAX1]]
++; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp slt i32 %len, 13
++; CHECK-NEXT: [[SMAX1:%[^ ]+]] = select i1 [[CMP1]], i32 %len, i32 13
++; CHECK-NEXT: [[SUB3:%[^ ]+]] = sub i32 %len, [[SMAX1]]
++; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp ult i32 [[SUB3]], 101
++; CHECK-NEXT: %exit.mainloop.at = select i1 [[CMP2]], i32 [[SUB3]], i32 101
+ ; CHECK-NEXT: [[CMP3:%[^ ]+]] = icmp ult i32 0, %exit.mainloop.at
+ ; CHECK-NEXT: br i1 [[CMP3]], label %loop.preheader, label %main.pseudo.exit
+ ; CHECK: postloop:
+@@ -207,10 +201,9 @@ define void @test_04(i32* %arr, i32* %a_
+ ; CHECK-LABEL: test_04(
+ ; CHECK: entry:
+ ; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0
+-; CHECK-NEXT: [[SUB1:%[^ ]+]] = sub i32 -14, %len
+-; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp ugt i32 [[SUB1]], -102
+-; CHECK-NEXT: [[UMAX1:%[^ ]+]] = select i1 [[CMP1]], i32 [[SUB1]], i32 -102
+-; CHECK-NEXT: %exit.mainloop.at = sub i32 -1, [[UMAX1]]
++; CHECK-NEXT: [[SUB1:%[^ ]+]] = add i32 %len, 13
++; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp ult i32 [[SUB1]], 101
++; CHECK-NEXT: %exit.mainloop.at = select i1 [[CMP1]], i32 [[SUB1]], i32 101
+ ; CHECK-NEXT: br i1 true, label %loop.preloop.preheader
+ ; CHECK: in.bounds.preloop:
+ ; CHECK-NEXT: %addr.preloop = getelementptr i32, i32* %arr, i32 %idx.preloop
+@@ -251,12 +244,11 @@ define void @test_05(i32* %arr, i32* %a_
+ ; CHECK-NOT: preloop
+ ; CHECK: entry:
+ ; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0
+-; CHECK-NEXT: [[SUB1:%[^ ]+]] = sub i32 12, %len
+-; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp sgt i32 [[SUB1]], -102
+-; CHECK-NEXT: [[SMAX:%[^ ]+]] = select i1 [[CMP1]], i32 [[SUB1]], i32 -102
+-; CHECK-NEXT: [[SUB2:%[^ ]+]] = sub i32 -1, [[SMAX]]
+-; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp sgt i32 [[SUB2]], 0
+-; CHECK-NEXT: %exit.mainloop.at = select i1 [[CMP2]], i32 [[SUB2]], i32 0
++; CHECK-NEXT: [[SUB1:%[^ ]+]] = add i32 %len, -13
++; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp slt i32 [[SUB1]], 101
++; CHECK-NEXT: [[SMAX:%[^ ]+]] = select i1 [[CMP1]], i32 [[SUB1]], i32 101
++; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp sgt i32 [[SMAX]], 0
++; CHECK-NEXT: %exit.mainloop.at = select i1 [[CMP2]], i32 [[SMAX]], i32 0
+ ; CHECK-NEXT: [[GOTO_LOOP:%[^ ]+]] = icmp slt i32 0, %exit.mainloop.at
+ ; CHECK-NEXT: br i1 [[GOTO_LOOP]], label %loop.preheader, label %main.pseudo.exit
+ ; CHECK: loop
+@@ -296,13 +288,11 @@ define void @test_06(i32* %arr, i32* %a_
+ ; CHECK-NEXT: [[LEN_MINUS_SMAX:%[^ ]+]] = add i32 %len, -2147483647
+ ; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp sgt i32 [[LEN_MINUS_SMAX]], -13
+ ; CHECK-NEXT: [[SMAX1:%[^ ]+]] = select i1 [[CMP1]], i32 [[LEN_MINUS_SMAX]], i32 -13
+-; CHECK-NEXT: [[ADD1:%[^ ]+]] = add i32 [[SMAX1]], -1
+-; CHECK-NEXT: [[SUB1:%[^ ]+]] = sub i32 [[ADD1]], %len
+-; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp sgt i32 [[SUB1]], -102
+-; CHECK-NEXT: [[SMAX2:%[^ ]+]] = select i1 [[CMP2]], i32 [[SUB1]], i32 -102
+-; CHECK-NEXT: [[SUB2:%[^ ]+]] = sub i32 -1, [[SMAX2]]
+-; CHECK-NEXT: [[CMP3:%[^ ]+]] = icmp sgt i32 [[SUB2]], 0
+-; CHECK-NEXT: %exit.mainloop.at = select i1 [[CMP3]], i32 [[SUB2]], i32 0
++; CHECK-NEXT: [[SUB1:%[^ ]+]] = sub i32 %len, [[SMAX1]]
++; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp slt i32 [[SUB1]], 101
++; CHECK-NEXT: [[SMAX2:%[^ ]+]] = select i1 [[CMP2]], i32 [[SUB1]], i32 101
++; CHECK-NEXT: [[CMP3:%[^ ]+]] = icmp sgt i32 [[SMAX2]], 0
++; CHECK-NEXT: %exit.mainloop.at = select i1 [[CMP3]], i32 [[SMAX2]], i32 0
+ ; CHECK-NEXT: br i1 true, label %loop.preloop.preheader
+ ; CHECK: in.bounds.preloop:
+ ; CHECK-NEXT: %addr.preloop = getelementptr i32, i32* %arr, i32 %idx.preloop
+@@ -343,14 +333,11 @@ define void @test_07(i32* %arr, i32* %a_
+ ; CHECK-NOT: preloop
+ ; CHECK: entry:
+ ; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0
+-; CHECK-NEXT: [[SUB1:%[^ ]+]] = sub i32 -2, %len
+-; CHECK-NEXT: [[SUB2:%[^ ]+]] = sub i32 -1, %len
+-; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp sgt i32 [[SUB2]], -14
+-; CHECK-NEXT: [[SMAX1:%[^ ]+]] = select i1 [[CMP1]], i32 [[SUB2]], i32 -14
+-; CHECK-NEXT: [[SUB3:%[^ ]+]] = sub i32 [[SUB1]], [[SMAX1]]
+-; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp ugt i32 [[SUB3]], -102
+-; CHECK-NEXT: [[UMAX1:%[^ ]+]] = select i1 [[CMP2]], i32 [[SUB3]], i32 -102
+-; CHECK-NEXT: %exit.mainloop.at = sub i32 -1, [[UMAX1]]
++; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp slt i32 %len, 13
++; CHECK-NEXT: [[SMAX1:%[^ ]+]] = select i1 [[CMP1]], i32 %len, i32 13
++; CHECK-NEXT: [[SUB3:%[^ ]+]] = sub i32 %len, [[SMAX1]]
++; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp ult i32 [[SUB3]], 101
++; CHECK-NEXT: %exit.mainloop.at = select i1 [[CMP2]], i32 [[SUB3]], i32 101
+ ; CHECK-NEXT: [[CMP3:%[^ ]+]] = icmp ult i32 0, %exit.mainloop.at
+ ; CHECK-NEXT: br i1 [[CMP3]], label %loop.preheader, label %main.pseudo.exit
+ ; CHECK: loop
+@@ -387,10 +374,9 @@ define void @test_08(i32* %arr, i32* %a_
+ ; CHECK-LABEL: test_08(
+ ; CHECK: entry:
+ ; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0
+-; CHECK-NEXT: [[SUB1:%[^ ]+]] = sub i32 -14, %len
+-; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp ugt i32 [[SUB1]], -102
+-; CHECK-NEXT: [[UMAX1:%[^ ]+]] = select i1 [[CMP1]], i32 [[SUB1]], i32 -102
+-; CHECK-NEXT: %exit.mainloop.at = sub i32 -1, [[UMAX1]]
++; CHECK-NEXT: [[SUB1:%[^ ]+]] = add i32 %len, 13
++; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp ult i32 [[SUB1]], 101
++; CHECK-NEXT: %exit.mainloop.at = select i1 [[CMP1]], i32 [[SUB1]], i32 101
+ ; CHECK-NEXT: br i1 true, label %loop.preloop.preheader
+ ; CHECK: in.bounds.preloop:
+ ; CHECK-NEXT: %addr.preloop = getelementptr i32, i32* %arr, i32 %idx.preloop
+Index: llvm-toolchain-6.0-6.0.1/test/Transforms/IRCE/single-access-no-preloop.ll
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/test/Transforms/IRCE/single-access-no-preloop.ll
++++ llvm-toolchain-6.0-6.0.1/test/Transforms/IRCE/single-access-no-preloop.ll
+@@ -85,11 +85,9 @@ define void @single_access_no_preloop_wi
+ ; CHECK-LABEL: @single_access_no_preloop_with_offset(
+
+ ; CHECK: loop.preheader:
+-; CHECK: [[not_n:[^ ]+]] = sub i32 -1, %n
+-; CHECK: [[not_safe_range_end:[^ ]+]] = sub i32 3, %len
+-; CHECK: [[not_exit_main_loop_at_hiclamp_cmp:[^ ]+]] = icmp sgt i32 [[not_n]], [[not_safe_range_end]]
+-; CHECK: [[not_exit_main_loop_at_hiclamp:[^ ]+]] = select i1 [[not_exit_main_loop_at_hiclamp_cmp]], i32 [[not_n]], i32 [[not_safe_range_end]]
+-; CHECK: [[exit_main_loop_at_hiclamp:[^ ]+]] = sub i32 -1, [[not_exit_main_loop_at_hiclamp]]
++; CHECK: [[safe_range_end:[^ ]+]] = add i32 %len, -4
++; CHECK: [[exit_main_loop_at_hiclamp_cmp:[^ ]+]] = icmp slt i32 %n, [[safe_range_end]]
++; CHECK: [[exit_main_loop_at_hiclamp:[^ ]+]] = select i1 [[exit_main_loop_at_hiclamp_cmp]], i32 %n, i32 [[safe_range_end]]
+ ; CHECK: [[exit_main_loop_at_loclamp_cmp:[^ ]+]] = icmp sgt i32 [[exit_main_loop_at_hiclamp]], 0
+ ; CHECK: [[exit_main_loop_at_loclamp:[^ ]+]] = select i1 [[exit_main_loop_at_loclamp_cmp]], i32 [[exit_main_loop_at_hiclamp]], i32 0
+ ; CHECK: [[enter_main_loop:[^ ]+]] = icmp slt i32 0, [[exit_main_loop_at_loclamp]]
+Index: llvm-toolchain-6.0-6.0.1/test/Transforms/IRCE/single-access-with-preloop.ll
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/test/Transforms/IRCE/single-access-with-preloop.ll
++++ llvm-toolchain-6.0-6.0.1/test/Transforms/IRCE/single-access-with-preloop.ll
+@@ -33,11 +33,9 @@ define void @single_access_with_preloop(
+ ; CHECK: [[check_min_sint_offset:[^ ]+]] = icmp sgt i32 %offset, -2147483647
+ ; CHECK: [[safe_offset_preloop:[^ ]+]] = select i1 [[check_min_sint_offset]], i32 %offset, i32 -2147483647
+ ; If Offset was a SINT_MIN, we could have an overflow here. That is why we calculated its safe version.
+-; CHECK: [[not_safe_start:[^ ]+]] = add i32 [[safe_offset_preloop]], -1
+-; CHECK: [[not_n:[^ ]+]] = sub i32 -1, %n
+-; CHECK: [[not_exit_preloop_at_cond_loclamp:[^ ]+]] = icmp sgt i32 [[not_safe_start]], [[not_n]]
+-; CHECK: [[not_exit_preloop_at_loclamp:[^ ]+]] = select i1 [[not_exit_preloop_at_cond_loclamp]], i32 [[not_safe_start]], i32 [[not_n]]
+-; CHECK: [[exit_preloop_at_loclamp:[^ ]+]] = sub i32 -1, [[not_exit_preloop_at_loclamp]]
++; CHECK: [[safe_start:[^ ]+]] = sub i32 0, [[safe_offset_preloop]]
++; CHECK: [[exit_preloop_at_cond_loclamp:[^ ]+]] = icmp slt i32 %n, [[safe_start]]
++; CHECK: [[exit_preloop_at_loclamp:[^ ]+]] = select i1 [[exit_preloop_at_cond_loclamp]], i32 %n, i32 [[safe_start]]
+ ; CHECK: [[exit_preloop_at_cond:[^ ]+]] = icmp sgt i32 [[exit_preloop_at_loclamp]], 0
+ ; CHECK: [[exit_preloop_at:[^ ]+]] = select i1 [[exit_preloop_at_cond]], i32 [[exit_preloop_at_loclamp]], i32 0
+
+@@ -45,17 +43,15 @@ define void @single_access_with_preloop(
+ ; CHECK: [[len_minus_sint_max:[^ ]+]] = add i32 %len, -2147483647
+ ; CHECK: [[check_len_min_sint_offset:[^ ]+]] = icmp sgt i32 %offset, [[len_minus_sint_max]]
+ ; CHECK: [[safe_offset_mainloop:[^ ]+]] = select i1 [[check_len_min_sint_offset]], i32 %offset, i32 [[len_minus_sint_max]]
+-; CHECK: [[not_safe_start_2:[^ ]+]] = add i32 [[safe_offset_mainloop]], -1
+ ; If Offset was a SINT_MIN, we could have an overflow here. That is why we calculated its safe version.
+-; CHECK: [[not_safe_upper_end:[^ ]+]] = sub i32 [[not_safe_start_2]], %len
+-; CHECK: [[not_exit_mainloop_at_cond_loclamp:[^ ]+]] = icmp sgt i32 [[not_safe_upper_end]], [[not_n]]
+-; CHECK: [[not_exit_mainloop_at_loclamp:[^ ]+]] = select i1 [[not_exit_mainloop_at_cond_loclamp]], i32 [[not_safe_upper_end]], i32 [[not_n]]
++; CHECK: [[safe_upper_end:[^ ]+]] = sub i32 %len, [[safe_offset_mainloop]]
++; CHECK: [[exit_mainloop_at_cond_loclamp:[^ ]+]] = icmp slt i32 %n, [[safe_upper_end]]
++; CHECK: [[exit_mainloop_at_loclamp:[^ ]+]] = select i1 [[exit_mainloop_at_cond_loclamp]], i32 %n, i32 [[safe_upper_end]]
+ ; CHECK: [[check_offset_mainloop_2:[^ ]+]] = icmp sgt i32 %offset, 0
+ ; CHECK: [[safe_offset_mainloop_2:[^ ]+]] = select i1 [[check_offset_mainloop_2]], i32 %offset, i32 0
+-; CHECK: [[not_safe_lower_end:[^ ]+]] = add i32 [[safe_offset_mainloop_2]], -2147483648
+-; CHECK: [[not_exit_mainloop_at_cond_hiclamp:[^ ]+]] = icmp sgt i32 [[not_exit_mainloop_at_loclamp]], [[not_safe_lower_end]]
+-; CHECK: [[not_exit_mainloop_at_hiclamp:[^ ]+]] = select i1 [[not_exit_mainloop_at_cond_hiclamp]], i32 [[not_exit_mainloop_at_loclamp]], i32 [[not_safe_lower_end]]
+-; CHECK: [[exit_mainloop_at_hiclamp:[^ ]+]] = sub i32 -1, [[not_exit_mainloop_at_hiclamp]]
++; CHECK: [[safe_lower_end:[^ ]+]] = sub i32 2147483647, [[safe_offset_mainloop_2]]
++; CHECK: [[exit_mainloop_at_cond_hiclamp:[^ ]+]] = icmp slt i32 [[exit_mainloop_at_loclamp]], [[safe_lower_end]]
++; CHECK: [[exit_mainloop_at_hiclamp:[^ ]+]] = select i1 [[exit_mainloop_at_cond_hiclamp]], i32 [[exit_mainloop_at_loclamp]], i32 [[safe_lower_end]]
+ ; CHECK: [[exit_mainloop_at_cmp:[^ ]+]] = icmp sgt i32 [[exit_mainloop_at_hiclamp]], 0
+ ; CHECK: [[exit_mainloop_at:[^ ]+]] = select i1 [[exit_mainloop_at_cmp]], i32 [[exit_mainloop_at_hiclamp]], i32 0
+
+Index: llvm-toolchain-6.0-6.0.1/test/Transforms/LoopStrengthReduce/2013-01-14-ReuseCast.ll
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/test/Transforms/LoopStrengthReduce/2013-01-14-ReuseCast.ll
++++ llvm-toolchain-6.0-6.0.1/test/Transforms/LoopStrengthReduce/2013-01-14-ReuseCast.ll
+@@ -14,8 +14,6 @@ target datalayout = "e-p:64:64:64-i1:8:8
+ ; current LSR cost model.
+ ; CHECK-NOT: = ptrtoint i8* undef to i64
+ ; CHECK: .lr.ph
+-; CHECK: [[TMP:%[^ ]+]] = add i64 %tmp{{[0-9]+}}, -1
+-; CHECK: sub i64 [[TMP]], %tmp{{[0-9]+}}
+ ; CHECK: ret void
+ define void @VerifyDiagnosticConsumerTest() unnamed_addr nounwind uwtable align 2 {
+ bb:
--- /dev/null
+commit b398d8e1fa5a5a914957fa22d0a64db97f6c265e
+Author: Craig Topper <craig.topper@intel.com>
+Date: Thu Mar 8 00:21:17 2018 +0000
+
+ [X86] Fix some isel patterns that used aligned vector load instructions with unaligned predicates.
+
+ These patterns weren't checking the alignment of the load, but were using the aligned instructions. This will cause a GP fault if the data isn't aligned.
+
+ I believe these were introduced in r312450.
+
+ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@326967 91177308-0d34-0410-b5e6-96231b3b80d8
+
+diff --git a/lib/Target/X86/X86InstrVecCompiler.td b/lib/Target/X86/X86InstrVecCompiler.td
+index db3dfe56531..50c7763a2c3 100644
+--- a/lib/Target/X86/X86InstrVecCompiler.td
++++ b/lib/Target/X86/X86InstrVecCompiler.td
+@@ -261,10 +261,10 @@ let Predicates = [HasVLX] in {
+ // will zero the upper bits.
+ // TODO: Is there a safe way to detect whether the producing instruction
+ // already zeroed the upper bits?
+-multiclass subvector_zero_lowering<string MoveStr, RegisterClass RC,
+- ValueType DstTy, ValueType SrcTy,
+- ValueType ZeroTy, PatFrag memop,
+- SubRegIndex SubIdx> {
++multiclass subvector_zero_lowering<string MoveStr, string LoadStr,
++ RegisterClass RC, ValueType DstTy,
++ ValueType SrcTy, ValueType ZeroTy,
++ PatFrag memop, SubRegIndex SubIdx> {
+ def : Pat<(DstTy (insert_subvector (bitconvert (ZeroTy immAllZerosV)),
+ (SrcTy RC:$src), (iPTR 0))),
+ (SUBREG_TO_REG (i64 0),
+@@ -274,91 +274,91 @@ multiclass subvector_zero_lowering<string MoveStr, RegisterClass RC,
+ (SrcTy (bitconvert (memop addr:$src))),
+ (iPTR 0))),
+ (SUBREG_TO_REG (i64 0),
+- (!cast<Instruction>("VMOV"#MoveStr#"rm") addr:$src), SubIdx)>;
++ (!cast<Instruction>("VMOV"#LoadStr#"rm") addr:$src), SubIdx)>;
+ }
+
+ let Predicates = [HasAVX, NoVLX] in {
+- defm : subvector_zero_lowering<"APD", VR128, v4f64, v2f64, v8i32, loadv2f64,
+- sub_xmm>;
+- defm : subvector_zero_lowering<"APS", VR128, v8f32, v4f32, v8i32, loadv4f32,
+- sub_xmm>;
+- defm : subvector_zero_lowering<"DQA", VR128, v4i64, v2i64, v8i32, loadv2i64,
+- sub_xmm>;
+- defm : subvector_zero_lowering<"DQA", VR128, v8i32, v4i32, v8i32, loadv2i64,
+- sub_xmm>;
+- defm : subvector_zero_lowering<"DQA", VR128, v16i16, v8i16, v8i32, loadv2i64,
+- sub_xmm>;
+- defm : subvector_zero_lowering<"DQA", VR128, v32i8, v16i8, v8i32, loadv2i64,
+- sub_xmm>;
+-}
+-
+-let Predicates = [HasVLX] in {
+- defm : subvector_zero_lowering<"APDZ128", VR128X, v4f64, v2f64, v8i32,
++ defm : subvector_zero_lowering<"APD", "UPD", VR128, v4f64, v2f64, v8i32,
+ loadv2f64, sub_xmm>;
+- defm : subvector_zero_lowering<"APSZ128", VR128X, v8f32, v4f32, v8i32,
++ defm : subvector_zero_lowering<"APS", "UPS", VR128, v8f32, v4f32, v8i32,
+ loadv4f32, sub_xmm>;
+- defm : subvector_zero_lowering<"DQA64Z128", VR128X, v4i64, v2i64, v8i32,
++ defm : subvector_zero_lowering<"DQA", "DQU", VR128, v4i64, v2i64, v8i32,
+ loadv2i64, sub_xmm>;
+- defm : subvector_zero_lowering<"DQA64Z128", VR128X, v8i32, v4i32, v8i32,
++ defm : subvector_zero_lowering<"DQA", "DQU", VR128, v8i32, v4i32, v8i32,
+ loadv2i64, sub_xmm>;
+- defm : subvector_zero_lowering<"DQA64Z128", VR128X, v16i16, v8i16, v8i32,
++ defm : subvector_zero_lowering<"DQA", "DQU", VR128, v16i16, v8i16, v8i32,
+ loadv2i64, sub_xmm>;
+- defm : subvector_zero_lowering<"DQA64Z128", VR128X, v32i8, v16i8, v8i32,
+- loadv2i64, sub_xmm>;
+-
+- defm : subvector_zero_lowering<"APDZ128", VR128X, v8f64, v2f64, v16i32,
+- loadv2f64, sub_xmm>;
+- defm : subvector_zero_lowering<"APSZ128", VR128X, v16f32, v4f32, v16i32,
+- loadv4f32, sub_xmm>;
+- defm : subvector_zero_lowering<"DQA64Z128", VR128X, v8i64, v2i64, v16i32,
+- loadv2i64, sub_xmm>;
+- defm : subvector_zero_lowering<"DQA64Z128", VR128X, v16i32, v4i32, v16i32,
+- loadv2i64, sub_xmm>;
+- defm : subvector_zero_lowering<"DQA64Z128", VR128X, v32i16, v8i16, v16i32,
+- loadv2i64, sub_xmm>;
+- defm : subvector_zero_lowering<"DQA64Z128", VR128X, v64i8, v16i8, v16i32,
++ defm : subvector_zero_lowering<"DQA", "DQU", VR128, v32i8, v16i8, v8i32,
+ loadv2i64, sub_xmm>;
++}
+
+- defm : subvector_zero_lowering<"APDZ256", VR256X, v8f64, v4f64, v16i32,
+- loadv4f64, sub_ymm>;
+- defm : subvector_zero_lowering<"APSZ256", VR256X, v16f32, v8f32, v16i32,
+- loadv8f32, sub_ymm>;
+- defm : subvector_zero_lowering<"DQA64Z256", VR256X, v8i64, v4i64, v16i32,
+- loadv4i64, sub_ymm>;
+- defm : subvector_zero_lowering<"DQA64Z256", VR256X, v16i32, v8i32, v16i32,
+- loadv4i64, sub_ymm>;
+- defm : subvector_zero_lowering<"DQA64Z256", VR256X, v32i16, v16i16, v16i32,
+- loadv4i64, sub_ymm>;
+- defm : subvector_zero_lowering<"DQA64Z256", VR256X, v64i8, v32i8, v16i32,
+- loadv4i64, sub_ymm>;
++let Predicates = [HasVLX] in {
++ defm : subvector_zero_lowering<"APDZ128", "UPDZ128", VR128X, v4f64,
++ v2f64, v8i32, loadv2f64, sub_xmm>;
++ defm : subvector_zero_lowering<"APSZ128", "UPSZ128", VR128X, v8f32,
++ v4f32, v8i32, loadv4f32, sub_xmm>;
++ defm : subvector_zero_lowering<"DQA64Z128", "DQU64Z128", VR128X, v4i64,
++ v2i64, v8i32, loadv2i64, sub_xmm>;
++ defm : subvector_zero_lowering<"DQA64Z128", "DQU64Z128", VR128X, v8i32,
++ v4i32, v8i32, loadv2i64, sub_xmm>;
++ defm : subvector_zero_lowering<"DQA64Z128", "DQU64Z128", VR128X, v16i16,
++ v8i16, v8i32, loadv2i64, sub_xmm>;
++ defm : subvector_zero_lowering<"DQA64Z128", "DQU64Z128", VR128X, v32i8,
++ v16i8, v8i32, loadv2i64, sub_xmm>;
++
++ defm : subvector_zero_lowering<"APDZ128", "UPDZ128", VR128X, v8f64,
++ v2f64, v16i32, loadv2f64, sub_xmm>;
++ defm : subvector_zero_lowering<"APSZ128", "UPSZ128", VR128X, v16f32,
++ v4f32, v16i32, loadv4f32, sub_xmm>;
++ defm : subvector_zero_lowering<"DQA64Z128", "DQU64Z128", VR128X, v8i64,
++ v2i64, v16i32, loadv2i64, sub_xmm>;
++ defm : subvector_zero_lowering<"DQA64Z128", "DQU64Z128", VR128X, v16i32,
++ v4i32, v16i32, loadv2i64, sub_xmm>;
++ defm : subvector_zero_lowering<"DQA64Z128", "DQU64Z128", VR128X, v32i16,
++ v8i16, v16i32, loadv2i64, sub_xmm>;
++ defm : subvector_zero_lowering<"DQA64Z128", "DQU64Z128", VR128X, v64i8,
++ v16i8, v16i32, loadv2i64, sub_xmm>;
++
++ defm : subvector_zero_lowering<"APDZ256", "UPDZ256", VR256X, v8f64,
++ v4f64, v16i32, loadv4f64, sub_ymm>;
++ defm : subvector_zero_lowering<"APSZ256", "UPDZ256", VR256X, v16f32,
++ v8f32, v16i32, loadv8f32, sub_ymm>;
++ defm : subvector_zero_lowering<"DQA64Z256", "DQU64Z256", VR256X, v8i64,
++ v4i64, v16i32, loadv4i64, sub_ymm>;
++ defm : subvector_zero_lowering<"DQA64Z256", "DQU64Z256", VR256X, v16i32,
++ v8i32, v16i32, loadv4i64, sub_ymm>;
++ defm : subvector_zero_lowering<"DQA64Z256", "DQU64Z256", VR256X, v32i16,
++ v16i16, v16i32, loadv4i64, sub_ymm>;
++ defm : subvector_zero_lowering<"DQA64Z256", "DQU64Z256", VR256X, v64i8,
++ v32i8, v16i32, loadv4i64, sub_ymm>;
+ }
+
+ let Predicates = [HasAVX512, NoVLX] in {
+- defm : subvector_zero_lowering<"APD", VR128, v8f64, v2f64, v16i32, loadv2f64,
+- sub_xmm>;
+- defm : subvector_zero_lowering<"APS", VR128, v16f32, v4f32, v16i32, loadv4f32,
+- sub_xmm>;
+- defm : subvector_zero_lowering<"DQA", VR128, v8i64, v2i64, v16i32, loadv2i64,
+- sub_xmm>;
+- defm : subvector_zero_lowering<"DQA", VR128, v16i32, v4i32, v16i32, loadv2i64,
+- sub_xmm>;
+- defm : subvector_zero_lowering<"DQA", VR128, v32i16, v8i16, v16i32, loadv2i64,
+- sub_xmm>;
+- defm : subvector_zero_lowering<"DQA", VR128, v64i8, v16i8, v16i32, loadv2i64,
+- sub_xmm>;
+-
+- defm : subvector_zero_lowering<"APDY", VR256, v8f64, v4f64, v16i32,
+- loadv4f64, sub_ymm>;
+- defm : subvector_zero_lowering<"APSY", VR256, v16f32, v8f32, v16i32,
+- loadv8f32, sub_ymm>;
+- defm : subvector_zero_lowering<"DQAY", VR256, v8i64, v4i64, v16i32,
+- loadv4i64, sub_ymm>;
+- defm : subvector_zero_lowering<"DQAY", VR256, v16i32, v8i32, v16i32,
+- loadv4i64, sub_ymm>;
+- defm : subvector_zero_lowering<"DQAY", VR256, v32i16, v16i16, v16i32,
+- loadv4i64, sub_ymm>;
+- defm : subvector_zero_lowering<"DQAY", VR256, v64i8, v32i8, v16i32,
+- loadv4i64, sub_ymm>;
++ defm : subvector_zero_lowering<"APD", "UPD", VR128, v8f64, v2f64,
++ v16i32,loadv2f64, sub_xmm>;
++ defm : subvector_zero_lowering<"APS", "UPS", VR128, v16f32, v4f32,
++ v16i32, loadv4f32, sub_xmm>;
++ defm : subvector_zero_lowering<"DQA", "DQU", VR128, v8i64, v2i64,
++ v16i32, loadv2i64, sub_xmm>;
++ defm : subvector_zero_lowering<"DQA", "DQU", VR128, v16i32, v4i32,
++ v16i32, loadv2i64, sub_xmm>;
++ defm : subvector_zero_lowering<"DQA", "DQU", VR128, v32i16, v8i16,
++ v16i32, loadv2i64, sub_xmm>;
++ defm : subvector_zero_lowering<"DQA", "DQU", VR128, v64i8, v16i8,
++ v16i32, loadv2i64, sub_xmm>;
++
++ defm : subvector_zero_lowering<"APDY", "UPDY", VR256, v8f64, v4f64,
++ v16i32, loadv4f64, sub_ymm>;
++ defm : subvector_zero_lowering<"APSY", "UPSY", VR256, v16f32, v8f32,
++ v16i32, loadv8f32, sub_ymm>;
++ defm : subvector_zero_lowering<"DQAY", "DQUY", VR256, v8i64, v4i64,
++ v16i32, loadv4i64, sub_ymm>;
++ defm : subvector_zero_lowering<"DQAY", "DQUY", VR256, v16i32, v8i32,
++ v16i32, loadv4i64, sub_ymm>;
++ defm : subvector_zero_lowering<"DQAY", "DQUY", VR256, v32i16, v16i16,
++ v16i32, loadv4i64, sub_ymm>;
++ defm : subvector_zero_lowering<"DQAY", "DQUY", VR256, v64i8, v32i8,
++ v16i32, loadv4i64, sub_ymm>;
+ }
+
+ // List of opcodes that guaranteed to zero the upper elements of vector regs.
+diff --git a/test/CodeGen/X86/merge-consecutive-loads-256.ll b/test/CodeGen/X86/merge-consecutive-loads-256.ll
+index 6ecd8116443..0f2cf594b1c 100644
+--- a/test/CodeGen/X86/merge-consecutive-loads-256.ll
++++ b/test/CodeGen/X86/merge-consecutive-loads-256.ll
+@@ -28,13 +28,13 @@ define <4 x double> @merge_4f64_2f64_23(<2 x double>* %ptr) nounwind uwtable noi
+ define <4 x double> @merge_4f64_2f64_2z(<2 x double>* %ptr) nounwind uwtable noinline ssp {
+ ; AVX-LABEL: merge_4f64_2f64_2z:
+ ; AVX: # %bb.0:
+-; AVX-NEXT: vmovaps 32(%rdi), %xmm0
++; AVX-NEXT: vmovups 32(%rdi), %xmm0
+ ; AVX-NEXT: retq
+ ;
+ ; X32-AVX-LABEL: merge_4f64_2f64_2z:
+ ; X32-AVX: # %bb.0:
+ ; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX-NEXT: vmovaps 32(%eax), %xmm0
++; X32-AVX-NEXT: vmovups 32(%eax), %xmm0
+ ; X32-AVX-NEXT: retl
+ %ptr0 = getelementptr inbounds <2 x double>, <2 x double>* %ptr, i64 2
+ %val0 = load <2 x double>, <2 x double>* %ptr0
+@@ -109,13 +109,13 @@ define <4 x double> @merge_4f64_f64_34uu(double* %ptr) nounwind uwtable noinline
+ define <4 x double> @merge_4f64_f64_45zz(double* %ptr) nounwind uwtable noinline ssp {
+ ; AVX-LABEL: merge_4f64_f64_45zz:
+ ; AVX: # %bb.0:
+-; AVX-NEXT: vmovaps 32(%rdi), %xmm0
++; AVX-NEXT: vmovups 32(%rdi), %xmm0
+ ; AVX-NEXT: retq
+ ;
+ ; X32-AVX-LABEL: merge_4f64_f64_45zz:
+ ; X32-AVX: # %bb.0:
+ ; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX-NEXT: vmovaps 32(%eax), %xmm0
++; X32-AVX-NEXT: vmovups 32(%eax), %xmm0
+ ; X32-AVX-NEXT: retl
+ %ptr0 = getelementptr inbounds double, double* %ptr, i64 4
+ %ptr1 = getelementptr inbounds double, double* %ptr, i64 5
+@@ -155,13 +155,13 @@ define <4 x double> @merge_4f64_f64_34z6(double* %ptr) nounwind uwtable noinline
+ define <4 x i64> @merge_4i64_2i64_3z(<2 x i64>* %ptr) nounwind uwtable noinline ssp {
+ ; AVX-LABEL: merge_4i64_2i64_3z:
+ ; AVX: # %bb.0:
+-; AVX-NEXT: vmovaps 48(%rdi), %xmm0
++; AVX-NEXT: vmovups 48(%rdi), %xmm0
+ ; AVX-NEXT: retq
+ ;
+ ; X32-AVX-LABEL: merge_4i64_2i64_3z:
+ ; X32-AVX: # %bb.0:
+ ; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX-NEXT: vmovaps 48(%eax), %xmm0
++; X32-AVX-NEXT: vmovups 48(%eax), %xmm0
+ ; X32-AVX-NEXT: retl
+ %ptr0 = getelementptr inbounds <2 x i64>, <2 x i64>* %ptr, i64 3
+ %val0 = load <2 x i64>, <2 x i64>* %ptr0
+@@ -217,13 +217,13 @@ define <4 x i64> @merge_4i64_i64_1zzu(i64* %ptr) nounwind uwtable noinline ssp {
+ define <4 x i64> @merge_4i64_i64_23zz(i64* %ptr) nounwind uwtable noinline ssp {
+ ; AVX-LABEL: merge_4i64_i64_23zz:
+ ; AVX: # %bb.0:
+-; AVX-NEXT: vmovaps 16(%rdi), %xmm0
++; AVX-NEXT: vmovups 16(%rdi), %xmm0
+ ; AVX-NEXT: retq
+ ;
+ ; X32-AVX-LABEL: merge_4i64_i64_23zz:
+ ; X32-AVX: # %bb.0:
+ ; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX-NEXT: vmovaps 16(%eax), %xmm0
++; X32-AVX-NEXT: vmovups 16(%eax), %xmm0
+ ; X32-AVX-NEXT: retl
+ %ptr0 = getelementptr inbounds i64, i64* %ptr, i64 2
+ %ptr1 = getelementptr inbounds i64, i64* %ptr, i64 3
+diff --git a/test/CodeGen/X86/merge-consecutive-loads-512.ll b/test/CodeGen/X86/merge-consecutive-loads-512.ll
+index 62102eb382c..3c6eaf65292 100644
+--- a/test/CodeGen/X86/merge-consecutive-loads-512.ll
++++ b/test/CodeGen/X86/merge-consecutive-loads-512.ll
+@@ -106,13 +106,13 @@ define <8 x double> @merge_8f64_f64_23uuuuu9(double* %ptr) nounwind uwtable noin
+ define <8 x double> @merge_8f64_f64_12zzuuzz(double* %ptr) nounwind uwtable noinline ssp {
+ ; ALL-LABEL: merge_8f64_f64_12zzuuzz:
+ ; ALL: # %bb.0:
+-; ALL-NEXT: vmovaps 8(%rdi), %xmm0
++; ALL-NEXT: vmovups 8(%rdi), %xmm0
+ ; ALL-NEXT: retq
+ ;
+ ; X32-AVX512F-LABEL: merge_8f64_f64_12zzuuzz:
+ ; X32-AVX512F: # %bb.0:
+ ; X32-AVX512F-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512F-NEXT: vmovaps 8(%eax), %xmm0
++; X32-AVX512F-NEXT: vmovups 8(%eax), %xmm0
+ ; X32-AVX512F-NEXT: retl
+ %ptr0 = getelementptr inbounds double, double* %ptr, i64 1
+ %ptr1 = getelementptr inbounds double, double* %ptr, i64 2
+@@ -190,7 +190,7 @@ define <8 x i64> @merge_8i64_4i64_z3(<4 x i64>* %ptr) nounwind uwtable noinline
+ define <8 x i64> @merge_8i64_i64_56zz9uzz(i64* %ptr) nounwind uwtable noinline ssp {
+ ; ALL-LABEL: merge_8i64_i64_56zz9uzz:
+ ; ALL: # %bb.0:
+-; ALL-NEXT: vmovaps 40(%rdi), %xmm0
++; ALL-NEXT: vmovups 40(%rdi), %xmm0
+ ; ALL-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
+ ; ALL-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0
+ ; ALL-NEXT: retq
+@@ -198,7 +198,7 @@ define <8 x i64> @merge_8i64_i64_56zz9uzz(i64* %ptr) nounwind uwtable noinline s
+ ; X32-AVX512F-LABEL: merge_8i64_i64_56zz9uzz:
+ ; X32-AVX512F: # %bb.0:
+ ; X32-AVX512F-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512F-NEXT: vmovaps 40(%eax), %xmm0
++; X32-AVX512F-NEXT: vmovups 40(%eax), %xmm0
+ ; X32-AVX512F-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
+ ; X32-AVX512F-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0
+ ; X32-AVX512F-NEXT: retl
--- /dev/null
+commit 64c3384f94a1eb3e3510d6f66c3bccdfc9d9050b
+Author: Nirav Dave <niravd@google.com>
+Date: Thu Feb 1 16:11:59 2018 +0000
+
+ r327898/dependencies roll up
+
+ This is a squash of 13 commits required in the lead up to r327898,
+ which fixes https://github.com/JuliaLang/julia/issues/27603. The squashed
+ commits are:
+
+ 332d15e981e86b9e058087174bb288ba18a15807
+ b659d3fca5d24c25ee73f979edb382f7f24e05e2
+ c01d1363ea080170fc5143d72f26eecd9270f03b
+ eab8a177a4caef9e42ef1d2aeb4ba15dc788d3f2
+ bedb1391781b009ace95f5586e7fae5f03fe0689
+ 11d041a905f82ac78e7ccf2394773e80b93d147c
+ e1ec36c55a0127988f42a3329ca835617b30de09
+ b8d2903300c13d8fd151c8e5dc71017269617539
+ 00884fea345f47ab05174a8f314ecd60d1676d02
+ 28ab04cec0d9888af9d29946b3a048b8340abe0f
+ 3dd52e62ea3087efcca63c3772183d9471abc742
+ bd3649ff6d6b4d18b3c6de253179d987a120518a
+ aea03035b9c633e6d745b6d3fc5b6378699f576c
+
+ Their commit messages follow below:
+
+ [SelectionDAG] Fix UpdateChains handling of TokenFactors
+
+ Summary:
+ In Instruction Selection UpdateChains replaces all matched Nodes'
+ chain references including interior token factors and deletes them.
+ This may allow nodes which depend on these interior nodes but are not
+ part of the set of matched nodes to be left with a dangling dependence.
+ Avoid this by doing the replacement for matched non-TokenFactor nodes.
+
+ Fixes PR36164.
+
+ Reviewers: jonpa, RKSimon, bogner
+
+ Subscribers: llvm-commits, hiraditya
+
+ Differential Revision: https://reviews.llvm.org/D42754
+
+ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323977 91177308-0d34-0410-b5e6-96231b3b80d8
+
+ Regenerate test result for vastart-defs-eflags.ll. NFC.
+
+ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323596 91177308-0d34-0410-b5e6-96231b3b80d8
+
+ Regenerate test result for testb-je-fusion.ll. NFC.
+
+ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323595 91177308-0d34-0410-b5e6-96231b3b80d8
+
+ [X86] Avoid using high register trick for test instruction
+
+ Summary:
+ It seems it's main effect is to create addition copies when values are inr register that do not support this trick, which increase register pressure and makes the code bigger.
+
+ Reviewers: craig.topper, niravd, spatel, hfinkel
+
+ Subscribers: llvm-commits
+
+ Differential Revision: https://reviews.llvm.org/D42646
+
+ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323888 91177308-0d34-0410-b5e6-96231b3b80d8
+
+ Add a regression test for problems caused by D42646 . NFC
+
+ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323868 91177308-0d34-0410-b5e6-96231b3b80d8
+
+ Add test case for truncated and promotion to test. NFC
+
+ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323663 91177308-0d34-0410-b5e6-96231b3b80d8
+
+ [X86] Add test case to ensure testw is generated when optimizing for size. NFC
+
+ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323687 91177308-0d34-0410-b5e6-96231b3b80d8
+
+ [X86] Generate testl instruction through truncates.
+
+ Summary:
+ This was introduced in D42646 but ended up being reverted because the original implementation was buggy.
+
+ Depends on D42646
+
+ Reviewers: craig.topper, niravd, spatel, hfinkel
+
+ Subscribers: llvm-commits
+
+ Differential Revision: https://reviews.llvm.org/D42741
+
+ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323899 91177308-0d34-0410-b5e6-96231b3b80d8
+
+ [X86] Don't look for TEST instruction shrinking opportunities when the root node is a X86ISD::SUB.
+
+ I don't believe we ever create an X86ISD::SUB with a 0 constant which is what the TEST handling needs. The ternary operator at the end of this code shows up as only going one way in the llvm-cov report from the bots.
+
+ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@324865 91177308-0d34-0410-b5e6-96231b3b80d8
+
+ [X86] Teach LowerBUILD_VECTOR to recognize pair-wise splats of 32-bit elements and use a 64-bit broadcast
+
+ If we are splatting pairs of 32-bit elements, we can use a 64-bit broadcast to get the job done.
+
+ We could probably could probably do this with other sizes too, for example four 16-bit elements. Or we could broadcast pairs of 16-bit elements using a 32-bit element broadcast. But I've left that as a future improvement.
+
+ I've also restricted this to AVX2 only because we can only broadcast loads under AVX.
+
+ Differential Revision: https://reviews.llvm.org/D42086
+
+ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322730 91177308-0d34-0410-b5e6-96231b3b80d8
+
+ [DAG, X86] Revert r327197 "Revert r327170, r327171, r327172"
+
+ Reland ISel cycle checking improvements after simplifying node id
+ invariant traversal and correcting typo.
+
+ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327898 91177308-0d34-0410-b5e6-96231b3b80d8
+
+ [ Modified for cherry-pick: Dropped Hexagon and SystemZ changes"
+
+ [DAG, X86] Fix ISel-time node insertion ids
+
+ As in SystemZ backend, correctly propagate node ids when inserting new
+ unselected nodes into the DAG during instruction Seleciton for X86
+ target.
+
+ Fixes PR36865.
+
+ Reviewers: jyknight, craig.topper
+
+ Subscribers: hiraditya, llvm-commits
+
+ Differential Revision: https://reviews.llvm.org/D44797
+
+ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328233 91177308-0d34-0410-b5e6-96231b3b80d8
+
+ [DAG] Fix node id invalidation in Instruction Selection.
+
+ Invalidation should be bit negation. Add missing negation.
+
+ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@328287 91177308-0d34-0410-b5e6-96231b3b80d8
+
+ Remove failing tests
+
+ This removes tests that are failing due to codegen differences,
+ after the latest set of backports. Fixing thse for the backport
+ branch does not seem worth it.
+
+diff --git a/include/llvm/CodeGen/SelectionDAGISel.h b/include/llvm/CodeGen/SelectionDAGISel.h
+index de6849a1eae..e56eafc437c 100644
+--- a/include/llvm/CodeGen/SelectionDAGISel.h
++++ b/include/llvm/CodeGen/SelectionDAGISel.h
+@@ -110,6 +110,11 @@ public:
+ CodeGenOpt::Level OptLevel,
+ bool IgnoreChains = false);
+
++ static void InvalidateNodeId(SDNode *N);
++ static int getUninvalidatedNodeId(SDNode *N);
++
++ static void EnforceNodeIdInvariant(SDNode *N);
++
+ // Opcodes used by the DAG state machine:
+ enum BuiltinOpcodes {
+ OPC_Scope,
+@@ -199,23 +204,28 @@ protected:
+ /// of the new node T.
+ void ReplaceUses(SDValue F, SDValue T) {
+ CurDAG->ReplaceAllUsesOfValueWith(F, T);
++ EnforceNodeIdInvariant(T.getNode());
+ }
+
+ /// ReplaceUses - replace all uses of the old nodes F with the use
+ /// of the new nodes T.
+ void ReplaceUses(const SDValue *F, const SDValue *T, unsigned Num) {
+ CurDAG->ReplaceAllUsesOfValuesWith(F, T, Num);
++ for (unsigned i = 0; i < Num; ++i)
++ EnforceNodeIdInvariant(T[i].getNode());
+ }
+
+ /// ReplaceUses - replace all uses of the old node F with the use
+ /// of the new node T.
+ void ReplaceUses(SDNode *F, SDNode *T) {
+ CurDAG->ReplaceAllUsesWith(F, T);
++ EnforceNodeIdInvariant(T);
+ }
+
+ /// Replace all uses of \c F with \c T, then remove \c F from the DAG.
+ void ReplaceNode(SDNode *F, SDNode *T) {
+ CurDAG->ReplaceAllUsesWith(F, T);
++ EnforceNodeIdInvariant(T);
+ CurDAG->RemoveDeadNode(F);
+ }
+
+diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h
+index 522c2f1b2cb..2d974234abf 100644
+--- a/include/llvm/CodeGen/SelectionDAGNodes.h
++++ b/include/llvm/CodeGen/SelectionDAGNodes.h
+@@ -796,16 +796,44 @@ public:
+ /// searches to be performed in parallel, caching of results across
+ /// queries and incremental addition to Worklist. Stops early if N is
+ /// found but will resume. Remember to clear Visited and Worklists
+- /// if DAG changes.
++ /// if DAG changes. MaxSteps gives a maximum number of nodes to visit before
++ /// giving up. The TopologicalPrune flag signals that positive NodeIds are
++ /// topologically ordered (Operands have strictly smaller node id) and search
++ /// can be pruned leveraging this.
+ static bool hasPredecessorHelper(const SDNode *N,
+ SmallPtrSetImpl<const SDNode *> &Visited,
+ SmallVectorImpl<const SDNode *> &Worklist,
+- unsigned int MaxSteps = 0) {
++ unsigned int MaxSteps = 0,
++ bool TopologicalPrune = false) {
++ SmallVector<const SDNode *, 8> DeferredNodes;
+ if (Visited.count(N))
+ return true;
++
++ // Node Id's are assigned in three places: As a topological
++ // ordering (> 0), during legalization (results in values set to
++ // 0), new nodes (set to -1). If N has a topolgical id then we
++ // know that all nodes with ids smaller than it cannot be
++ // successors and we need not check them. Filter out all node
++ // that can't be matches. We add them to the worklist before exit
++ // in case of multiple calls. Note that during selection the topological id
++ // may be violated if a node's predecessor is selected before it. We mark
++ // this at selection negating the id of unselected successors and
++ // restricting topological pruning to positive ids.
++
++ int NId = N->getNodeId();
++ // If we Invalidated the Id, reconstruct original NId.
++ if (NId < -1)
++ NId = -(NId + 1);
++
++ bool Found = false;
+ while (!Worklist.empty()) {
+ const SDNode *M = Worklist.pop_back_val();
+- bool Found = false;
++ int MId = M->getNodeId();
++ if (TopologicalPrune && M->getOpcode() != ISD::TokenFactor && (NId > 0) &&
++ (MId > 0) && (MId < NId)) {
++ DeferredNodes.push_back(M);
++ continue;
++ }
+ for (const SDValue &OpV : M->op_values()) {
+ SDNode *Op = OpV.getNode();
+ if (Visited.insert(Op).second)
+@@ -814,11 +842,16 @@ public:
+ Found = true;
+ }
+ if (Found)
+- return true;
++ break;
+ if (MaxSteps != 0 && Visited.size() >= MaxSteps)
+- return false;
++ break;
+ }
+- return false;
++ // Push deferred nodes back on worklist.
++ Worklist.append(DeferredNodes.begin(), DeferredNodes.end());
++ // If we bailed early, conservatively return found.
++ if (MaxSteps != 0 && Visited.size() >= MaxSteps)
++ return true;
++ return Found;
+ }
+
+ /// Return true if all the users of N are contained in Nodes.
+diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+index bd9fcfb5c1e..17e42240133 100644
+--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
++++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+@@ -937,6 +937,58 @@ public:
+
+ } // end anonymous namespace
+
++// This function is used to enforce the topological node id property
++// property leveraged during Instruction selection. Before selection all
++// nodes are given a non-negative id such that all nodes have a larger id than
++// their operands. As this holds transitively we can prune checks that a node N
++// is a predecessor of M another by not recursively checking through M's
++// operands if N's ID is larger than M's ID. This is significantly improves
++// performance of for various legality checks (e.g. IsLegalToFold /
++// UpdateChains).
++
++// However, when we fuse multiple nodes into a single node
++// during selection we may induce a predecessor relationship between inputs and
++// outputs of distinct nodes being merged violating the topological property.
++// Should a fused node have a successor which has yet to be selected, our
++// legality checks would be incorrect. To avoid this we mark all unselected
++// sucessor nodes, i.e. id != -1 as invalid for pruning by bit-negating (x =>
++// (-(x+1))) the ids and modify our pruning check to ignore negative Ids of M.
++// We use bit-negation to more clearly enforce that node id -1 can only be
++// achieved by selected nodes). As the conversion is reversable the original Id,
++// topological pruning can still be leveraged when looking for unselected nodes.
++// This method is call internally in all ISel replacement calls.
++void SelectionDAGISel::EnforceNodeIdInvariant(SDNode *Node) {
++ SmallVector<SDNode *, 4> Nodes;
++ Nodes.push_back(Node);
++
++ while (!Nodes.empty()) {
++ SDNode *N = Nodes.pop_back_val();
++ for (auto *U : N->uses()) {
++ auto UId = U->getNodeId();
++ if (UId > 0) {
++ InvalidateNodeId(U);
++ Nodes.push_back(U);
++ }
++ }
++ }
++}
++
++// InvalidateNodeId - As discusses in EnforceNodeIdInvariant, mark a
++// NodeId with the equivalent node id which is invalid for topological
++// pruning.
++void SelectionDAGISel::InvalidateNodeId(SDNode *N) {
++ int InvalidId = -(N->getNodeId() + 1);
++ N->setNodeId(InvalidId);
++}
++
++// getUninvalidatedNodeId - get original uninvalidated node id.
++int SelectionDAGISel::getUninvalidatedNodeId(SDNode *N) {
++ int Id = N->getNodeId();
++ if (Id < -1)
++ return -(Id + 1);
++ return Id;
++}
++
+ void SelectionDAGISel::DoInstructionSelection() {
+ DEBUG(dbgs() << "===== Instruction selection begins: "
+ << printMBBReference(*FuncInfo->MBB) << " '"
+@@ -972,6 +1024,33 @@ void SelectionDAGISel::DoInstructionSelection() {
+ if (Node->use_empty())
+ continue;
+
++#ifndef NDEBUG
++ SmallVector<SDNode *, 4> Nodes;
++ Nodes.push_back(Node);
++
++ while (!Nodes.empty()) {
++ auto N = Nodes.pop_back_val();
++ if (N->getOpcode() == ISD::TokenFactor || N->getNodeId() < 0)
++ continue;
++ for (const SDValue &Op : N->op_values()) {
++ if (Op->getOpcode() == ISD::TokenFactor)
++ Nodes.push_back(Op.getNode());
++ else {
++ // We rely on topological ordering of node ids for checking for
++ // cycles when fusing nodes during selection. All unselected nodes
++ // successors of an already selected node should have a negative id.
++ // This assertion will catch such cases. If this assertion triggers
++ // it is likely you using DAG-level Value/Node replacement functions
++ // (versus equivalent ISEL replacement) in backend-specific
++ // selections. See comment in EnforceNodeIdInvariant for more
++ // details.
++ assert(Op->getNodeId() != -1 &&
++ "Node has already selected predecessor node");
++ }
++ }
++ }
++#endif
++
+ // When we are using non-default rounding modes or FP exception behavior
+ // FP operations are represented by StrictFP pseudo-operations. They
+ // need to be simplified here so that the target-specific instruction
+@@ -2134,52 +2213,44 @@ static SDNode *findGlueUse(SDNode *N) {
+ return nullptr;
+ }
+
+-/// findNonImmUse - Return true if "Use" is a non-immediate use of "Def".
+-/// This function iteratively traverses up the operand chain, ignoring
+-/// certain nodes.
+-static bool findNonImmUse(SDNode *Use, SDNode* Def, SDNode *ImmedUse,
+- SDNode *Root, SmallPtrSetImpl<SDNode*> &Visited,
++/// findNonImmUse - Return true if "Def" is a predecessor of "Root" via a path
++/// beyond "ImmedUse". We may ignore chains as they are checked separately.
++static bool findNonImmUse(SDNode *Root, SDNode *Def, SDNode *ImmedUse,
+ bool IgnoreChains) {
+- // The NodeID's are given uniques ID's where a node ID is guaranteed to be
+- // greater than all of its (recursive) operands. If we scan to a point where
+- // 'use' is smaller than the node we're scanning for, then we know we will
+- // never find it.
+- //
+- // The Use may be -1 (unassigned) if it is a newly allocated node. This can
+- // happen because we scan down to newly selected nodes in the case of glue
+- // uses.
+- std::vector<SDNode *> WorkList;
+- WorkList.push_back(Use);
+-
+- while (!WorkList.empty()) {
+- Use = WorkList.back();
+- WorkList.pop_back();
+- if (Use->getNodeId() < Def->getNodeId() && Use->getNodeId() != -1)
+- continue;
++ SmallPtrSet<const SDNode *, 16> Visited;
++ SmallVector<const SDNode *, 16> WorkList;
++ // Only check if we have non-immediate uses of Def.
++ if (ImmedUse->isOnlyUserOf(Def))
++ return false;
+
+- // Don't revisit nodes if we already scanned it and didn't fail, we know we
+- // won't fail if we scan it again.
+- if (!Visited.insert(Use).second)
++ // We don't care about paths to Def that go through ImmedUse so mark it
++ // visited and mark non-def operands as used.
++ Visited.insert(ImmedUse);
++ for (const SDValue &Op : ImmedUse->op_values()) {
++ SDNode *N = Op.getNode();
++ // Ignore chain deps (they are validated by
++ // HandleMergeInputChains) and immediate uses
++ if ((Op.getValueType() == MVT::Other && IgnoreChains) || N == Def)
+ continue;
++ if (!Visited.insert(N).second)
++ continue;
++ WorkList.push_back(N);
++ }
+
+- for (const SDValue &Op : Use->op_values()) {
+- // Ignore chain uses, they are validated by HandleMergeInputChains.
+- if (Op.getValueType() == MVT::Other && IgnoreChains)
+- continue;
+-
++ // Initialize worklist to operands of Root.
++ if (Root != ImmedUse) {
++ for (const SDValue &Op : Root->op_values()) {
+ SDNode *N = Op.getNode();
+- if (N == Def) {
+- if (Use == ImmedUse || Use == Root)
+- continue; // We are not looking for immediate use.
+- assert(N != Root);
+- return true;
+- }
+-
+- // Traverse up the operand chain.
++ // Ignore chains (they are validated by HandleMergeInputChains)
++ if ((Op.getValueType() == MVT::Other && IgnoreChains) || N == Def)
++ continue;
++ if (!Visited.insert(N).second)
++ continue;
+ WorkList.push_back(N);
+ }
+ }
+- return false;
++
++ return SDNode::hasPredecessorHelper(Def, Visited, WorkList, 0, true);
+ }
+
+ /// IsProfitableToFold - Returns true if it's profitable to fold the specific
+@@ -2251,13 +2322,12 @@ bool SelectionDAGISel::IsLegalToFold(SDValue N, SDNode *U, SDNode *Root,
+
+ // If our query node has a glue result with a use, we've walked up it. If
+ // the user (which has already been selected) has a chain or indirectly uses
+- // the chain, our WalkChainUsers predicate will not consider it. Because of
++ // the chain, HandleMergeInputChains will not consider it. Because of
+ // this, we cannot ignore chains in this predicate.
+ IgnoreChains = false;
+ }
+
+- SmallPtrSet<SDNode*, 16> Visited;
+- return !findNonImmUse(Root, N.getNode(), U, Root, Visited, IgnoreChains);
++ return !findNonImmUse(Root, N.getNode(), U, IgnoreChains);
+ }
+
+ void SelectionDAGISel::Select_INLINEASM(SDNode *N) {
+@@ -2360,7 +2430,8 @@ void SelectionDAGISel::UpdateChains(
+ std::replace(ChainNodesMatched.begin(), ChainNodesMatched.end(), N,
+ static_cast<SDNode *>(nullptr));
+ });
+- CurDAG->ReplaceAllUsesOfValueWith(ChainVal, InputChain);
++ if (ChainNode->getOpcode() != ISD::TokenFactor)
++ ReplaceUses(ChainVal, InputChain);
+
+ // If the node became dead and we haven't already seen it, delete it.
+ if (ChainNode != NodeToMatch && ChainNode->use_empty() &&
+@@ -2375,143 +2446,6 @@ void SelectionDAGISel::UpdateChains(
+ DEBUG(dbgs() << "ISEL: Match complete!\n");
+ }
+
+-enum ChainResult {
+- CR_Simple,
+- CR_InducesCycle,
+- CR_LeadsToInteriorNode
+-};
+-
+-/// WalkChainUsers - Walk down the users of the specified chained node that is
+-/// part of the pattern we're matching, looking at all of the users we find.
+-/// This determines whether something is an interior node, whether we have a
+-/// non-pattern node in between two pattern nodes (which prevent folding because
+-/// it would induce a cycle) and whether we have a TokenFactor node sandwiched
+-/// between pattern nodes (in which case the TF becomes part of the pattern).
+-///
+-/// The walk we do here is guaranteed to be small because we quickly get down to
+-/// already selected nodes "below" us.
+-static ChainResult
+-WalkChainUsers(const SDNode *ChainedNode,
+- SmallVectorImpl<SDNode *> &ChainedNodesInPattern,
+- DenseMap<const SDNode *, ChainResult> &TokenFactorResult,
+- SmallVectorImpl<SDNode *> &InteriorChainedNodes) {
+- ChainResult Result = CR_Simple;
+-
+- for (SDNode::use_iterator UI = ChainedNode->use_begin(),
+- E = ChainedNode->use_end(); UI != E; ++UI) {
+- // Make sure the use is of the chain, not some other value we produce.
+- if (UI.getUse().getValueType() != MVT::Other) continue;
+-
+- SDNode *User = *UI;
+-
+- if (User->getOpcode() == ISD::HANDLENODE) // Root of the graph.
+- continue;
+-
+- // If we see an already-selected machine node, then we've gone beyond the
+- // pattern that we're selecting down into the already selected chunk of the
+- // DAG.
+- unsigned UserOpcode = User->getOpcode();
+- if (User->isMachineOpcode() ||
+- UserOpcode == ISD::CopyToReg ||
+- UserOpcode == ISD::CopyFromReg ||
+- UserOpcode == ISD::INLINEASM ||
+- UserOpcode == ISD::EH_LABEL ||
+- UserOpcode == ISD::LIFETIME_START ||
+- UserOpcode == ISD::LIFETIME_END) {
+- // If their node ID got reset to -1 then they've already been selected.
+- // Treat them like a MachineOpcode.
+- if (User->getNodeId() == -1)
+- continue;
+- }
+-
+- // If we have a TokenFactor, we handle it specially.
+- if (User->getOpcode() != ISD::TokenFactor) {
+- // If the node isn't a token factor and isn't part of our pattern, then it
+- // must be a random chained node in between two nodes we're selecting.
+- // This happens when we have something like:
+- // x = load ptr
+- // call
+- // y = x+4
+- // store y -> ptr
+- // Because we structurally match the load/store as a read/modify/write,
+- // but the call is chained between them. We cannot fold in this case
+- // because it would induce a cycle in the graph.
+- if (!std::count(ChainedNodesInPattern.begin(),
+- ChainedNodesInPattern.end(), User))
+- return CR_InducesCycle;
+-
+- // Otherwise we found a node that is part of our pattern. For example in:
+- // x = load ptr
+- // y = x+4
+- // store y -> ptr
+- // This would happen when we're scanning down from the load and see the
+- // store as a user. Record that there is a use of ChainedNode that is
+- // part of the pattern and keep scanning uses.
+- Result = CR_LeadsToInteriorNode;
+- InteriorChainedNodes.push_back(User);
+- continue;
+- }
+-
+- // If we found a TokenFactor, there are two cases to consider: first if the
+- // TokenFactor is just hanging "below" the pattern we're matching (i.e. no
+- // uses of the TF are in our pattern) we just want to ignore it. Second,
+- // the TokenFactor can be sandwiched in between two chained nodes, like so:
+- // [Load chain]
+- // ^
+- // |
+- // [Load]
+- // ^ ^
+- // | \ DAG's like cheese
+- // / \ do you?
+- // / |
+- // [TokenFactor] [Op]
+- // ^ ^
+- // | |
+- // \ /
+- // \ /
+- // [Store]
+- //
+- // In this case, the TokenFactor becomes part of our match and we rewrite it
+- // as a new TokenFactor.
+- //
+- // To distinguish these two cases, do a recursive walk down the uses.
+- auto MemoizeResult = TokenFactorResult.find(User);
+- bool Visited = MemoizeResult != TokenFactorResult.end();
+- // Recursively walk chain users only if the result is not memoized.
+- if (!Visited) {
+- auto Res = WalkChainUsers(User, ChainedNodesInPattern, TokenFactorResult,
+- InteriorChainedNodes);
+- MemoizeResult = TokenFactorResult.insert(std::make_pair(User, Res)).first;
+- }
+- switch (MemoizeResult->second) {
+- case CR_Simple:
+- // If the uses of the TokenFactor are just already-selected nodes, ignore
+- // it, it is "below" our pattern.
+- continue;
+- case CR_InducesCycle:
+- // If the uses of the TokenFactor lead to nodes that are not part of our
+- // pattern that are not selected, folding would turn this into a cycle,
+- // bail out now.
+- return CR_InducesCycle;
+- case CR_LeadsToInteriorNode:
+- break; // Otherwise, keep processing.
+- }
+-
+- // Okay, we know we're in the interesting interior case. The TokenFactor
+- // is now going to be considered part of the pattern so that we rewrite its
+- // uses (it may have uses that are not part of the pattern) with the
+- // ultimate chain result of the generated code. We will also add its chain
+- // inputs as inputs to the ultimate TokenFactor we create.
+- Result = CR_LeadsToInteriorNode;
+- if (!Visited) {
+- ChainedNodesInPattern.push_back(User);
+- InteriorChainedNodes.push_back(User);
+- }
+- }
+-
+- return Result;
+-}
+-
+ /// HandleMergeInputChains - This implements the OPC_EmitMergeInputChains
+ /// operation for when the pattern matched at least one node with a chains. The
+ /// input vector contains a list of all of the chained nodes that we match. We
+@@ -2521,47 +2455,56 @@ WalkChainUsers(const SDNode *ChainedNode,
+ static SDValue
+ HandleMergeInputChains(SmallVectorImpl<SDNode*> &ChainNodesMatched,
+ SelectionDAG *CurDAG) {
+- // Used for memoization. Without it WalkChainUsers could take exponential
+- // time to run.
+- DenseMap<const SDNode *, ChainResult> TokenFactorResult;
+- // Walk all of the chained nodes we've matched, recursively scanning down the
+- // users of the chain result. This adds any TokenFactor nodes that are caught
+- // in between chained nodes to the chained and interior nodes list.
+- SmallVector<SDNode*, 3> InteriorChainedNodes;
+- for (unsigned i = 0, e = ChainNodesMatched.size(); i != e; ++i) {
+- if (WalkChainUsers(ChainNodesMatched[i], ChainNodesMatched,
+- TokenFactorResult,
+- InteriorChainedNodes) == CR_InducesCycle)
+- return SDValue(); // Would induce a cycle.
+- }
+
+- // Okay, we have walked all the matched nodes and collected TokenFactor nodes
+- // that we are interested in. Form our input TokenFactor node.
++ SmallPtrSet<const SDNode *, 16> Visited;
++ SmallVector<const SDNode *, 8> Worklist;
+ SmallVector<SDValue, 3> InputChains;
+- for (unsigned i = 0, e = ChainNodesMatched.size(); i != e; ++i) {
+- // Add the input chain of this node to the InputChains list (which will be
+- // the operands of the generated TokenFactor) if it's not an interior node.
+- SDNode *N = ChainNodesMatched[i];
+- if (N->getOpcode() != ISD::TokenFactor) {
+- if (std::count(InteriorChainedNodes.begin(),InteriorChainedNodes.end(),N))
+- continue;
++ unsigned int Max = 8192;
+
+- // Otherwise, add the input chain.
+- SDValue InChain = ChainNodesMatched[i]->getOperand(0);
+- assert(InChain.getValueType() == MVT::Other && "Not a chain");
+- InputChains.push_back(InChain);
+- continue;
+- }
++ // Quick exit on trivial merge.
++ if (ChainNodesMatched.size() == 1)
++ return ChainNodesMatched[0]->getOperand(0);
+
+- // If we have a token factor, we want to add all inputs of the token factor
+- // that are not part of the pattern we're matching.
+- for (const SDValue &Op : N->op_values()) {
+- if (!std::count(ChainNodesMatched.begin(), ChainNodesMatched.end(),
+- Op.getNode()))
+- InputChains.push_back(Op);
+- }
++ // Add chains that aren't already added (internal). Peek through
++ // token factors.
++ std::function<void(const SDValue)> AddChains = [&](const SDValue V) {
++ if (V.getValueType() != MVT::Other)
++ return;
++ if (V->getOpcode() == ISD::EntryToken)
++ return;
++ if (!Visited.insert(V.getNode()).second)
++ return;
++ if (V->getOpcode() == ISD::TokenFactor) {
++ for (const SDValue &Op : V->op_values())
++ AddChains(Op);
++ } else
++ InputChains.push_back(V);
++ };
++
++ for (auto *N : ChainNodesMatched) {
++ Worklist.push_back(N);
++ Visited.insert(N);
+ }
+
++ while (!Worklist.empty())
++ AddChains(Worklist.pop_back_val()->getOperand(0));
++
++ // Skip the search if there are no chain dependencies.
++ if (InputChains.size() == 0)
++ return CurDAG->getEntryNode();
++
++ // If one of these chains is a successor of input, we must have a
++ // node that is both the predecessor and successor of the
++ // to-be-merged nodes. Fail.
++ Visited.clear();
++ for (SDValue V : InputChains)
++ Worklist.push_back(V.getNode());
++
++ for (auto *N : ChainNodesMatched)
++ if (SDNode::hasPredecessorHelper(N, Visited, Worklist, Max, true))
++ return SDValue();
++
++ // Return merged chain.
+ if (InputChains.size() == 1)
+ return InputChains[0];
+ return CurDAG->getNode(ISD::TokenFactor, SDLoc(ChainNodesMatched[0]),
+@@ -2606,8 +2549,8 @@ MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTList,
+ // Move the glue if needed.
+ if ((EmitNodeInfo & OPFL_GlueOutput) && OldGlueResultNo != -1 &&
+ (unsigned)OldGlueResultNo != ResNumResults-1)
+- CurDAG->ReplaceAllUsesOfValueWith(SDValue(Node, OldGlueResultNo),
+- SDValue(Res, ResNumResults-1));
++ ReplaceUses(SDValue(Node, OldGlueResultNo),
++ SDValue(Res, ResNumResults - 1));
+
+ if ((EmitNodeInfo & OPFL_GlueOutput) != 0)
+ --ResNumResults;
+@@ -2615,14 +2558,15 @@ MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTList,
+ // Move the chain reference if needed.
+ if ((EmitNodeInfo & OPFL_Chain) && OldChainResultNo != -1 &&
+ (unsigned)OldChainResultNo != ResNumResults-1)
+- CurDAG->ReplaceAllUsesOfValueWith(SDValue(Node, OldChainResultNo),
+- SDValue(Res, ResNumResults-1));
++ ReplaceUses(SDValue(Node, OldChainResultNo),
++ SDValue(Res, ResNumResults - 1));
+
+ // Otherwise, no replacement happened because the node already exists. Replace
+ // Uses of the old node with the new one.
+ if (Res != Node) {
+- CurDAG->ReplaceAllUsesWith(Node, Res);
+- CurDAG->RemoveDeadNode(Node);
++ ReplaceNode(Node, Res);
++ } else {
++ EnforceNodeIdInvariant(Res);
+ }
+
+ return Res;
+@@ -2939,8 +2883,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
+ return;
+ case ISD::AssertSext:
+ case ISD::AssertZext:
+- CurDAG->ReplaceAllUsesOfValueWith(SDValue(NodeToMatch, 0),
+- NodeToMatch->getOperand(0));
++ ReplaceUses(SDValue(NodeToMatch, 0), NodeToMatch->getOperand(0));
+ CurDAG->RemoveDeadNode(NodeToMatch);
+ return;
+ case ISD::INLINEASM:
+@@ -3702,7 +3645,7 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
+ NodeToMatch->getValueType(i).getSizeInBits() ==
+ Res.getValueSizeInBits()) &&
+ "invalid replacement");
+- CurDAG->ReplaceAllUsesOfValueWith(SDValue(NodeToMatch, i), Res);
++ ReplaceUses(SDValue(NodeToMatch, i), Res);
+ }
+
+ // Update chain uses.
+@@ -3715,8 +3658,8 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
+ if (NodeToMatch->getValueType(NodeToMatch->getNumValues() - 1) ==
+ MVT::Glue &&
+ InputGlue.getNode())
+- CurDAG->ReplaceAllUsesOfValueWith(
+- SDValue(NodeToMatch, NodeToMatch->getNumValues() - 1), InputGlue);
++ ReplaceUses(SDValue(NodeToMatch, NodeToMatch->getNumValues() - 1),
++ InputGlue);
+
+ assert(NodeToMatch->use_empty() &&
+ "Didn't replace all uses of the node?");
+diff --git a/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp b/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+index f4776adb069..be5345e422d 100644
+--- a/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
++++ b/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+@@ -759,12 +759,11 @@ void AMDGPUDAGToDAGISel::SelectADD_SUB_I64(SDNode *N) {
+
+ if (ProduceCarry) {
+ // Replace the carry-use
+- CurDAG->ReplaceAllUsesOfValueWith(SDValue(N, 1), SDValue(AddHi, 1));
++ ReplaceUses(SDValue(N, 1), SDValue(AddHi, 1));
+ }
+
+ // Replace the remaining uses.
+- CurDAG->ReplaceAllUsesWith(N, RegSequence);
+- CurDAG->RemoveDeadNode(N);
++ ReplaceNode(N, RegSequence);
+ }
+
+ void AMDGPUDAGToDAGISel::SelectUADDO_USUBO(SDNode *N) {
+diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
+index 8d32510e200..0f504718f28 100644
+--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
++++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
+@@ -498,7 +498,7 @@ bool ARMDAGToDAGISel::canExtractShiftFromMul(const SDValue &N,
+
+ void ARMDAGToDAGISel::replaceDAGValue(const SDValue &N, SDValue M) {
+ CurDAG->RepositionNode(N.getNode()->getIterator(), M.getNode());
+- CurDAG->ReplaceAllUsesWith(N, M);
++ ReplaceUses(N, M);
+ }
+
+ bool ARMDAGToDAGISel::SelectImmShifterOperand(SDValue N,
+diff --git a/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp b/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
+index a6ac4e3df74..3721856ff45 100644
+--- a/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
++++ b/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
+@@ -777,7 +777,7 @@ void HexagonDAGToDAGISel::SelectBitcast(SDNode *N) {
+ return;
+ }
+
+- CurDAG->ReplaceAllUsesOfValueWith(SDValue(N,0), N->getOperand(0));
++ ReplaceUses(SDValue(N, 0), N->getOperand(0));
+ CurDAG->RemoveDeadNode(N);
+ }
+
+@@ -2182,4 +2182,3 @@ void HexagonDAGToDAGISel::rebalanceAddressTrees() {
+ RootHeights.clear();
+ RootWeights.clear();
+ }
+-
+diff --git a/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp b/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
+index f08c5054065..0608f06ef7e 100644
+--- a/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
++++ b/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
+@@ -1914,7 +1914,6 @@ void HvxSelector::selectShuffle(SDNode *N) {
+ // If the mask is all -1's, generate "undef".
+ if (!UseLeft && !UseRight) {
+ ISel.ReplaceNode(N, ISel.selectUndef(SDLoc(SN), ResTy).getNode());
+- DAG.RemoveDeadNode(N);
+ return;
+ }
+
+@@ -1970,7 +1969,6 @@ void HvxSelector::selectRor(SDNode *N) {
+ NewN = DAG.getMachineNode(Hexagon::V6_vror, dl, Ty, {VecV, RotV});
+
+ ISel.ReplaceNode(N, NewN);
+- DAG.RemoveDeadNode(N);
+ }
+
+ void HexagonDAGToDAGISel::SelectHvxShuffle(SDNode *N) {
+@@ -2017,8 +2015,7 @@ void HexagonDAGToDAGISel::SelectV65GatherPred(SDNode *N) {
+ MemOp[0] = cast<MemIntrinsicSDNode>(N)->getMemOperand();
+ cast<MachineSDNode>(Result)->setMemRefs(MemOp, MemOp + 1);
+
+- ReplaceUses(N, Result);
+- CurDAG->RemoveDeadNode(N);
++ ReplaceNode(N, Result);
+ }
+
+ void HexagonDAGToDAGISel::SelectV65Gather(SDNode *N) {
+@@ -2056,8 +2053,7 @@ void HexagonDAGToDAGISel::SelectV65Gather(SDNode *N) {
+ MemOp[0] = cast<MemIntrinsicSDNode>(N)->getMemOperand();
+ cast<MachineSDNode>(Result)->setMemRefs(MemOp, MemOp + 1);
+
+- ReplaceUses(N, Result);
+- CurDAG->RemoveDeadNode(N);
++ ReplaceNode(N, Result);
+ }
+
+ void HexagonDAGToDAGISel::SelectHVXDualOutput(SDNode *N) {
+@@ -2100,5 +2096,3 @@ void HexagonDAGToDAGISel::SelectHVXDualOutput(SDNode *N) {
+ ReplaceUses(SDValue(N, 1), SDValue(Result, 1));
+ CurDAG->RemoveDeadNode(N);
+ }
+-
+-
+diff --git a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
+index ce6f3d37f5c..fe59d820c88 100644
+--- a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
++++ b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
+@@ -589,10 +589,16 @@ bool SystemZDAGToDAGISel::selectAddress(SDValue Addr,
+ // The selection DAG must no longer depend on their uniqueness when this
+ // function is used.
+ static void insertDAGNode(SelectionDAG *DAG, SDNode *Pos, SDValue N) {
+- if (N.getNode()->getNodeId() == -1 ||
+- N.getNode()->getNodeId() > Pos->getNodeId()) {
++ if (N->getNodeId() == -1 ||
++ (SelectionDAGISel::getUninvalidatedNodeId(N.getNode()) >
++ SelectionDAGISel::getUninvalidatedNodeId(Pos))) {
+ DAG->RepositionNode(Pos->getIterator(), N.getNode());
+- N.getNode()->setNodeId(Pos->getNodeId());
++ // Mark Node as invalid for pruning as after this it may be a successor to a
++ // selected node but otherwise be in the same position of Pos.
++ // Conservatively mark it with the same -abs(Id) to assure node id
++ // invariant is preserved.
++ N->setNodeId(Pos->getNodeId());
++ SelectionDAGISel::InvalidateNodeId(N.getNode());
+ }
+ }
+
+@@ -1022,8 +1028,7 @@ bool SystemZDAGToDAGISel::tryRISBGZero(SDNode *N) {
+ };
+ SDValue New = convertTo(
+ DL, VT, SDValue(CurDAG->getMachineNode(Opcode, DL, OpcodeVT, Ops), 0));
+- ReplaceUses(N, New.getNode());
+- CurDAG->RemoveDeadNode(N);
++ ReplaceNode(N, New.getNode());
+ return true;
+ }
+
+@@ -1114,8 +1119,7 @@ void SystemZDAGToDAGISel::splitLargeImmediate(unsigned Opcode, SDNode *Node,
+ SDValue Lower = CurDAG->getConstant(LowerVal, DL, VT);
+ SDValue Or = CurDAG->getNode(Opcode, DL, VT, Upper, Lower);
+
+- ReplaceUses(Node, Or.getNode());
+- CurDAG->RemoveDeadNode(Node);
++ ReplaceNode(Node, Or.getNode());
+
+ SelectCode(Or.getNode());
+ }
+diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
+index d79fd0ca4da..ee2d221e31c 100644
+--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
++++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
+@@ -988,10 +988,16 @@ bool X86DAGToDAGISel::matchAdd(SDValue N, X86ISelAddressMode &AM,
+ // IDs! The selection DAG must no longer depend on their uniqueness when this
+ // is used.
+ static void insertDAGNode(SelectionDAG &DAG, SDValue Pos, SDValue N) {
+- if (N.getNode()->getNodeId() == -1 ||
+- N.getNode()->getNodeId() > Pos.getNode()->getNodeId()) {
+- DAG.RepositionNode(Pos.getNode()->getIterator(), N.getNode());
+- N.getNode()->setNodeId(Pos.getNode()->getNodeId());
++ if (N->getNodeId() == -1 ||
++ (SelectionDAGISel::getUninvalidatedNodeId(N.getNode()) >
++ SelectionDAGISel::getUninvalidatedNodeId(Pos.getNode()))) {
++ DAG.RepositionNode(Pos->getIterator(), N.getNode());
++ // Mark Node as invalid for pruning as after this it may be a successor to a
++ // selected node but otherwise be in the same position of Pos.
++ // Conservatively mark it with the same -abs(Id) to assure node id
++ // invariant is preserved.
++ N->setNodeId(Pos->getNodeId());
++ SelectionDAGISel::InvalidateNodeId(N.getNode());
+ }
+ }
+
+@@ -2092,50 +2098,84 @@ static bool isFusableLoadOpStorePattern(StoreSDNode *StoreNode,
+ LoadNode->getOffset() != StoreNode->getOffset())
+ return false;
+
+- // Check if the chain is produced by the load or is a TokenFactor with
+- // the load output chain as an operand. Return InputChain by reference.
++ bool FoundLoad = false;
++ SmallVector<SDValue, 4> ChainOps;
++ SmallVector<const SDNode *, 4> LoopWorklist;
++ SmallPtrSet<const SDNode *, 16> Visited;
++ const unsigned int Max = 1024;
++
++ // Visualization of Load-Op-Store fusion:
++ // -------------------------
++ // Legend:
++ // *-lines = Chain operand dependencies.
++ // |-lines = Normal operand dependencies.
++ // Dependencies flow down and right. n-suffix references multiple nodes.
++ //
++ // C Xn C
++ // * * *
++ // * * *
++ // Xn A-LD Yn TF Yn
++ // * * \ | * |
++ // * * \ | * |
++ // * * \ | => A--LD_OP_ST
++ // * * \| \
++ // TF OP \
++ // * | \ Zn
++ // * | \
++ // A-ST Zn
++ //
++
++ // This merge induced dependences from: #1: Xn -> LD, OP, Zn
++ // #2: Yn -> LD
++ // #3: ST -> Zn
++
++ // Ensure the transform is safe by checking for the dual
++ // dependencies to make sure we do not induce a loop.
++
++ // As LD is a predecessor to both OP and ST we can do this by checking:
++ // a). if LD is a predecessor to a member of Xn or Yn.
++ // b). if a Zn is a predecessor to ST.
++
++ // However, (b) can only occur through being a chain predecessor to
++ // ST, which is the same as Zn being a member or predecessor of Xn,
++ // which is a subset of LD being a predecessor of Xn. So it's
++ // subsumed by check (a).
++
+ SDValue Chain = StoreNode->getChain();
+
+- bool ChainCheck = false;
++ // Gather X elements in ChainOps.
+ if (Chain == Load.getValue(1)) {
+- ChainCheck = true;
+- InputChain = LoadNode->getChain();
++ FoundLoad = true;
++ ChainOps.push_back(Load.getOperand(0));
+ } else if (Chain.getOpcode() == ISD::TokenFactor) {
+- SmallVector<SDValue, 4> ChainOps;
+ for (unsigned i = 0, e = Chain.getNumOperands(); i != e; ++i) {
+ SDValue Op = Chain.getOperand(i);
+ if (Op == Load.getValue(1)) {
+- ChainCheck = true;
++ FoundLoad = true;
+ // Drop Load, but keep its chain. No cycle check necessary.
+ ChainOps.push_back(Load.getOperand(0));
+ continue;
+ }
+-
+- // Make sure using Op as part of the chain would not cause a cycle here.
+- // In theory, we could check whether the chain node is a predecessor of
+- // the load. But that can be very expensive. Instead visit the uses and
+- // make sure they all have smaller node id than the load.
+- int LoadId = LoadNode->getNodeId();
+- for (SDNode::use_iterator UI = Op.getNode()->use_begin(),
+- UE = UI->use_end(); UI != UE; ++UI) {
+- if (UI.getUse().getResNo() != 0)
+- continue;
+- if (UI->getNodeId() > LoadId)
+- return false;
+- }
+-
++ LoopWorklist.push_back(Op.getNode());
+ ChainOps.push_back(Op);
+ }
+-
+- if (ChainCheck)
+- // Make a new TokenFactor with all the other input chains except
+- // for the load.
+- InputChain = CurDAG->getNode(ISD::TokenFactor, SDLoc(Chain),
+- MVT::Other, ChainOps);
+ }
+- if (!ChainCheck)
++
++ if (!FoundLoad)
++ return false;
++
++ // Worklist is currently Xn. Add Yn to worklist.
++ for (SDValue Op : StoredVal->ops())
++ if (Op.getNode() != LoadNode)
++ LoopWorklist.push_back(Op.getNode());
++
++ // Check (a) if Load is a predecessor to Xn + Yn
++ if (SDNode::hasPredecessorHelper(Load.getNode(), Visited, LoopWorklist, Max,
++ true))
+ return false;
+
++ InputChain =
++ CurDAG->getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ChainOps);
+ return true;
+ }
+
+@@ -2335,6 +2375,8 @@ bool X86DAGToDAGISel::foldLoadStoreIntoMemOperand(SDNode *Node) {
+ MemOp[1] = LoadNode->getMemOperand();
+ Result->setMemRefs(MemOp, MemOp + 2);
+
++ // Update Load Chain uses as well.
++ ReplaceUses(SDValue(LoadNode, 1), SDValue(Result, 1));
+ ReplaceUses(SDValue(StoreNode, 0), SDValue(Result, 1));
+ ReplaceUses(SDValue(StoredVal.getNode(), 1), SDValue(Result, 0));
+ CurDAG->RemoveDeadNode(Node);
+@@ -2946,12 +2988,7 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
+ return;
+ }
+
+- case X86ISD::CMP:
+- case X86ISD::SUB: {
+- // Sometimes a SUB is used to perform comparison.
+- if (Opcode == X86ISD::SUB && Node->hasAnyUseOfValue(0))
+- // This node is not a CMP.
+- break;
++ case X86ISD::CMP: {
+ SDValue N0 = Node->getOperand(0);
+ SDValue N1 = Node->getOperand(1);
+
+@@ -2971,95 +3008,52 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
+ if (!C) break;
+ uint64_t Mask = C->getZExtValue();
+
+- // For example, convert "testl %eax, $8" to "testb %al, $8"
++ MVT VT;
++ int SubRegOp;
++ unsigned Op;
++
+ if (isUInt<8>(Mask) &&
+ (!(Mask & 0x80) || hasNoSignedComparisonUses(Node))) {
+- SDValue Imm = CurDAG->getTargetConstant(Mask, dl, MVT::i8);
+- SDValue Reg = N0.getOperand(0);
+-
+- // Extract the l-register.
+- SDValue Subreg = CurDAG->getTargetExtractSubreg(X86::sub_8bit, dl,
+- MVT::i8, Reg);
+-
+- // Emit a testb.
+- SDNode *NewNode = CurDAG->getMachineNode(X86::TEST8ri, dl, MVT::i32,
+- Subreg, Imm);
+- // Replace SUB|CMP with TEST, since SUB has two outputs while TEST has
+- // one, do not call ReplaceAllUsesWith.
+- ReplaceUses(SDValue(Node, (Opcode == X86ISD::SUB ? 1 : 0)),
+- SDValue(NewNode, 0));
+- CurDAG->RemoveDeadNode(Node);
+- return;
++ // For example, convert "testl %eax, $8" to "testb %al, $8"
++ VT = MVT::i8;
++ SubRegOp = X86::sub_8bit;
++ Op = X86::TEST8ri;
++ } else if (OptForMinSize && isUInt<16>(Mask) &&
++ (!(Mask & 0x8000) || hasNoSignedComparisonUses(Node))) {
++ // For example, "testl %eax, $32776" to "testw %ax, $32776".
++ // NOTE: We only want to form TESTW instructions if optimizing for
++ // min size. Otherwise we only save one byte and possibly get a length
++ // changing prefix penalty in the decoders.
++ VT = MVT::i16;
++ SubRegOp = X86::sub_16bit;
++ Op = X86::TEST16ri;
++ } else if (isUInt<32>(Mask) && N0.getValueType() != MVT::i16 &&
++ (!(Mask & 0x80000000) || hasNoSignedComparisonUses(Node))) {
++ // For example, "testq %rax, $268468232" to "testl %eax, $268468232".
++ // NOTE: We only want to run that transform if N0 is 32 or 64 bits.
++ // Otherwize, we find ourselves in a position where we have to do
++ // promotion. If previous passes did not promote the and, we assume
++ // they had a good reason not to and do not promote here.
++ VT = MVT::i32;
++ SubRegOp = X86::sub_32bit;
++ Op = X86::TEST32ri;
++ } else {
++ // No eligible transformation was found.
++ break;
+ }
+
+- // For example, "testl %eax, $2048" to "testb %ah, $8".
+- if (isShiftedUInt<8, 8>(Mask) &&
+- (!(Mask & 0x8000) || hasNoSignedComparisonUses(Node))) {
+- // Shift the immediate right by 8 bits.
+- SDValue ShiftedImm = CurDAG->getTargetConstant(Mask >> 8, dl, MVT::i8);
+- SDValue Reg = N0.getOperand(0);
+-
+- // Extract the h-register.
+- SDValue Subreg = CurDAG->getTargetExtractSubreg(X86::sub_8bit_hi, dl,
+- MVT::i8, Reg);
+-
+- // Emit a testb. The EXTRACT_SUBREG becomes a COPY that can only
+- // target GR8_NOREX registers, so make sure the register class is
+- // forced.
+- SDNode *NewNode = CurDAG->getMachineNode(X86::TEST8ri_NOREX, dl,
+- MVT::i32, Subreg, ShiftedImm);
+- // Replace SUB|CMP with TEST, since SUB has two outputs while TEST has
+- // one, do not call ReplaceAllUsesWith.
+- ReplaceUses(SDValue(Node, (Opcode == X86ISD::SUB ? 1 : 0)),
+- SDValue(NewNode, 0));
+- CurDAG->RemoveDeadNode(Node);
+- return;
+- }
++ SDValue Imm = CurDAG->getTargetConstant(Mask, dl, VT);
++ SDValue Reg = N0.getOperand(0);
+
+- // For example, "testl %eax, $32776" to "testw %ax, $32776".
+- // NOTE: We only want to form TESTW instructions if optimizing for
+- // min size. Otherwise we only save one byte and possibly get a length
+- // changing prefix penalty in the decoders.
+- if (OptForMinSize && isUInt<16>(Mask) && N0.getValueType() != MVT::i16 &&
+- (!(Mask & 0x8000) || hasNoSignedComparisonUses(Node))) {
+- SDValue Imm = CurDAG->getTargetConstant(Mask, dl, MVT::i16);
+- SDValue Reg = N0.getOperand(0);
+-
+- // Extract the 16-bit subregister.
+- SDValue Subreg = CurDAG->getTargetExtractSubreg(X86::sub_16bit, dl,
+- MVT::i16, Reg);
+-
+- // Emit a testw.
+- SDNode *NewNode = CurDAG->getMachineNode(X86::TEST16ri, dl, MVT::i32,
+- Subreg, Imm);
+- // Replace SUB|CMP with TEST, since SUB has two outputs while TEST has
+- // one, do not call ReplaceAllUsesWith.
+- ReplaceUses(SDValue(Node, (Opcode == X86ISD::SUB ? 1 : 0)),
+- SDValue(NewNode, 0));
+- CurDAG->RemoveDeadNode(Node);
+- return;
+- }
++ // Extract the subregister if necessary.
++ if (N0.getValueType() != VT)
++ Reg = CurDAG->getTargetExtractSubreg(SubRegOp, dl, VT, Reg);
+
+- // For example, "testq %rax, $268468232" to "testl %eax, $268468232".
+- if (isUInt<32>(Mask) && N0.getValueType() == MVT::i64 &&
+- (!(Mask & 0x80000000) || hasNoSignedComparisonUses(Node))) {
+- SDValue Imm = CurDAG->getTargetConstant(Mask, dl, MVT::i32);
+- SDValue Reg = N0.getOperand(0);
+-
+- // Extract the 32-bit subregister.
+- SDValue Subreg = CurDAG->getTargetExtractSubreg(X86::sub_32bit, dl,
+- MVT::i32, Reg);
+-
+- // Emit a testl.
+- SDNode *NewNode = CurDAG->getMachineNode(X86::TEST32ri, dl, MVT::i32,
+- Subreg, Imm);
+- // Replace SUB|CMP with TEST, since SUB has two outputs while TEST has
+- // one, do not call ReplaceAllUsesWith.
+- ReplaceUses(SDValue(Node, (Opcode == X86ISD::SUB ? 1 : 0)),
+- SDValue(NewNode, 0));
+- CurDAG->RemoveDeadNode(Node);
+- return;
+- }
++ // Emit a testl or testw.
++ SDNode *NewNode = CurDAG->getMachineNode(Op, dl, MVT::i32, Reg, Imm);
++ // Replace CMP with TEST.
++ ReplaceNode(Node, NewNode);
++ return;
+ }
+ break;
+ }
+diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
+index c1ddb771e2f..86e71cba87b 100644
+--- a/lib/Target/X86/X86ISelLowering.cpp
++++ b/lib/Target/X86/X86ISelLowering.cpp
+@@ -8131,6 +8131,32 @@ X86TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const {
+ return LD;
+ }
+
++ // If this is a splat of pairs of 32-bit elements, we can use a narrower
++ // build_vector and broadcast it.
++ // TODO: We could probably generalize this more.
++ if (Subtarget.hasAVX2() && EVTBits == 32 && Values.size() == 2) {
++ SDValue Ops[4] = { Op.getOperand(0), Op.getOperand(1),
++ DAG.getUNDEF(ExtVT), DAG.getUNDEF(ExtVT) };
++ auto CanSplat = [](SDValue Op, unsigned NumElems, ArrayRef<SDValue> Ops) {
++ // Make sure all the even/odd operands match.
++ for (unsigned i = 2; i != NumElems; ++i)
++ if (Ops[i % 2] != Op.getOperand(i))
++ return false;
++ return true;
++ };
++ if (CanSplat(Op, NumElems, Ops)) {
++ MVT WideEltVT = VT.isFloatingPoint() ? MVT::f64 : MVT::i64;
++ MVT NarrowVT = MVT::getVectorVT(ExtVT, 4);
++ // Create a new build vector and cast to v2i64/v2f64.
++ SDValue NewBV = DAG.getBitcast(MVT::getVectorVT(WideEltVT, 2),
++ DAG.getBuildVector(NarrowVT, dl, Ops));
++ // Broadcast from v2i64/v2f64 and cast to final VT.
++ MVT BcastVT = MVT::getVectorVT(WideEltVT, NumElems/2);
++ return DAG.getBitcast(VT, DAG.getNode(X86ISD::VBROADCAST, dl, BcastVT,
++ NewBV));
++ }
++ }
++
+ // For AVX-length vectors, build the individual 128-bit pieces and use
+ // shuffles to put them in place.
+ if (VT.is256BitVector() || VT.is512BitVector()) {
+diff --git a/lib/Target/X86/X86InstrArithmetic.td b/lib/Target/X86/X86InstrArithmetic.td
+index 98cc8fb7439..3d5de637da2 100644
+--- a/lib/Target/X86/X86InstrArithmetic.td
++++ b/lib/Target/X86/X86InstrArithmetic.td
+@@ -1257,14 +1257,6 @@ let isCompare = 1 in {
+ def TEST32mi : BinOpMI_F<0xF6, "test", Xi32, X86testpat, MRM0m>;
+ let Predicates = [In64BitMode] in
+ def TEST64mi32 : BinOpMI_F<0xF6, "test", Xi64, X86testpat, MRM0m>;
+-
+- // When testing the result of EXTRACT_SUBREG sub_8bit_hi, make sure the
+- // register class is constrained to GR8_NOREX. This pseudo is explicitly
+- // marked side-effect free, since it doesn't have an isel pattern like
+- // other test instructions.
+- let isPseudo = 1, hasSideEffects = 0 in
+- def TEST8ri_NOREX : I<0, Pseudo, (outs), (ins GR8_NOREX:$src, i8imm:$mask),
+- "", [], IIC_BIN_NONMEM>, Sched<[WriteALU]>;
+ } // Defs = [EFLAGS]
+
+ def TEST8i8 : BinOpAI_F<0xA8, "test", Xi8 , AL,
+diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
+index 11ada51a870..84a9200a0ef 100644
+--- a/lib/Target/X86/X86InstrInfo.cpp
++++ b/lib/Target/X86/X86InstrInfo.cpp
+@@ -7854,9 +7854,6 @@ bool X86InstrInfo::expandPostRAPseudo(MachineInstr &MI) const {
+ case X86::VMOVUPSZ256mr_NOVLX:
+ return expandNOVLXStore(MIB, &getRegisterInfo(), get(X86::VMOVUPSYmr),
+ get(X86::VEXTRACTF64x4Zmr), X86::sub_ymm);
+- case X86::TEST8ri_NOREX:
+- MI.setDesc(get(X86::TEST8ri));
+- return true;
+ case X86::MOV32ri64:
+ MI.setDesc(get(X86::MOV32ri));
+ return true;
+diff --git a/lib/Target/X86/X86MacroFusion.cpp b/lib/Target/X86/X86MacroFusion.cpp
+index 67d95c2233d..4e11397dec4 100644
+--- a/lib/Target/X86/X86MacroFusion.cpp
++++ b/lib/Target/X86/X86MacroFusion.cpp
+@@ -86,7 +86,6 @@ static bool shouldScheduleAdjacent(const TargetInstrInfo &TII,
+ case X86::TEST16mr:
+ case X86::TEST32mr:
+ case X86::TEST64mr:
+- case X86::TEST8ri_NOREX:
+ case X86::AND16i16:
+ case X86::AND16ri:
+ case X86::AND16ri8:
+diff --git a/test/CodeGen/SystemZ/pr36164.ll b/test/CodeGen/SystemZ/pr36164.ll
+new file mode 100644
+index 00000000000..0c850091d31
+--- /dev/null
++++ b/test/CodeGen/SystemZ/pr36164.ll
+@@ -0,0 +1,113 @@
++; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
++; RUN: llc %s -o - -mtriple=s390x-linux-gnu -mcpu=z13 -disable-basicaa | FileCheck %s
++
++; This test checks that we do not a reference to a deleted node.
++
++%0 = type { i32 }
++
++@g_11 = external dso_local unnamed_addr global i1, align 4
++@g_69 = external dso_local global i32, align 4
++@g_73 = external dso_local unnamed_addr global i32, align 4
++@g_832 = external dso_local constant %0, align 4
++@g_938 = external dso_local unnamed_addr global i64, align 8
++
++; Function Attrs: nounwind
++define void @main() local_unnamed_addr #0 {
++; CHECK-LABEL: main:
++; CHECK: # %bb.0:
++; CHECK-NEXT: stmg %r12, %r15, 96(%r15)
++; CHECK-NEXT: .cfi_offset %r12, -64
++; CHECK-NEXT: .cfi_offset %r13, -56
++; CHECK-NEXT: .cfi_offset %r14, -48
++; CHECK-NEXT: .cfi_offset %r15, -40
++; CHECK-NEXT: lhi %r0, 1
++; CHECK-NEXT: larl %r1, g_938
++; CHECK-NEXT: lhi %r2, 2
++; CHECK-NEXT: lhi %r3, 3
++; CHECK-NEXT: lhi %r4, 0
++; CHECK-NEXT: lhi %r5, 4
++; CHECK-NEXT: larl %r14, g_11
++; CHECK-NEXT: .LBB0_1: # =>This Inner Loop Header: Depth=1
++; CHECK-NEXT: strl %r0, g_73
++; CHECK-NEXT: lrl %r13, g_832
++; CHECK-NEXT: lrl %r13, g_832
++; CHECK-NEXT: lrl %r13, g_832
++; CHECK-NEXT: lrl %r13, g_832
++; CHECK-NEXT: lrl %r13, g_832
++; CHECK-NEXT: lrl %r13, g_832
++; CHECK-NEXT: lrl %r13, g_832
++; CHECK-NEXT: lrl %r13, g_832
++; CHECK-NEXT: lrl %r13, g_832
++; CHECK-NEXT: lrl %r13, g_832
++; CHECK-NEXT: lrl %r13, g_832
++; CHECK-NEXT: lrl %r13, g_832
++; CHECK-NEXT: lrl %r13, g_832
++; CHECK-NEXT: lrl %r13, g_832
++; CHECK-NEXT: lrl %r13, g_832
++; CHECK-NEXT: strl %r0, g_69
++; CHECK-NEXT: lrl %r13, g_832
++; CHECK-NEXT: lghi %r13, 24
++; CHECK-NEXT: strl %r2, g_69
++; CHECK-NEXT: ag %r13, 0(%r1)
++; CHECK-NEXT: lrl %r12, g_832
++; CHECK-NEXT: strl %r3, g_69
++; CHECK-NEXT: lrl %r12, g_832
++; CHECK-NEXT: strl %r4, g_69
++; CHECK-NEXT: lrl %r12, g_832
++; CHECK-NEXT: strl %r0, g_69
++; CHECK-NEXT: lrl %r12, g_832
++; CHECK-NEXT: strl %r2, g_69
++; CHECK-NEXT: lrl %r12, g_832
++; CHECK-NEXT: strl %r3, g_69
++; CHECK-NEXT: stgrl %r13, g_938
++; CHECK-NEXT: lrl %r13, g_832
++; CHECK-NEXT: strl %r5, g_69
++; CHECK-NEXT: mvi 0(%r14), 1
++; CHECK-NEXT: j .LBB0_1
++ br label %1
++
++; <label>:1: ; preds = %1, %0
++ store i32 1, i32* @g_73, align 4
++ %2 = load i64, i64* @g_938, align 8
++ store i32 0, i32* @g_69, align 4
++ %3 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
++ %4 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
++ %5 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
++ %6 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
++ store i32 1, i32* @g_69, align 4
++ %7 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
++ %8 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
++ store i32 3, i32* @g_69, align 4
++ %9 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
++ %10 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
++ store i32 1, i32* @g_69, align 4
++ %11 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
++ store i32 2, i32* @g_69, align 4
++ %12 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
++ store i32 3, i32* @g_69, align 4
++ %13 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
++ store i32 0, i32* @g_69, align 4
++ %14 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
++ %15 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
++ %16 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
++ %17 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
++ store i32 1, i32* @g_69, align 4
++ %18 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
++ store i32 2, i32* @g_69, align 4
++ %19 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
++ store i32 3, i32* @g_69, align 4
++ %20 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
++ store i32 0, i32* @g_69, align 4
++ %21 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
++ store i32 1, i32* @g_69, align 4
++ %22 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
++ store i32 2, i32* @g_69, align 4
++ %23 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
++ store i32 3, i32* @g_69, align 4
++ %24 = add i64 %2, 24
++ store i64 %24, i64* @g_938, align 8
++ %25 = load volatile i32, i32* getelementptr inbounds (%0, %0* @g_832, i64 0, i32 0), align 4
++ store i32 4, i32* @g_69, align 4
++ store i1 true, i1* @g_11, align 4
++ br label %1
++}
+diff --git a/test/CodeGen/X86/2012-01-16-mfence-nosse-flags.ll b/test/CodeGen/X86/2012-01-16-mfence-nosse-flags.ll
+deleted file mode 100644
+index a6c34b8fffa..00000000000
+--- a/test/CodeGen/X86/2012-01-16-mfence-nosse-flags.ll
++++ /dev/null
+@@ -1,33 +0,0 @@
+-; RUN: llc < %s -verify-machineinstrs -mtriple=i686-linux -mattr=-sse | FileCheck %s
+-; PR11768
+-
+-@ptr = external global i8*
+-
+-define void @baz() nounwind ssp {
+-entry:
+- %0 = load i8*, i8** @ptr, align 4
+- %cmp = icmp eq i8* %0, null
+- fence seq_cst
+- br i1 %cmp, label %if.then, label %if.else
+-
+-; Make sure the fence comes before the comparison, since it
+-; clobbers EFLAGS.
+-
+-; CHECK: lock orl {{.*}}, (%esp)
+-; CHECK-NEXT: testl [[REG:%e[a-z]+]], [[REG]]
+-
+-if.then: ; preds = %entry
+- tail call void bitcast (void (...)* @foo to void ()*)() nounwind
+- br label %if.end
+-
+-if.else: ; preds = %entry
+- tail call void bitcast (void (...)* @bar to void ()*)() nounwind
+- br label %if.end
+-
+-if.end: ; preds = %if.else, %if.then
+- ret void
+-}
+-
+-declare void @foo(...)
+-
+-declare void @bar(...)
+diff --git a/test/CodeGen/X86/avg.ll b/test/CodeGen/X86/avg.ll
+index dd11f6ca293..d2b9984a7fc 100644
+--- a/test/CodeGen/X86/avg.ll
++++ b/test/CodeGen/X86/avg.ll
+@@ -90,12 +90,12 @@ define void @avg_v16i8(<16 x i8>* %a, <16 x i8>* %b) nounwind {
+ define void @avg_v32i8(<32 x i8>* %a, <32 x i8>* %b) nounwind {
+ ; SSE2-LABEL: avg_v32i8:
+ ; SSE2: # %bb.0:
+-; SSE2-NEXT: movdqa 16(%rdi), %xmm0
+-; SSE2-NEXT: movdqa (%rsi), %xmm1
+-; SSE2-NEXT: pavgb (%rdi), %xmm1
+-; SSE2-NEXT: pavgb 16(%rsi), %xmm0
+-; SSE2-NEXT: movdqu %xmm0, (%rax)
++; SSE2-NEXT: movdqa (%rsi), %xmm0
++; SSE2-NEXT: movdqa 16(%rsi), %xmm1
++; SSE2-NEXT: pavgb (%rdi), %xmm0
++; SSE2-NEXT: pavgb 16(%rdi), %xmm1
+ ; SSE2-NEXT: movdqu %xmm1, (%rax)
++; SSE2-NEXT: movdqu %xmm0, (%rax)
+ ; SSE2-NEXT: retq
+ ;
+ ; AVX1-LABEL: avg_v32i8:
+@@ -545,18 +545,18 @@ define void @avg_v48i8(<48 x i8>* %a, <48 x i8>* %b) nounwind {
+ define void @avg_v64i8(<64 x i8>* %a, <64 x i8>* %b) nounwind {
+ ; SSE2-LABEL: avg_v64i8:
+ ; SSE2: # %bb.0:
+-; SSE2-NEXT: movdqa 32(%rdi), %xmm0
+-; SSE2-NEXT: movdqa (%rsi), %xmm1
+-; SSE2-NEXT: movdqa 16(%rsi), %xmm2
++; SSE2-NEXT: movdqa (%rsi), %xmm0
++; SSE2-NEXT: movdqa 16(%rsi), %xmm1
++; SSE2-NEXT: movdqa 32(%rsi), %xmm2
+ ; SSE2-NEXT: movdqa 48(%rsi), %xmm3
+-; SSE2-NEXT: pavgb (%rdi), %xmm1
+-; SSE2-NEXT: pavgb 16(%rdi), %xmm2
+-; SSE2-NEXT: pavgb 32(%rsi), %xmm0
++; SSE2-NEXT: pavgb (%rdi), %xmm0
++; SSE2-NEXT: pavgb 16(%rdi), %xmm1
++; SSE2-NEXT: pavgb 32(%rdi), %xmm2
+ ; SSE2-NEXT: pavgb 48(%rdi), %xmm3
+ ; SSE2-NEXT: movdqu %xmm3, (%rax)
+-; SSE2-NEXT: movdqu %xmm0, (%rax)
+ ; SSE2-NEXT: movdqu %xmm2, (%rax)
+ ; SSE2-NEXT: movdqu %xmm1, (%rax)
++; SSE2-NEXT: movdqu %xmm0, (%rax)
+ ; SSE2-NEXT: retq
+ ;
+ ; AVX1-LABEL: avg_v64i8:
+@@ -582,23 +582,23 @@ define void @avg_v64i8(<64 x i8>* %a, <64 x i8>* %b) nounwind {
+ ;
+ ; AVX2-LABEL: avg_v64i8:
+ ; AVX2: # %bb.0:
+-; AVX2-NEXT: vmovdqa 32(%rdi), %ymm0
+-; AVX2-NEXT: vmovdqa (%rsi), %ymm1
+-; AVX2-NEXT: vpavgb (%rdi), %ymm1, %ymm1
+-; AVX2-NEXT: vpavgb 32(%rsi), %ymm0, %ymm0
+-; AVX2-NEXT: vmovdqu %ymm0, (%rax)
++; AVX2-NEXT: vmovdqa (%rsi), %ymm0
++; AVX2-NEXT: vmovdqa 32(%rsi), %ymm1
++; AVX2-NEXT: vpavgb (%rdi), %ymm0, %ymm0
++; AVX2-NEXT: vpavgb 32(%rdi), %ymm1, %ymm1
+ ; AVX2-NEXT: vmovdqu %ymm1, (%rax)
++; AVX2-NEXT: vmovdqu %ymm0, (%rax)
+ ; AVX2-NEXT: vzeroupper
+ ; AVX2-NEXT: retq
+ ;
+ ; AVX512F-LABEL: avg_v64i8:
+ ; AVX512F: # %bb.0:
+-; AVX512F-NEXT: vmovdqa 32(%rdi), %ymm0
+-; AVX512F-NEXT: vmovdqa (%rsi), %ymm1
+-; AVX512F-NEXT: vpavgb (%rdi), %ymm1, %ymm1
+-; AVX512F-NEXT: vpavgb 32(%rsi), %ymm0, %ymm0
+-; AVX512F-NEXT: vmovdqu %ymm0, (%rax)
++; AVX512F-NEXT: vmovdqa (%rsi), %ymm0
++; AVX512F-NEXT: vmovdqa 32(%rsi), %ymm1
++; AVX512F-NEXT: vpavgb (%rdi), %ymm0, %ymm0
++; AVX512F-NEXT: vpavgb 32(%rdi), %ymm1, %ymm1
+ ; AVX512F-NEXT: vmovdqu %ymm1, (%rax)
++; AVX512F-NEXT: vmovdqu %ymm0, (%rax)
+ ; AVX512F-NEXT: vzeroupper
+ ; AVX512F-NEXT: retq
+ ;
+@@ -678,12 +678,12 @@ define void @avg_v8i16(<8 x i16>* %a, <8 x i16>* %b) nounwind {
+ define void @avg_v16i16(<16 x i16>* %a, <16 x i16>* %b) nounwind {
+ ; SSE2-LABEL: avg_v16i16:
+ ; SSE2: # %bb.0:
+-; SSE2-NEXT: movdqa 16(%rdi), %xmm0
+-; SSE2-NEXT: movdqa (%rsi), %xmm1
+-; SSE2-NEXT: pavgw (%rdi), %xmm1
+-; SSE2-NEXT: pavgw 16(%rsi), %xmm0
+-; SSE2-NEXT: movdqu %xmm0, (%rax)
++; SSE2-NEXT: movdqa (%rsi), %xmm0
++; SSE2-NEXT: movdqa 16(%rsi), %xmm1
++; SSE2-NEXT: pavgw (%rdi), %xmm0
++; SSE2-NEXT: pavgw 16(%rdi), %xmm1
+ ; SSE2-NEXT: movdqu %xmm1, (%rax)
++; SSE2-NEXT: movdqu %xmm0, (%rax)
+ ; SSE2-NEXT: retq
+ ;
+ ; AVX1-LABEL: avg_v16i16:
+@@ -729,18 +729,18 @@ define void @avg_v16i16(<16 x i16>* %a, <16 x i16>* %b) nounwind {
+ define void @avg_v32i16(<32 x i16>* %a, <32 x i16>* %b) nounwind {
+ ; SSE2-LABEL: avg_v32i16:
+ ; SSE2: # %bb.0:
+-; SSE2-NEXT: movdqa 32(%rdi), %xmm0
+-; SSE2-NEXT: movdqa (%rsi), %xmm1
+-; SSE2-NEXT: movdqa 16(%rsi), %xmm2
++; SSE2-NEXT: movdqa (%rsi), %xmm0
++; SSE2-NEXT: movdqa 16(%rsi), %xmm1
++; SSE2-NEXT: movdqa 32(%rsi), %xmm2
+ ; SSE2-NEXT: movdqa 48(%rsi), %xmm3
+-; SSE2-NEXT: pavgw (%rdi), %xmm1
+-; SSE2-NEXT: pavgw 16(%rdi), %xmm2
+-; SSE2-NEXT: pavgw 32(%rsi), %xmm0
++; SSE2-NEXT: pavgw (%rdi), %xmm0
++; SSE2-NEXT: pavgw 16(%rdi), %xmm1
++; SSE2-NEXT: pavgw 32(%rdi), %xmm2
+ ; SSE2-NEXT: pavgw 48(%rdi), %xmm3
+ ; SSE2-NEXT: movdqu %xmm3, (%rax)
+-; SSE2-NEXT: movdqu %xmm0, (%rax)
+ ; SSE2-NEXT: movdqu %xmm2, (%rax)
+ ; SSE2-NEXT: movdqu %xmm1, (%rax)
++; SSE2-NEXT: movdqu %xmm0, (%rax)
+ ; SSE2-NEXT: retq
+ ;
+ ; AVX1-LABEL: avg_v32i16:
+@@ -766,23 +766,23 @@ define void @avg_v32i16(<32 x i16>* %a, <32 x i16>* %b) nounwind {
+ ;
+ ; AVX2-LABEL: avg_v32i16:
+ ; AVX2: # %bb.0:
+-; AVX2-NEXT: vmovdqa 32(%rdi), %ymm0
+-; AVX2-NEXT: vmovdqa (%rsi), %ymm1
+-; AVX2-NEXT: vpavgw (%rdi), %ymm1, %ymm1
+-; AVX2-NEXT: vpavgw 32(%rsi), %ymm0, %ymm0
+-; AVX2-NEXT: vmovdqu %ymm0, (%rax)
++; AVX2-NEXT: vmovdqa (%rsi), %ymm0
++; AVX2-NEXT: vmovdqa 32(%rsi), %ymm1
++; AVX2-NEXT: vpavgw (%rdi), %ymm0, %ymm0
++; AVX2-NEXT: vpavgw 32(%rdi), %ymm1, %ymm1
+ ; AVX2-NEXT: vmovdqu %ymm1, (%rax)
++; AVX2-NEXT: vmovdqu %ymm0, (%rax)
+ ; AVX2-NEXT: vzeroupper
+ ; AVX2-NEXT: retq
+ ;
+ ; AVX512F-LABEL: avg_v32i16:
+ ; AVX512F: # %bb.0:
+-; AVX512F-NEXT: vmovdqa 32(%rdi), %ymm0
+-; AVX512F-NEXT: vmovdqa (%rsi), %ymm1
+-; AVX512F-NEXT: vpavgw (%rdi), %ymm1, %ymm1
+-; AVX512F-NEXT: vpavgw 32(%rsi), %ymm0, %ymm0
+-; AVX512F-NEXT: vmovdqu %ymm0, (%rax)
++; AVX512F-NEXT: vmovdqa (%rsi), %ymm0
++; AVX512F-NEXT: vmovdqa 32(%rsi), %ymm1
++; AVX512F-NEXT: vpavgw (%rdi), %ymm0, %ymm0
++; AVX512F-NEXT: vpavgw 32(%rdi), %ymm1, %ymm1
+ ; AVX512F-NEXT: vmovdqu %ymm1, (%rax)
++; AVX512F-NEXT: vmovdqu %ymm0, (%rax)
+ ; AVX512F-NEXT: vzeroupper
+ ; AVX512F-NEXT: retq
+ ;
+@@ -891,9 +891,9 @@ define void @avg_v32i8_2(<32 x i8>* %a, <32 x i8>* %b) nounwind {
+ ; SSE2-LABEL: avg_v32i8_2:
+ ; SSE2: # %bb.0:
+ ; SSE2-NEXT: movdqa (%rdi), %xmm0
+-; SSE2-NEXT: movdqa 16(%rsi), %xmm1
++; SSE2-NEXT: movdqa 16(%rdi), %xmm1
+ ; SSE2-NEXT: pavgb (%rsi), %xmm0
+-; SSE2-NEXT: pavgb 16(%rdi), %xmm1
++; SSE2-NEXT: pavgb 16(%rsi), %xmm1
+ ; SSE2-NEXT: movdqu %xmm1, (%rax)
+ ; SSE2-NEXT: movdqu %xmm0, (%rax)
+ ; SSE2-NEXT: retq
+@@ -1072,9 +1072,9 @@ define void @avg_v16i16_2(<16 x i16>* %a, <16 x i16>* %b) nounwind {
+ ; SSE2-LABEL: avg_v16i16_2:
+ ; SSE2: # %bb.0:
+ ; SSE2-NEXT: movdqa (%rdi), %xmm0
+-; SSE2-NEXT: movdqa 16(%rsi), %xmm1
++; SSE2-NEXT: movdqa 16(%rdi), %xmm1
+ ; SSE2-NEXT: pavgw (%rsi), %xmm0
+-; SSE2-NEXT: pavgw 16(%rdi), %xmm1
++; SSE2-NEXT: pavgw 16(%rsi), %xmm1
+ ; SSE2-NEXT: movdqu %xmm1, (%rax)
+ ; SSE2-NEXT: movdqu %xmm0, (%rax)
+ ; SSE2-NEXT: retq
+@@ -1124,14 +1124,14 @@ define void @avg_v32i16_2(<32 x i16>* %a, <32 x i16>* %b) nounwind {
+ ; SSE2: # %bb.0:
+ ; SSE2-NEXT: movdqa (%rdi), %xmm0
+ ; SSE2-NEXT: movdqa 16(%rdi), %xmm1
+-; SSE2-NEXT: movdqa 48(%rdi), %xmm2
+-; SSE2-NEXT: movdqa 32(%rsi), %xmm3
++; SSE2-NEXT: movdqa 32(%rdi), %xmm2
++; SSE2-NEXT: movdqa 48(%rdi), %xmm3
+ ; SSE2-NEXT: pavgw (%rsi), %xmm0
+ ; SSE2-NEXT: pavgw 16(%rsi), %xmm1
+-; SSE2-NEXT: pavgw 32(%rdi), %xmm3
+-; SSE2-NEXT: pavgw 48(%rsi), %xmm2
+-; SSE2-NEXT: movdqu %xmm2, (%rax)
++; SSE2-NEXT: pavgw 32(%rsi), %xmm2
++; SSE2-NEXT: pavgw 48(%rsi), %xmm3
+ ; SSE2-NEXT: movdqu %xmm3, (%rax)
++; SSE2-NEXT: movdqu %xmm2, (%rax)
+ ; SSE2-NEXT: movdqu %xmm1, (%rax)
+ ; SSE2-NEXT: movdqu %xmm0, (%rax)
+ ; SSE2-NEXT: retq
+@@ -1160,9 +1160,9 @@ define void @avg_v32i16_2(<32 x i16>* %a, <32 x i16>* %b) nounwind {
+ ; AVX2-LABEL: avg_v32i16_2:
+ ; AVX2: # %bb.0:
+ ; AVX2-NEXT: vmovdqa (%rdi), %ymm0
+-; AVX2-NEXT: vmovdqa 32(%rsi), %ymm1
++; AVX2-NEXT: vmovdqa 32(%rdi), %ymm1
+ ; AVX2-NEXT: vpavgw (%rsi), %ymm0, %ymm0
+-; AVX2-NEXT: vpavgw 32(%rdi), %ymm1, %ymm1
++; AVX2-NEXT: vpavgw 32(%rsi), %ymm1, %ymm1
+ ; AVX2-NEXT: vmovdqu %ymm1, (%rax)
+ ; AVX2-NEXT: vmovdqu %ymm0, (%rax)
+ ; AVX2-NEXT: vzeroupper
+@@ -1171,9 +1171,9 @@ define void @avg_v32i16_2(<32 x i16>* %a, <32 x i16>* %b) nounwind {
+ ; AVX512F-LABEL: avg_v32i16_2:
+ ; AVX512F: # %bb.0:
+ ; AVX512F-NEXT: vmovdqa (%rdi), %ymm0
+-; AVX512F-NEXT: vmovdqa 32(%rsi), %ymm1
++; AVX512F-NEXT: vmovdqa 32(%rdi), %ymm1
+ ; AVX512F-NEXT: vpavgw (%rsi), %ymm0, %ymm0
+-; AVX512F-NEXT: vpavgw 32(%rdi), %ymm1, %ymm1
++; AVX512F-NEXT: vpavgw 32(%rsi), %ymm1, %ymm1
+ ; AVX512F-NEXT: vmovdqu %ymm1, (%rax)
+ ; AVX512F-NEXT: vmovdqu %ymm0, (%rax)
+ ; AVX512F-NEXT: vzeroupper
+diff --git a/test/CodeGen/X86/avx-vbroadcastf128.ll b/test/CodeGen/X86/avx-vbroadcastf128.ll
+index 7fdbf31a993..b5026437153 100644
+--- a/test/CodeGen/X86/avx-vbroadcastf128.ll
++++ b/test/CodeGen/X86/avx-vbroadcastf128.ll
+@@ -235,18 +235,16 @@ define <8 x i32> @PR29088(<4 x i32>* %p0, <8 x float>* %p1) {
+ ; X32: # %bb.0:
+ ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+ ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32-NEXT: vmovaps (%ecx), %xmm0
+ ; X32-NEXT: vxorps %xmm1, %xmm1, %xmm1
++; X32-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+ ; X32-NEXT: vmovaps %ymm1, (%eax)
+-; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+ ; X32-NEXT: retl
+ ;
+ ; X64-LABEL: PR29088:
+ ; X64: # %bb.0:
+-; X64-NEXT: vmovaps (%rdi), %xmm0
+ ; X64-NEXT: vxorps %xmm1, %xmm1, %xmm1
++; X64-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+ ; X64-NEXT: vmovaps %ymm1, (%rsi)
+-; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+ ; X64-NEXT: retq
+ %ld = load <4 x i32>, <4 x i32>* %p0
+ store <8 x float> zeroinitializer, <8 x float>* %p1
+diff --git a/test/CodeGen/X86/avx2-vbroadcast.ll b/test/CodeGen/X86/avx2-vbroadcast.ll
+index e5506257e4c..3ae6c0b9d81 100644
+--- a/test/CodeGen/X86/avx2-vbroadcast.ll
++++ b/test/CodeGen/X86/avx2-vbroadcast.ll
+@@ -189,12 +189,7 @@ define <2 x i64> @Q64(i64* %ptr) nounwind uwtable readnone ssp {
+ ; X32-LABEL: Q64:
+ ; X32: ## %bb.0: ## %entry
+ ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-NEXT: movl (%eax), %ecx
+-; X32-NEXT: movl 4(%eax), %eax
+-; X32-NEXT: vmovd %ecx, %xmm0
+-; X32-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
+-; X32-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0
+-; X32-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0
++; X32-NEXT: vpbroadcastq (%eax), %xmm0
+ ; X32-NEXT: retl
+ ;
+ ; X64-LABEL: Q64:
+@@ -212,13 +207,8 @@ define <4 x i64> @QQ64(i64* %ptr) nounwind uwtable readnone ssp {
+ ; X32-LABEL: QQ64:
+ ; X32: ## %bb.0: ## %entry
+ ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-NEXT: movl (%eax), %ecx
+-; X32-NEXT: movl 4(%eax), %eax
+-; X32-NEXT: vmovd %ecx, %xmm0
+-; X32-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
+-; X32-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0
+-; X32-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0
+-; X32-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
++; X32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
++; X32-NEXT: vbroadcastsd %xmm0, %ymm0
+ ; X32-NEXT: retl
+ ;
+ ; X64-LABEL: QQ64:
+@@ -1075,9 +1065,7 @@ define void @isel_crash_16b(i8* %cV_R.addr) {
+ ; X64: ## %bb.0: ## %eintry
+ ; X64-NEXT: vxorps %xmm0, %xmm0, %xmm0
+ ; X64-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
+-; X64-NEXT: movb (%rdi), %al
+-; X64-NEXT: vmovd %eax, %xmm1
+-; X64-NEXT: vpbroadcastb %xmm1, %xmm1
++; X64-NEXT: vpbroadcastb (%rdi), %xmm1
+ ; X64-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
+ ; X64-NEXT: vmovdqa %xmm1, -{{[0-9]+}}(%rsp)
+ ; X64-NEXT: retq
+@@ -1128,9 +1116,7 @@ define void @isel_crash_32b(i8* %cV_R.addr) {
+ ; X64-NEXT: subq $128, %rsp
+ ; X64-NEXT: vxorps %xmm0, %xmm0, %xmm0
+ ; X64-NEXT: vmovaps %ymm0, (%rsp)
+-; X64-NEXT: movb (%rdi), %al
+-; X64-NEXT: vmovd %eax, %xmm1
+-; X64-NEXT: vpbroadcastb %xmm1, %ymm1
++; X64-NEXT: vpbroadcastb (%rdi), %ymm1
+ ; X64-NEXT: vmovaps %ymm0, {{[0-9]+}}(%rsp)
+ ; X64-NEXT: vmovdqa %ymm1, {{[0-9]+}}(%rsp)
+ ; X64-NEXT: movq %rbp, %rsp
+@@ -1170,9 +1156,7 @@ define void @isel_crash_8w(i16* %cV_R.addr) {
+ ; X64: ## %bb.0: ## %entry
+ ; X64-NEXT: vxorps %xmm0, %xmm0, %xmm0
+ ; X64-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
+-; X64-NEXT: movzwl (%rdi), %eax
+-; X64-NEXT: vmovd %eax, %xmm1
+-; X64-NEXT: vpbroadcastw %xmm1, %xmm1
++; X64-NEXT: vpbroadcastw (%rdi), %xmm1
+ ; X64-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
+ ; X64-NEXT: vmovdqa %xmm1, -{{[0-9]+}}(%rsp)
+ ; X64-NEXT: retq
+@@ -1223,9 +1207,7 @@ define void @isel_crash_16w(i16* %cV_R.addr) {
+ ; X64-NEXT: subq $128, %rsp
+ ; X64-NEXT: vxorps %xmm0, %xmm0, %xmm0
+ ; X64-NEXT: vmovaps %ymm0, (%rsp)
+-; X64-NEXT: movzwl (%rdi), %eax
+-; X64-NEXT: vmovd %eax, %xmm1
+-; X64-NEXT: vpbroadcastw %xmm1, %ymm1
++; X64-NEXT: vpbroadcastw (%rdi), %ymm1
+ ; X64-NEXT: vmovaps %ymm0, {{[0-9]+}}(%rsp)
+ ; X64-NEXT: vmovdqa %ymm1, {{[0-9]+}}(%rsp)
+ ; X64-NEXT: movq %rbp, %rsp
+@@ -1261,26 +1243,14 @@ define void @isel_crash_4d(i32* %cV_R.addr) {
+ ; X32-NEXT: addl $60, %esp
+ ; X32-NEXT: retl
+ ;
+-; X64-AVX2-LABEL: isel_crash_4d:
+-; X64-AVX2: ## %bb.0: ## %entry
+-; X64-AVX2-NEXT: vxorps %xmm0, %xmm0, %xmm0
+-; X64-AVX2-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
+-; X64-AVX2-NEXT: movl (%rdi), %eax
+-; X64-AVX2-NEXT: vmovd %eax, %xmm1
+-; X64-AVX2-NEXT: vpbroadcastd %xmm1, %xmm1
+-; X64-AVX2-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
+-; X64-AVX2-NEXT: vmovdqa %xmm1, -{{[0-9]+}}(%rsp)
+-; X64-AVX2-NEXT: retq
+-;
+-; X64-AVX512VL-LABEL: isel_crash_4d:
+-; X64-AVX512VL: ## %bb.0: ## %entry
+-; X64-AVX512VL-NEXT: vxorps %xmm0, %xmm0, %xmm0
+-; X64-AVX512VL-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
+-; X64-AVX512VL-NEXT: movl (%rdi), %eax
+-; X64-AVX512VL-NEXT: vpbroadcastd %eax, %xmm1
+-; X64-AVX512VL-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
+-; X64-AVX512VL-NEXT: vmovdqa %xmm1, -{{[0-9]+}}(%rsp)
+-; X64-AVX512VL-NEXT: retq
++; X64-LABEL: isel_crash_4d:
++; X64: ## %bb.0: ## %entry
++; X64-NEXT: vxorps %xmm0, %xmm0, %xmm0
++; X64-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
++; X64-NEXT: vbroadcastss (%rdi), %xmm1
++; X64-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
++; X64-NEXT: vmovaps %xmm1, -{{[0-9]+}}(%rsp)
++; X64-NEXT: retq
+ entry:
+ %__a.addr.i = alloca <2 x i64>, align 16
+ %__b.addr.i = alloca <2 x i64>, align 16
+@@ -1317,46 +1287,24 @@ define void @isel_crash_8d(i32* %cV_R.addr) {
+ ; X32-NEXT: vzeroupper
+ ; X32-NEXT: retl
+ ;
+-; X64-AVX2-LABEL: isel_crash_8d:
+-; X64-AVX2: ## %bb.0: ## %eintry
+-; X64-AVX2-NEXT: pushq %rbp
+-; X64-AVX2-NEXT: .cfi_def_cfa_offset 16
+-; X64-AVX2-NEXT: .cfi_offset %rbp, -16
+-; X64-AVX2-NEXT: movq %rsp, %rbp
+-; X64-AVX2-NEXT: .cfi_def_cfa_register %rbp
+-; X64-AVX2-NEXT: andq $-32, %rsp
+-; X64-AVX2-NEXT: subq $128, %rsp
+-; X64-AVX2-NEXT: vxorps %xmm0, %xmm0, %xmm0
+-; X64-AVX2-NEXT: vmovaps %ymm0, (%rsp)
+-; X64-AVX2-NEXT: movl (%rdi), %eax
+-; X64-AVX2-NEXT: vmovd %eax, %xmm1
+-; X64-AVX2-NEXT: vpbroadcastd %xmm1, %ymm1
+-; X64-AVX2-NEXT: vmovaps %ymm0, {{[0-9]+}}(%rsp)
+-; X64-AVX2-NEXT: vmovdqa %ymm1, {{[0-9]+}}(%rsp)
+-; X64-AVX2-NEXT: movq %rbp, %rsp
+-; X64-AVX2-NEXT: popq %rbp
+-; X64-AVX2-NEXT: vzeroupper
+-; X64-AVX2-NEXT: retq
+-;
+-; X64-AVX512VL-LABEL: isel_crash_8d:
+-; X64-AVX512VL: ## %bb.0: ## %eintry
+-; X64-AVX512VL-NEXT: pushq %rbp
+-; X64-AVX512VL-NEXT: .cfi_def_cfa_offset 16
+-; X64-AVX512VL-NEXT: .cfi_offset %rbp, -16
+-; X64-AVX512VL-NEXT: movq %rsp, %rbp
+-; X64-AVX512VL-NEXT: .cfi_def_cfa_register %rbp
+-; X64-AVX512VL-NEXT: andq $-32, %rsp
+-; X64-AVX512VL-NEXT: subq $128, %rsp
+-; X64-AVX512VL-NEXT: vxorps %xmm0, %xmm0, %xmm0
+-; X64-AVX512VL-NEXT: vmovaps %ymm0, (%rsp)
+-; X64-AVX512VL-NEXT: movl (%rdi), %eax
+-; X64-AVX512VL-NEXT: vpbroadcastd %eax, %ymm1
+-; X64-AVX512VL-NEXT: vmovaps %ymm0, {{[0-9]+}}(%rsp)
+-; X64-AVX512VL-NEXT: vmovdqa %ymm1, {{[0-9]+}}(%rsp)
+-; X64-AVX512VL-NEXT: movq %rbp, %rsp
+-; X64-AVX512VL-NEXT: popq %rbp
+-; X64-AVX512VL-NEXT: vzeroupper
+-; X64-AVX512VL-NEXT: retq
++; X64-LABEL: isel_crash_8d:
++; X64: ## %bb.0: ## %eintry
++; X64-NEXT: pushq %rbp
++; X64-NEXT: .cfi_def_cfa_offset 16
++; X64-NEXT: .cfi_offset %rbp, -16
++; X64-NEXT: movq %rsp, %rbp
++; X64-NEXT: .cfi_def_cfa_register %rbp
++; X64-NEXT: andq $-32, %rsp
++; X64-NEXT: subq $128, %rsp
++; X64-NEXT: vxorps %xmm0, %xmm0, %xmm0
++; X64-NEXT: vmovaps %ymm0, (%rsp)
++; X64-NEXT: vbroadcastss (%rdi), %ymm1
++; X64-NEXT: vmovaps %ymm0, {{[0-9]+}}(%rsp)
++; X64-NEXT: vmovaps %ymm1, {{[0-9]+}}(%rsp)
++; X64-NEXT: movq %rbp, %rsp
++; X64-NEXT: popq %rbp
++; X64-NEXT: vzeroupper
++; X64-NEXT: retq
+ eintry:
+ %__a.addr.i = alloca <4 x i64>, align 16
+ %__b.addr.i = alloca <4 x i64>, align 16
+@@ -1380,37 +1328,20 @@ define void @isel_crash_2q(i64* %cV_R.addr) {
+ ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+ ; X32-NEXT: vxorps %xmm0, %xmm0, %xmm0
+ ; X32-NEXT: vmovaps %xmm0, (%esp)
+-; X32-NEXT: movl (%eax), %ecx
+-; X32-NEXT: movl 4(%eax), %eax
+-; X32-NEXT: vmovd %ecx, %xmm1
+-; X32-NEXT: vpinsrd $1, %eax, %xmm1, %xmm1
+-; X32-NEXT: vpinsrd $2, %ecx, %xmm1, %xmm1
+-; X32-NEXT: vpinsrd $3, %eax, %xmm1, %xmm1
++; X32-NEXT: vpbroadcastq (%eax), %xmm1
+ ; X32-NEXT: vmovaps %xmm0, {{[0-9]+}}(%esp)
+ ; X32-NEXT: vmovdqa %xmm1, {{[0-9]+}}(%esp)
+ ; X32-NEXT: addl $60, %esp
+ ; X32-NEXT: retl
+ ;
+-; X64-AVX2-LABEL: isel_crash_2q:
+-; X64-AVX2: ## %bb.0: ## %entry
+-; X64-AVX2-NEXT: vxorps %xmm0, %xmm0, %xmm0
+-; X64-AVX2-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
+-; X64-AVX2-NEXT: movq (%rdi), %rax
+-; X64-AVX2-NEXT: vmovq %rax, %xmm1
+-; X64-AVX2-NEXT: vpbroadcastq %xmm1, %xmm1
+-; X64-AVX2-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
+-; X64-AVX2-NEXT: vmovdqa %xmm1, -{{[0-9]+}}(%rsp)
+-; X64-AVX2-NEXT: retq
+-;
+-; X64-AVX512VL-LABEL: isel_crash_2q:
+-; X64-AVX512VL: ## %bb.0: ## %entry
+-; X64-AVX512VL-NEXT: vxorps %xmm0, %xmm0, %xmm0
+-; X64-AVX512VL-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
+-; X64-AVX512VL-NEXT: movq (%rdi), %rax
+-; X64-AVX512VL-NEXT: vpbroadcastq %rax, %xmm1
+-; X64-AVX512VL-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
+-; X64-AVX512VL-NEXT: vmovdqa %xmm1, -{{[0-9]+}}(%rsp)
+-; X64-AVX512VL-NEXT: retq
++; X64-LABEL: isel_crash_2q:
++; X64: ## %bb.0: ## %entry
++; X64-NEXT: vxorps %xmm0, %xmm0, %xmm0
++; X64-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
++; X64-NEXT: vpbroadcastq (%rdi), %xmm1
++; X64-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
++; X64-NEXT: vmovdqa %xmm1, -{{[0-9]+}}(%rsp)
++; X64-NEXT: retq
+ entry:
+ %__a.addr.i = alloca <2 x i64>, align 16
+ %__b.addr.i = alloca <2 x i64>, align 16
+@@ -1438,60 +1369,33 @@ define void @isel_crash_4q(i64* %cV_R.addr) {
+ ; X32-NEXT: movl 8(%ebp), %eax
+ ; X32-NEXT: vxorps %xmm0, %xmm0, %xmm0
+ ; X32-NEXT: vmovaps %ymm0, (%esp)
+-; X32-NEXT: movl (%eax), %ecx
+-; X32-NEXT: movl 4(%eax), %eax
+-; X32-NEXT: vmovd %ecx, %xmm1
+-; X32-NEXT: vpinsrd $1, %eax, %xmm1, %xmm1
+-; X32-NEXT: vpinsrd $2, %ecx, %xmm1, %xmm1
+-; X32-NEXT: vpinsrd $3, %eax, %xmm1, %xmm1
+-; X32-NEXT: vinserti128 $1, %xmm1, %ymm1, %ymm1
++; X32-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
++; X32-NEXT: vbroadcastsd %xmm1, %ymm1
+ ; X32-NEXT: vmovaps %ymm0, {{[0-9]+}}(%esp)
+-; X32-NEXT: vmovdqa %ymm1, {{[0-9]+}}(%esp)
++; X32-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp)
+ ; X32-NEXT: movl %ebp, %esp
+ ; X32-NEXT: popl %ebp
+ ; X32-NEXT: vzeroupper
+ ; X32-NEXT: retl
+ ;
+-; X64-AVX2-LABEL: isel_crash_4q:
+-; X64-AVX2: ## %bb.0: ## %eintry
+-; X64-AVX2-NEXT: pushq %rbp
+-; X64-AVX2-NEXT: .cfi_def_cfa_offset 16
+-; X64-AVX2-NEXT: .cfi_offset %rbp, -16
+-; X64-AVX2-NEXT: movq %rsp, %rbp
+-; X64-AVX2-NEXT: .cfi_def_cfa_register %rbp
+-; X64-AVX2-NEXT: andq $-32, %rsp
+-; X64-AVX2-NEXT: subq $128, %rsp
+-; X64-AVX2-NEXT: vxorps %xmm0, %xmm0, %xmm0
+-; X64-AVX2-NEXT: vmovaps %ymm0, (%rsp)
+-; X64-AVX2-NEXT: movq (%rdi), %rax
+-; X64-AVX2-NEXT: vmovq %rax, %xmm1
+-; X64-AVX2-NEXT: vpbroadcastq %xmm1, %ymm1
+-; X64-AVX2-NEXT: vmovaps %ymm0, {{[0-9]+}}(%rsp)
+-; X64-AVX2-NEXT: vmovdqa %ymm1, {{[0-9]+}}(%rsp)
+-; X64-AVX2-NEXT: movq %rbp, %rsp
+-; X64-AVX2-NEXT: popq %rbp
+-; X64-AVX2-NEXT: vzeroupper
+-; X64-AVX2-NEXT: retq
+-;
+-; X64-AVX512VL-LABEL: isel_crash_4q:
+-; X64-AVX512VL: ## %bb.0: ## %eintry
+-; X64-AVX512VL-NEXT: pushq %rbp
+-; X64-AVX512VL-NEXT: .cfi_def_cfa_offset 16
+-; X64-AVX512VL-NEXT: .cfi_offset %rbp, -16
+-; X64-AVX512VL-NEXT: movq %rsp, %rbp
+-; X64-AVX512VL-NEXT: .cfi_def_cfa_register %rbp
+-; X64-AVX512VL-NEXT: andq $-32, %rsp
+-; X64-AVX512VL-NEXT: subq $128, %rsp
+-; X64-AVX512VL-NEXT: vxorps %xmm0, %xmm0, %xmm0
+-; X64-AVX512VL-NEXT: vmovaps %ymm0, (%rsp)
+-; X64-AVX512VL-NEXT: movq (%rdi), %rax
+-; X64-AVX512VL-NEXT: vpbroadcastq %rax, %ymm1
+-; X64-AVX512VL-NEXT: vmovaps %ymm0, {{[0-9]+}}(%rsp)
+-; X64-AVX512VL-NEXT: vmovdqa %ymm1, {{[0-9]+}}(%rsp)
+-; X64-AVX512VL-NEXT: movq %rbp, %rsp
+-; X64-AVX512VL-NEXT: popq %rbp
+-; X64-AVX512VL-NEXT: vzeroupper
+-; X64-AVX512VL-NEXT: retq
++; X64-LABEL: isel_crash_4q:
++; X64: ## %bb.0: ## %eintry
++; X64-NEXT: pushq %rbp
++; X64-NEXT: .cfi_def_cfa_offset 16
++; X64-NEXT: .cfi_offset %rbp, -16
++; X64-NEXT: movq %rsp, %rbp
++; X64-NEXT: .cfi_def_cfa_register %rbp
++; X64-NEXT: andq $-32, %rsp
++; X64-NEXT: subq $128, %rsp
++; X64-NEXT: vxorps %xmm0, %xmm0, %xmm0
++; X64-NEXT: vmovaps %ymm0, (%rsp)
++; X64-NEXT: vbroadcastsd (%rdi), %ymm1
++; X64-NEXT: vmovaps %ymm0, {{[0-9]+}}(%rsp)
++; X64-NEXT: vmovaps %ymm1, {{[0-9]+}}(%rsp)
++; X64-NEXT: movq %rbp, %rsp
++; X64-NEXT: popq %rbp
++; X64-NEXT: vzeroupper
++; X64-NEXT: retq
+ eintry:
+ %__a.addr.i = alloca <4 x i64>, align 16
+ %__b.addr.i = alloca <4 x i64>, align 16
+diff --git a/test/CodeGen/X86/avx2-vbroadcasti128.ll b/test/CodeGen/X86/avx2-vbroadcasti128.ll
+index 254cdfdd8cb..996e6796616 100644
+--- a/test/CodeGen/X86/avx2-vbroadcasti128.ll
++++ b/test/CodeGen/X86/avx2-vbroadcasti128.ll
+@@ -271,18 +271,16 @@ define <8 x i32> @PR29088(<4 x i32>* %p0, <8 x float>* %p1) {
+ ; X32: # %bb.0:
+ ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+ ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32-NEXT: vmovaps (%ecx), %xmm0
+ ; X32-NEXT: vxorps %xmm1, %xmm1, %xmm1
++; X32-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+ ; X32-NEXT: vmovaps %ymm1, (%eax)
+-; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+ ; X32-NEXT: retl
+ ;
+ ; X64-LABEL: PR29088:
+ ; X64: # %bb.0:
+-; X64-NEXT: vmovaps (%rdi), %xmm0
+ ; X64-NEXT: vxorps %xmm1, %xmm1, %xmm1
++; X64-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+ ; X64-NEXT: vmovaps %ymm1, (%rsi)
+-; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+ ; X64-NEXT: retq
+ %ld = load <4 x i32>, <4 x i32>* %p0
+ store <8 x float> zeroinitializer, <8 x float>* %p1
+diff --git a/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll b/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
+index 80127f66bdf..8ebbbd4b49f 100644
+--- a/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
++++ b/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
+@@ -435,16 +435,11 @@ entry:
+ define <8 x i64> @test_mm512_mask_set1_epi64(<8 x i64> %__O, i8 zeroext %__M, i64 %__A) {
+ ; X32-LABEL: test_mm512_mask_set1_epi64:
+ ; X32: # %bb.0: # %entry
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
+ ; X32-NEXT: movb {{[0-9]+}}(%esp), %al
+-; X32-NEXT: vmovd %edx, %xmm1
+-; X32-NEXT: vpinsrd $1, %ecx, %xmm1, %xmm1
+-; X32-NEXT: vpinsrd $2, %edx, %xmm1, %xmm1
+-; X32-NEXT: vpinsrd $3, %ecx, %xmm1, %xmm1
+-; X32-NEXT: vinserti128 $1, %xmm1, %ymm1, %ymm1
++; X32-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero
++; X32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm1, %xmm1
+ ; X32-NEXT: kmovw %eax, %k1
+-; X32-NEXT: vinserti64x4 $1, %ymm1, %zmm1, %zmm0 {%k1}
++; X32-NEXT: vpbroadcastq %xmm1, %zmm0 {%k1}
+ ; X32-NEXT: retl
+ ;
+ ; X64-LABEL: test_mm512_mask_set1_epi64:
+@@ -463,16 +458,11 @@ entry:
+ define <8 x i64> @test_mm512_maskz_set1_epi64(i8 zeroext %__M, i64 %__A) {
+ ; X32-LABEL: test_mm512_maskz_set1_epi64:
+ ; X32: # %bb.0: # %entry
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
+ ; X32-NEXT: movb {{[0-9]+}}(%esp), %al
+-; X32-NEXT: vmovd %edx, %xmm0
+-; X32-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0
+-; X32-NEXT: vpinsrd $2, %edx, %xmm0, %xmm0
+-; X32-NEXT: vpinsrd $3, %ecx, %xmm0, %xmm0
+-; X32-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
++; X32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
++; X32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm0, %xmm0
+ ; X32-NEXT: kmovw %eax, %k1
+-; X32-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm0 {%k1} {z}
++; X32-NEXT: vpbroadcastq %xmm0, %zmm0 {%k1} {z}
+ ; X32-NEXT: retl
+ ;
+ ; X64-LABEL: test_mm512_maskz_set1_epi64:
+diff --git a/test/CodeGen/X86/avx512-vbroadcasti128.ll b/test/CodeGen/X86/avx512-vbroadcasti128.ll
+index c5ecb1559b4..2bf69cfadcf 100644
+--- a/test/CodeGen/X86/avx512-vbroadcasti128.ll
++++ b/test/CodeGen/X86/avx512-vbroadcasti128.ll
+@@ -186,26 +186,23 @@ define <64 x i8> @test_broadcast_16i8_64i8(<16 x i8> *%p) nounwind {
+ define <8 x i32> @PR29088(<4 x i32>* %p0, <8 x float>* %p1) {
+ ; X64-AVX512VL-LABEL: PR29088:
+ ; X64-AVX512VL: ## %bb.0:
+-; X64-AVX512VL-NEXT: vmovaps (%rdi), %xmm0
+ ; X64-AVX512VL-NEXT: vpxor %xmm1, %xmm1, %xmm1
++; X64-AVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm0 = mem[0,1,0,1]
+ ; X64-AVX512VL-NEXT: vmovdqa %ymm1, (%rsi)
+-; X64-AVX512VL-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+ ; X64-AVX512VL-NEXT: retq
+ ;
+ ; X64-AVX512BWVL-LABEL: PR29088:
+ ; X64-AVX512BWVL: ## %bb.0:
+-; X64-AVX512BWVL-NEXT: vmovaps (%rdi), %xmm0
+ ; X64-AVX512BWVL-NEXT: vpxor %xmm1, %xmm1, %xmm1
++; X64-AVX512BWVL-NEXT: vbroadcasti128 {{.*#+}} ymm0 = mem[0,1,0,1]
+ ; X64-AVX512BWVL-NEXT: vmovdqa %ymm1, (%rsi)
+-; X64-AVX512BWVL-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+ ; X64-AVX512BWVL-NEXT: retq
+ ;
+ ; X64-AVX512DQVL-LABEL: PR29088:
+ ; X64-AVX512DQVL: ## %bb.0:
+-; X64-AVX512DQVL-NEXT: vmovaps (%rdi), %xmm0
+ ; X64-AVX512DQVL-NEXT: vxorps %xmm1, %xmm1, %xmm1
++; X64-AVX512DQVL-NEXT: vbroadcasti128 {{.*#+}} ymm0 = mem[0,1,0,1]
+ ; X64-AVX512DQVL-NEXT: vmovaps %ymm1, (%rsi)
+-; X64-AVX512DQVL-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+ ; X64-AVX512DQVL-NEXT: retq
+ %ld = load <4 x i32>, <4 x i32>* %p0
+ store <8 x float> zeroinitializer, <8 x float>* %p1
+diff --git a/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll b/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll
+index 8c13d4b842f..a2d275c1109 100644
+--- a/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll
++++ b/test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll
+@@ -797,16 +797,11 @@ entry:
+ define <4 x i64> @test_mm256_mask_set1_epi64(<4 x i64> %__O, i8 zeroext %__M, i64 %__A) {
+ ; X32-LABEL: test_mm256_mask_set1_epi64:
+ ; X32: # %bb.0: # %entry
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32-NEXT: movb {{[0-9]+}}(%esp), %dl
+-; X32-NEXT: vmovd %ecx, %xmm1
+-; X32-NEXT: vpinsrd $1, %eax, %xmm1, %xmm1
+-; X32-NEXT: vpinsrd $2, %ecx, %xmm1, %xmm1
+-; X32-NEXT: vpinsrd $3, %eax, %xmm1, %xmm1
+-; X32-NEXT: vinserti128 $1, %xmm1, %ymm1, %ymm1
+-; X32-NEXT: kmovw %edx, %k1
+-; X32-NEXT: vmovdqa64 %ymm1, %ymm0 {%k1}
++; X32-NEXT: movb {{[0-9]+}}(%esp), %al
++; X32-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero
++; X32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm1, %xmm1
++; X32-NEXT: kmovw %eax, %k1
++; X32-NEXT: vpbroadcastq %xmm1, %ymm0 {%k1}
+ ; X32-NEXT: retl
+ ;
+ ; X64-LABEL: test_mm256_mask_set1_epi64:
+@@ -826,16 +821,11 @@ entry:
+ define <4 x i64> @test_mm256_maskz_set1_epi64(i8 zeroext %__M, i64 %__A) {
+ ; X32-LABEL: test_mm256_maskz_set1_epi64:
+ ; X32: # %bb.0: # %entry
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32-NEXT: movb {{[0-9]+}}(%esp), %dl
+-; X32-NEXT: vmovd %ecx, %xmm0
+-; X32-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
+-; X32-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0
+-; X32-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0
+-; X32-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
+-; X32-NEXT: kmovw %edx, %k1
+-; X32-NEXT: vmovdqa64 %ymm0, %ymm0 {%k1} {z}
++; X32-NEXT: movb {{[0-9]+}}(%esp), %al
++; X32-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
++; X32-NEXT: vpinsrd $1, {{[0-9]+}}(%esp), %xmm0, %xmm0
++; X32-NEXT: kmovw %eax, %k1
++; X32-NEXT: vpbroadcastq %xmm0, %ymm0 {%k1} {z}
+ ; X32-NEXT: retl
+ ;
+ ; X64-LABEL: test_mm256_maskz_set1_epi64:
+diff --git a/test/CodeGen/X86/broadcastm-lowering.ll b/test/CodeGen/X86/broadcastm-lowering.ll
+index 428eaa19497..664f3b2eba6 100644
+--- a/test/CodeGen/X86/broadcastm-lowering.ll
++++ b/test/CodeGen/X86/broadcastm-lowering.ll
+@@ -122,9 +122,7 @@ define <8 x i64> @test_mm512_epi64(<8 x i32> %a, <8 x i32> %b) {
+ ; X86-AVX512VLCDBW-NEXT: kmovd %k0, %eax
+ ; X86-AVX512VLCDBW-NEXT: movzbl %al, %eax
+ ; X86-AVX512VLCDBW-NEXT: vmovd %eax, %xmm0
+-; X86-AVX512VLCDBW-NEXT: vpbroadcastq %xmm0, %xmm0
+-; X86-AVX512VLCDBW-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
+-; X86-AVX512VLCDBW-NEXT: vinserti64x4 $1, %ymm0, %zmm0, %zmm0
++; X86-AVX512VLCDBW-NEXT: vpbroadcastq %xmm0, %zmm0
+ ; X86-AVX512VLCDBW-NEXT: retl
+ entry:
+ %0 = icmp eq <8 x i32> %a, %b
+@@ -160,8 +158,7 @@ define <4 x i64> @test_mm256_epi64(<8 x i32> %a, <8 x i32> %b) {
+ ; X86-AVX512VLCDBW-NEXT: kmovd %k0, %eax
+ ; X86-AVX512VLCDBW-NEXT: movzbl %al, %eax
+ ; X86-AVX512VLCDBW-NEXT: vmovd %eax, %xmm0
+-; X86-AVX512VLCDBW-NEXT: vpbroadcastq %xmm0, %xmm0
+-; X86-AVX512VLCDBW-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
++; X86-AVX512VLCDBW-NEXT: vpbroadcastq %xmm0, %ymm0
+ ; X86-AVX512VLCDBW-NEXT: retl
+ entry:
+ %0 = icmp eq <8 x i32> %a, %b
+diff --git a/test/CodeGen/X86/i256-add.ll b/test/CodeGen/X86/i256-add.ll
+deleted file mode 100644
+index 36d838a68cb..00000000000
+--- a/test/CodeGen/X86/i256-add.ll
++++ /dev/null
+@@ -1,135 +0,0 @@
+-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+-; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X32
+-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+-
+-define void @add(i256* %p, i256* %q) nounwind {
+-; X32-LABEL: add:
+-; X32: # %bb.0:
+-; X32-NEXT: pushl %ebp
+-; X32-NEXT: pushl %ebx
+-; X32-NEXT: pushl %edi
+-; X32-NEXT: pushl %esi
+-; X32-NEXT: subl $12, %esp
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32-NEXT: movl 8(%ecx), %edi
+-; X32-NEXT: movl (%ecx), %edx
+-; X32-NEXT: movl 4(%ecx), %ebx
+-; X32-NEXT: movl 28(%eax), %esi
+-; X32-NEXT: movl %esi, {{[0-9]+}}(%esp) # 4-byte Spill
+-; X32-NEXT: movl 24(%eax), %ebp
+-; X32-NEXT: addl (%eax), %edx
+-; X32-NEXT: movl %edx, {{[0-9]+}}(%esp) # 4-byte Spill
+-; X32-NEXT: adcl 4(%eax), %ebx
+-; X32-NEXT: adcl 8(%eax), %edi
+-; X32-NEXT: movl %edi, (%esp) # 4-byte Spill
+-; X32-NEXT: movl 20(%eax), %edi
+-; X32-NEXT: movl 12(%eax), %edx
+-; X32-NEXT: movl 16(%eax), %esi
+-; X32-NEXT: adcl 12(%ecx), %edx
+-; X32-NEXT: adcl 16(%ecx), %esi
+-; X32-NEXT: adcl 20(%ecx), %edi
+-; X32-NEXT: movl %ebp, %eax
+-; X32-NEXT: adcl 24(%ecx), %eax
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp # 4-byte Reload
+-; X32-NEXT: adcl %ebp, 28(%ecx)
+-; X32-NEXT: movl (%esp), %ebp # 4-byte Reload
+-; X32-NEXT: movl %ebp, 8(%ecx)
+-; X32-NEXT: movl %ebx, 4(%ecx)
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx # 4-byte Reload
+-; X32-NEXT: movl %ebx, (%ecx)
+-; X32-NEXT: movl %edx, 12(%ecx)
+-; X32-NEXT: movl %esi, 16(%ecx)
+-; X32-NEXT: movl %edi, 20(%ecx)
+-; X32-NEXT: movl %eax, 24(%ecx)
+-; X32-NEXT: addl $12, %esp
+-; X32-NEXT: popl %esi
+-; X32-NEXT: popl %edi
+-; X32-NEXT: popl %ebx
+-; X32-NEXT: popl %ebp
+-; X32-NEXT: retl
+-;
+-; X64-LABEL: add:
+-; X64: # %bb.0:
+-; X64-NEXT: movq 16(%rdi), %rax
+-; X64-NEXT: movq (%rdi), %rcx
+-; X64-NEXT: movq 8(%rdi), %rdx
+-; X64-NEXT: movq 24(%rsi), %r8
+-; X64-NEXT: addq (%rsi), %rcx
+-; X64-NEXT: adcq 8(%rsi), %rdx
+-; X64-NEXT: adcq 16(%rsi), %rax
+-; X64-NEXT: adcq %r8, 24(%rdi)
+-; X64-NEXT: movq %rax, 16(%rdi)
+-; X64-NEXT: movq %rdx, 8(%rdi)
+-; X64-NEXT: movq %rcx, (%rdi)
+-; X64-NEXT: retq
+- %a = load i256, i256* %p
+- %b = load i256, i256* %q
+- %c = add i256 %a, %b
+- store i256 %c, i256* %p
+- ret void
+-}
+-define void @sub(i256* %p, i256* %q) nounwind {
+-; X32-LABEL: sub:
+-; X32: # %bb.0:
+-; X32-NEXT: pushl %ebp
+-; X32-NEXT: pushl %ebx
+-; X32-NEXT: pushl %edi
+-; X32-NEXT: pushl %esi
+-; X32-NEXT: subl $8, %esp
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32-NEXT: movl 16(%ecx), %eax
+-; X32-NEXT: movl 12(%ecx), %edx
+-; X32-NEXT: movl 8(%ecx), %edi
+-; X32-NEXT: movl (%ecx), %ebx
+-; X32-NEXT: movl 4(%ecx), %ebp
+-; X32-NEXT: subl (%esi), %ebx
+-; X32-NEXT: sbbl 4(%esi), %ebp
+-; X32-NEXT: sbbl 8(%esi), %edi
+-; X32-NEXT: sbbl 12(%esi), %edx
+-; X32-NEXT: movl %edx, {{[0-9]+}}(%esp) # 4-byte Spill
+-; X32-NEXT: sbbl 16(%esi), %eax
+-; X32-NEXT: movl %eax, (%esp) # 4-byte Spill
+-; X32-NEXT: movl 20(%ecx), %edx
+-; X32-NEXT: sbbl 20(%esi), %edx
+-; X32-NEXT: movl 24(%ecx), %eax
+-; X32-NEXT: sbbl 24(%esi), %eax
+-; X32-NEXT: movl 28(%esi), %esi
+-; X32-NEXT: sbbl %esi, 28(%ecx)
+-; X32-NEXT: movl %edi, 8(%ecx)
+-; X32-NEXT: movl %ebp, 4(%ecx)
+-; X32-NEXT: movl %ebx, (%ecx)
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %esi # 4-byte Reload
+-; X32-NEXT: movl %esi, 12(%ecx)
+-; X32-NEXT: movl (%esp), %esi # 4-byte Reload
+-; X32-NEXT: movl %esi, 16(%ecx)
+-; X32-NEXT: movl %edx, 20(%ecx)
+-; X32-NEXT: movl %eax, 24(%ecx)
+-; X32-NEXT: addl $8, %esp
+-; X32-NEXT: popl %esi
+-; X32-NEXT: popl %edi
+-; X32-NEXT: popl %ebx
+-; X32-NEXT: popl %ebp
+-; X32-NEXT: retl
+-;
+-; X64-LABEL: sub:
+-; X64: # %bb.0:
+-; X64-NEXT: movq 16(%rdi), %rax
+-; X64-NEXT: movq (%rdi), %rcx
+-; X64-NEXT: movq 8(%rdi), %rdx
+-; X64-NEXT: movq 24(%rsi), %r8
+-; X64-NEXT: subq (%rsi), %rcx
+-; X64-NEXT: sbbq 8(%rsi), %rdx
+-; X64-NEXT: sbbq 16(%rsi), %rax
+-; X64-NEXT: sbbq %r8, 24(%rdi)
+-; X64-NEXT: movq %rax, 16(%rdi)
+-; X64-NEXT: movq %rdx, 8(%rdi)
+-; X64-NEXT: movq %rcx, (%rdi)
+-; X64-NEXT: retq
+- %a = load i256, i256* %p
+- %b = load i256, i256* %q
+- %c = sub i256 %a, %b
+- store i256 %c, i256* %p
+- ret void
+-}
+diff --git a/test/CodeGen/X86/insertelement-shuffle.ll b/test/CodeGen/X86/insertelement-shuffle.ll
+index 705ceba9487..c0177ad7a9a 100644
+--- a/test/CodeGen/X86/insertelement-shuffle.ll
++++ b/test/CodeGen/X86/insertelement-shuffle.ll
+@@ -103,14 +103,9 @@ define <8 x i64> @insert_subvector_into_undef(i32 %x0, i32 %x1) nounwind {
+ ; X32_AVX256-NEXT: subl $8, %esp
+ ; X32_AVX256-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+ ; X32_AVX256-NEXT: vmovlps %xmm0, (%esp)
+-; X32_AVX256-NEXT: movl (%esp), %eax
+-; X32_AVX256-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32_AVX256-NEXT: vmovd %eax, %xmm0
+-; X32_AVX256-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0
+-; X32_AVX256-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
+-; X32_AVX256-NEXT: vpinsrd $3, %ecx, %xmm0, %xmm0
+-; X32_AVX256-NEXT: vinserti128 $1, %xmm0, %ymm0, %ymm0
+-; X32_AVX256-NEXT: vmovdqa %ymm0, %ymm1
++; X32_AVX256-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
++; X32_AVX256-NEXT: vbroadcastsd %xmm0, %ymm0
++; X32_AVX256-NEXT: vmovaps %ymm0, %ymm1
+ ; X32_AVX256-NEXT: movl %ebp, %esp
+ ; X32_AVX256-NEXT: popl %ebp
+ ; X32_AVX256-NEXT: retl
+diff --git a/test/CodeGen/X86/masked_memop.ll b/test/CodeGen/X86/masked_memop.ll
+index 82f097e4e0f..33cb5e2f235 100644
+--- a/test/CodeGen/X86/masked_memop.ll
++++ b/test/CodeGen/X86/masked_memop.ll
+@@ -1199,8 +1199,7 @@ define <8 x double> @load_one_mask_bit_set5(<8 x double>* %addr, <8 x double> %v
+ ; AVX-LABEL: load_one_mask_bit_set5:
+ ; AVX: ## %bb.0:
+ ; AVX-NEXT: vextractf128 $1, %ymm1, %xmm2
+-; AVX-NEXT: vmovsd {{.*#+}} xmm3 = mem[0],zero
+-; AVX-NEXT: vmovlhps {{.*#+}} xmm2 = xmm2[0],xmm3[0]
++; AVX-NEXT: vmovhpd {{.*#+}} xmm2 = xmm2[0],mem[0]
+ ; AVX-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1
+ ; AVX-NEXT: retq
+ ;
+diff --git a/test/CodeGen/X86/merge-consecutive-stores.ll b/test/CodeGen/X86/merge-consecutive-stores.ll
+index af5fb478e52..4f511ef99e5 100644
+--- a/test/CodeGen/X86/merge-consecutive-stores.ll
++++ b/test/CodeGen/X86/merge-consecutive-stores.ll
+@@ -10,12 +10,11 @@ define i32 @foo (i64* %so) nounwind uwtable ssp {
+ ; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
+ ; CHECK-NEXT: movl $0, 28(%eax)
+ ; CHECK-NEXT: movl $0, 24(%eax)
+-; CHECK-NEXT: movl 20(%eax), %ecx
+-; CHECK-NEXT: movl $0, 20(%eax)
+-; CHECK-NEXT: xorl %edx, %edx
+-; CHECK-NEXT: cmpl 16(%eax), %edx
++; CHECK-NEXT: xorl %ecx, %ecx
++; CHECK-NEXT: cmpl 16(%eax), %ecx
+ ; CHECK-NEXT: movl $0, 16(%eax)
+-; CHECK-NEXT: sbbl %ecx, %edx
++; CHECK-NEXT: sbbl 20(%eax), %ecx
++; CHECK-NEXT: movl $0, 20(%eax)
+ ; CHECK-NEXT: setl %al
+ ; CHECK-NEXT: movzbl %al, %eax
+ ; CHECK-NEXT: negl %eax
+diff --git a/test/CodeGen/X86/nontemporal.ll b/test/CodeGen/X86/nontemporal.ll
+index f53982a8542..472c3e4774c 100644
+--- a/test/CodeGen/X86/nontemporal.ll
++++ b/test/CodeGen/X86/nontemporal.ll
+@@ -13,36 +13,35 @@ define i32 @f(<4 x float> %A, i8* %B, <2 x double> %C, i32 %D, <2 x i64> %E, <4
+ ; X32-SSE-NEXT: andl $-16, %esp
+ ; X32-SSE-NEXT: subl $16, %esp
+ ; X32-SSE-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero
+-; X32-SSE-NEXT: movl 12(%ebp), %eax
++; X32-SSE-NEXT: movl 12(%ebp), %ecx
+ ; X32-SSE-NEXT: movdqa 56(%ebp), %xmm4
+ ; X32-SSE-NEXT: movdqa 40(%ebp), %xmm5
+ ; X32-SSE-NEXT: movdqa 24(%ebp), %xmm6
+-; X32-SSE-NEXT: movl 8(%ebp), %edx
+-; X32-SSE-NEXT: movl 80(%ebp), %ecx
+-; X32-SSE-NEXT: movl (%ecx), %esi
++; X32-SSE-NEXT: movl 8(%ebp), %esi
++; X32-SSE-NEXT: movl 80(%ebp), %edx
++; X32-SSE-NEXT: movl (%edx), %eax
+ ; X32-SSE-NEXT: addps {{\.LCPI.*}}, %xmm0
+-; X32-SSE-NEXT: movntps %xmm0, (%edx)
++; X32-SSE-NEXT: movntps %xmm0, (%esi)
+ ; X32-SSE-NEXT: paddq {{\.LCPI.*}}, %xmm2
+-; X32-SSE-NEXT: addl (%ecx), %esi
+-; X32-SSE-NEXT: movntdq %xmm2, (%edx)
++; X32-SSE-NEXT: addl (%edx), %eax
++; X32-SSE-NEXT: movntdq %xmm2, (%esi)
+ ; X32-SSE-NEXT: addpd {{\.LCPI.*}}, %xmm1
+-; X32-SSE-NEXT: addl (%ecx), %esi
+-; X32-SSE-NEXT: movntpd %xmm1, (%edx)
++; X32-SSE-NEXT: addl (%edx), %eax
++; X32-SSE-NEXT: movntpd %xmm1, (%esi)
+ ; X32-SSE-NEXT: paddd {{\.LCPI.*}}, %xmm6
+-; X32-SSE-NEXT: addl (%ecx), %esi
+-; X32-SSE-NEXT: movntdq %xmm6, (%edx)
++; X32-SSE-NEXT: addl (%edx), %eax
++; X32-SSE-NEXT: movntdq %xmm6, (%esi)
+ ; X32-SSE-NEXT: paddw {{\.LCPI.*}}, %xmm5
+-; X32-SSE-NEXT: addl (%ecx), %esi
+-; X32-SSE-NEXT: movntdq %xmm5, (%edx)
++; X32-SSE-NEXT: addl (%edx), %eax
++; X32-SSE-NEXT: movntdq %xmm5, (%esi)
+ ; X32-SSE-NEXT: paddb {{\.LCPI.*}}, %xmm4
+-; X32-SSE-NEXT: addl (%ecx), %esi
+-; X32-SSE-NEXT: movntdq %xmm4, (%edx)
+-; X32-SSE-NEXT: addl (%ecx), %esi
+-; X32-SSE-NEXT: movntil %eax, (%edx)
+-; X32-SSE-NEXT: movl (%ecx), %eax
+-; X32-SSE-NEXT: addl %esi, %eax
+-; X32-SSE-NEXT: movsd %xmm3, (%edx)
+-; X32-SSE-NEXT: addl (%ecx), %eax
++; X32-SSE-NEXT: addl (%edx), %eax
++; X32-SSE-NEXT: movntdq %xmm4, (%esi)
++; X32-SSE-NEXT: addl (%edx), %eax
++; X32-SSE-NEXT: movntil %ecx, (%esi)
++; X32-SSE-NEXT: addl (%edx), %eax
++; X32-SSE-NEXT: movsd %xmm3, (%esi)
++; X32-SSE-NEXT: addl (%edx), %eax
+ ; X32-SSE-NEXT: leal -4(%ebp), %esp
+ ; X32-SSE-NEXT: popl %esi
+ ; X32-SSE-NEXT: popl %ebp
+@@ -56,36 +55,35 @@ define i32 @f(<4 x float> %A, i8* %B, <2 x double> %C, i32 %D, <2 x i64> %E, <4
+ ; X32-AVX-NEXT: andl $-16, %esp
+ ; X32-AVX-NEXT: subl $16, %esp
+ ; X32-AVX-NEXT: vmovsd {{.*#+}} xmm3 = mem[0],zero
+-; X32-AVX-NEXT: movl 12(%ebp), %eax
++; X32-AVX-NEXT: movl 12(%ebp), %ecx
+ ; X32-AVX-NEXT: vmovdqa 56(%ebp), %xmm4
+ ; X32-AVX-NEXT: vmovdqa 40(%ebp), %xmm5
+ ; X32-AVX-NEXT: vmovdqa 24(%ebp), %xmm6
+-; X32-AVX-NEXT: movl 8(%ebp), %ecx
+-; X32-AVX-NEXT: movl 80(%ebp), %edx
+-; X32-AVX-NEXT: movl (%edx), %esi
++; X32-AVX-NEXT: movl 8(%ebp), %edx
++; X32-AVX-NEXT: movl 80(%ebp), %esi
++; X32-AVX-NEXT: movl (%esi), %eax
+ ; X32-AVX-NEXT: vaddps {{\.LCPI.*}}, %xmm0, %xmm0
+-; X32-AVX-NEXT: vmovntps %xmm0, (%ecx)
++; X32-AVX-NEXT: vmovntps %xmm0, (%edx)
+ ; X32-AVX-NEXT: vpaddq {{\.LCPI.*}}, %xmm2, %xmm0
+-; X32-AVX-NEXT: addl (%edx), %esi
+-; X32-AVX-NEXT: vmovntdq %xmm0, (%ecx)
++; X32-AVX-NEXT: addl (%esi), %eax
++; X32-AVX-NEXT: vmovntdq %xmm0, (%edx)
+ ; X32-AVX-NEXT: vaddpd {{\.LCPI.*}}, %xmm1, %xmm0
+-; X32-AVX-NEXT: addl (%edx), %esi
+-; X32-AVX-NEXT: vmovntpd %xmm0, (%ecx)
++; X32-AVX-NEXT: addl (%esi), %eax
++; X32-AVX-NEXT: vmovntpd %xmm0, (%edx)
+ ; X32-AVX-NEXT: vpaddd {{\.LCPI.*}}, %xmm6, %xmm0
+-; X32-AVX-NEXT: addl (%edx), %esi
+-; X32-AVX-NEXT: vmovntdq %xmm0, (%ecx)
++; X32-AVX-NEXT: addl (%esi), %eax
++; X32-AVX-NEXT: vmovntdq %xmm0, (%edx)
+ ; X32-AVX-NEXT: vpaddw {{\.LCPI.*}}, %xmm5, %xmm0
+-; X32-AVX-NEXT: addl (%edx), %esi
+-; X32-AVX-NEXT: vmovntdq %xmm0, (%ecx)
++; X32-AVX-NEXT: addl (%esi), %eax
++; X32-AVX-NEXT: vmovntdq %xmm0, (%edx)
+ ; X32-AVX-NEXT: vpaddb {{\.LCPI.*}}, %xmm4, %xmm0
+-; X32-AVX-NEXT: addl (%edx), %esi
+-; X32-AVX-NEXT: vmovntdq %xmm0, (%ecx)
+-; X32-AVX-NEXT: addl (%edx), %esi
+-; X32-AVX-NEXT: movntil %eax, (%ecx)
+-; X32-AVX-NEXT: movl (%edx), %eax
+-; X32-AVX-NEXT: addl %esi, %eax
+-; X32-AVX-NEXT: vmovsd %xmm3, (%ecx)
+-; X32-AVX-NEXT: addl (%edx), %eax
++; X32-AVX-NEXT: addl (%esi), %eax
++; X32-AVX-NEXT: vmovntdq %xmm0, (%edx)
++; X32-AVX-NEXT: addl (%esi), %eax
++; X32-AVX-NEXT: movntil %ecx, (%edx)
++; X32-AVX-NEXT: addl (%esi), %eax
++; X32-AVX-NEXT: vmovsd %xmm3, (%edx)
++; X32-AVX-NEXT: addl (%esi), %eax
+ ; X32-AVX-NEXT: leal -4(%ebp), %esp
+ ; X32-AVX-NEXT: popl %esi
+ ; X32-AVX-NEXT: popl %ebp
+diff --git a/test/CodeGen/X86/pr36274.ll b/test/CodeGen/X86/pr36274.ll
+new file mode 100644
+index 00000000000..97b958c6b68
+--- /dev/null
++++ b/test/CodeGen/X86/pr36274.ll
+@@ -0,0 +1,33 @@
++; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
++; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s
++
++; This tests is checking for a case where the x86 load-op-store fusion
++; misses a dependence between the fused load and a non-fused operand
++; to the load causing a cycle. Here the dependence in question comes
++; from the carry in input of the adcl.
++
++@vx = external local_unnamed_addr global <2 x i32>, align 8
++
++define void @pr36274(i32* %somewhere) {
++; CHECK-LABEL: pr36274:
++; CHECK: # %bb.0:
++; CHECK-NEXT: movl vx+4, %eax
++; CHECK-NEXT: addl $1, vx
++; CHECK-NEXT: adcl $0, %eax
++; CHECK-NEXT: movl %eax, vx+4
++; CHECK-NEXT: retl
++ %a0 = getelementptr <2 x i32>, <2 x i32>* @vx, i32 0, i32 0
++ %a1 = getelementptr <2 x i32>, <2 x i32>* @vx, i32 0, i32 1
++ %x1 = load volatile i32, i32* %a1, align 4
++ %x0 = load volatile i32, i32* %a0, align 8
++ %vx0 = insertelement <2 x i32> undef, i32 %x0, i32 0
++ %vx1 = insertelement <2 x i32> %vx0, i32 %x1, i32 1
++ %x = bitcast <2 x i32> %vx1 to i64
++ %add = add i64 %x, 1
++ %vadd = bitcast i64 %add to <2 x i32>
++ %vx1_0 = extractelement <2 x i32> %vadd, i32 0
++ %vx1_1 = extractelement <2 x i32> %vadd, i32 1
++ store i32 %vx1_0, i32* %a0, align 8
++ store i32 %vx1_1, i32* %a1, align 4
++ ret void
++}
+diff --git a/test/CodeGen/X86/pr36312.ll b/test/CodeGen/X86/pr36312.ll
+new file mode 100644
+index 00000000000..64048511ac7
+--- /dev/null
++++ b/test/CodeGen/X86/pr36312.ll
+@@ -0,0 +1,35 @@
++; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
++; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
++
++%struct.anon = type { i32, i32 }
++
++@c = common global %struct.anon zeroinitializer, align 4
++@d = local_unnamed_addr global %struct.anon* @c, align 8
++@a = common local_unnamed_addr global i32 0, align 4
++@b = common local_unnamed_addr global i32 0, align 4
++
++; Function Attrs: norecurse nounwind uwtable
++define void @g() local_unnamed_addr #0 {
++; CHECK-LABEL: g:
++; CHECK: # %bb.0: # %entry
++; CHECK-NEXT: movq {{.*}}(%rip), %rax
++; CHECK-NEXT: movl 4(%rax), %eax
++; CHECK-NEXT: xorl %ecx, %ecx
++; CHECK-NEXT: incl {{.*}}(%rip)
++; CHECK-NEXT: setne %cl
++; CHECK-NEXT: addl %eax, %ecx
++; CHECK-NEXT: movl %ecx, {{.*}}(%rip)
++; CHECK-NEXT: retq
++entry:
++ %0 = load %struct.anon*, %struct.anon** @d, align 8
++ %y = getelementptr inbounds %struct.anon, %struct.anon* %0, i64 0, i32 1
++ %1 = load i32, i32* %y, align 4
++ %2 = load i32, i32* @b, align 4
++ %inc = add nsw i32 %2, 1
++ store i32 %inc, i32* @b, align 4
++ %tobool = icmp ne i32 %inc, 0
++ %land.ext = zext i1 %tobool to i32
++ %add = add nsw i32 %1, %land.ext
++ store i32 %add, i32* @a, align 4
++ ret void
++}
+diff --git a/test/CodeGen/X86/store_op_load_fold2.ll b/test/CodeGen/X86/store_op_load_fold2.ll
+index f47d87f4bb8..674b8d8f938 100644
+--- a/test/CodeGen/X86/store_op_load_fold2.ll
++++ b/test/CodeGen/X86/store_op_load_fold2.ll
+@@ -17,14 +17,14 @@ cond_true2732.preheader: ; preds = %entry
+ store i64 %tmp2676.us.us, i64* %tmp2666
+ ret i32 0
+
+-; INTEL: and {{e..}}, dword ptr [360]
+-; INTEL: and dword ptr [356], {{e..}}
+-; FIXME: mov dword ptr [360], {{e..}}
++; INTEL: and {{e..}}, dword ptr [356]
++; INTEL: and dword ptr [360], {{e..}}
++; FIXME: mov dword ptr [356], {{e..}}
+ ; The above line comes out as 'mov 360, eax', but when the register is ecx it works?
+
+-; ATT: andl 360, %{{e..}}
+-; ATT: andl %{{e..}}, 356
+-; ATT: movl %{{e..}}, 360
++; ATT: andl 356, %{{e..}}
++; ATT: andl %{{e..}}, 360
++; ATT: movl %{{e..}}, 356
+
+ }
+
+diff --git a/test/CodeGen/X86/subvector-broadcast.ll b/test/CodeGen/X86/subvector-broadcast.ll
+deleted file mode 100644
+index 33cf2f453ba..00000000000
+--- a/test/CodeGen/X86/subvector-broadcast.ll
++++ /dev/null
+@@ -1,1683 +0,0 @@
+-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X32 --check-prefix=X32-AVX --check-prefix=X32-AVX1
+-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X32 --check-prefix=X32-AVX --check-prefix=X32-AVX2
+-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=X32 --check-prefix=X32-AVX512 --check-prefix=X32-AVX512F
+-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefix=X32 --check-prefix=X32-AVX512 --check-prefix=X32-AVX512BW
+-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefix=X32 --check-prefix=X32-AVX512 --check-prefix=X32-AVX512DQ
+-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX --check-prefix=X64-AVX1
+-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX --check-prefix=X64-AVX2
+-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX512 --check-prefix=X64-AVX512F
+-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX512 --check-prefix=X64-AVX512BW
+-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX512 --check-prefix=X64-AVX512DQ
+-
+-;
+-; Subvector Load + Broadcast
+-;
+-
+-define <4 x double> @test_broadcast_2f64_4f64(<2 x double> *%p) nounwind {
+-; X32-LABEL: test_broadcast_2f64_4f64:
+-; X32: # %bb.0:
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-NEXT: retl
+-;
+-; X64-LABEL: test_broadcast_2f64_4f64:
+-; X64: # %bb.0:
+-; X64-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-NEXT: retq
+- %1 = load <2 x double>, <2 x double> *%p
+- %2 = shufflevector <2 x double> %1, <2 x double> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
+- ret <4 x double> %2
+-}
+-
+-define <8 x double> @test_broadcast_2f64_8f64(<2 x double> *%p) nounwind {
+-; X32-AVX-LABEL: test_broadcast_2f64_8f64:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-AVX-NEXT: vmovdqa %ymm0, %ymm1
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512-LABEL: test_broadcast_2f64_8f64:
+-; X32-AVX512: # %bb.0:
+-; X32-AVX512-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512-NEXT: vbroadcastf32x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
+-; X32-AVX512-NEXT: retl
+-;
+-; X64-AVX-LABEL: test_broadcast_2f64_8f64:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-AVX-NEXT: vmovdqa %ymm0, %ymm1
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512-LABEL: test_broadcast_2f64_8f64:
+-; X64-AVX512: # %bb.0:
+-; X64-AVX512-NEXT: vbroadcastf32x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
+-; X64-AVX512-NEXT: retq
+- %1 = load <2 x double>, <2 x double> *%p
+- %2 = shufflevector <2 x double> %1, <2 x double> undef, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>
+- ret <8 x double> %2
+-}
+-
+-define <8 x double> @test_broadcast_4f64_8f64(<4 x double> *%p) nounwind {
+-; X32-AVX-LABEL: test_broadcast_4f64_8f64:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX-NEXT: vmovaps (%eax), %ymm0
+-; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512-LABEL: test_broadcast_4f64_8f64:
+-; X32-AVX512: # %bb.0:
+-; X32-AVX512-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512-NEXT: vbroadcastf64x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3]
+-; X32-AVX512-NEXT: retl
+-;
+-; X64-AVX-LABEL: test_broadcast_4f64_8f64:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: vmovaps (%rdi), %ymm0
+-; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512-LABEL: test_broadcast_4f64_8f64:
+-; X64-AVX512: # %bb.0:
+-; X64-AVX512-NEXT: vbroadcastf64x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3]
+-; X64-AVX512-NEXT: retq
+- %1 = load <4 x double>, <4 x double> *%p
+- %2 = shufflevector <4 x double> %1, <4 x double> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+- ret <8 x double> %2
+-}
+-
+-define <4 x i64> @test_broadcast_2i64_4i64(<2 x i64> *%p) nounwind {
+-; X32-AVX-LABEL: test_broadcast_2i64_4i64:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512-LABEL: test_broadcast_2i64_4i64:
+-; X32-AVX512: # %bb.0:
+-; X32-AVX512-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512-NEXT: vbroadcasti128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-AVX512-NEXT: retl
+-;
+-; X64-AVX-LABEL: test_broadcast_2i64_4i64:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512-LABEL: test_broadcast_2i64_4i64:
+-; X64-AVX512: # %bb.0:
+-; X64-AVX512-NEXT: vbroadcasti128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-AVX512-NEXT: retq
+- %1 = load <2 x i64>, <2 x i64> *%p
+- %2 = shufflevector <2 x i64> %1, <2 x i64> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
+- ret <4 x i64> %2
+-}
+-
+-define <8 x i64> @test_broadcast_2i64_8i64(<2 x i64> *%p) nounwind {
+-; X32-AVX1-LABEL: test_broadcast_2i64_8i64:
+-; X32-AVX1: # %bb.0:
+-; X32-AVX1-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX1-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-AVX1-NEXT: vmovdqa %ymm0, %ymm1
+-; X32-AVX1-NEXT: retl
+-;
+-; X32-AVX2-LABEL: test_broadcast_2i64_8i64:
+-; X32-AVX2: # %bb.0:
+-; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX2-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-AVX2-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX2-NEXT: retl
+-;
+-; X32-AVX512-LABEL: test_broadcast_2i64_8i64:
+-; X32-AVX512: # %bb.0:
+-; X32-AVX512-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512-NEXT: vbroadcasti32x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
+-; X32-AVX512-NEXT: retl
+-;
+-; X64-AVX1-LABEL: test_broadcast_2i64_8i64:
+-; X64-AVX1: # %bb.0:
+-; X64-AVX1-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-AVX1-NEXT: vmovdqa %ymm0, %ymm1
+-; X64-AVX1-NEXT: retq
+-;
+-; X64-AVX2-LABEL: test_broadcast_2i64_8i64:
+-; X64-AVX2: # %bb.0:
+-; X64-AVX2-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-AVX2-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX2-NEXT: retq
+-;
+-; X64-AVX512-LABEL: test_broadcast_2i64_8i64:
+-; X64-AVX512: # %bb.0:
+-; X64-AVX512-NEXT: vbroadcasti32x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
+-; X64-AVX512-NEXT: retq
+- %1 = load <2 x i64>, <2 x i64> *%p
+- %2 = shufflevector <2 x i64> %1, <2 x i64> undef, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>
+- ret <8 x i64> %2
+-}
+-
+-define <8 x i64> @test_broadcast_4i64_8i64(<4 x i64> *%p) nounwind {
+-; X32-AVX-LABEL: test_broadcast_4i64_8i64:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX-NEXT: vmovaps (%eax), %ymm0
+-; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512-LABEL: test_broadcast_4i64_8i64:
+-; X32-AVX512: # %bb.0:
+-; X32-AVX512-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512-NEXT: vbroadcasti64x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3]
+-; X32-AVX512-NEXT: retl
+-;
+-; X64-AVX-LABEL: test_broadcast_4i64_8i64:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: vmovaps (%rdi), %ymm0
+-; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512-LABEL: test_broadcast_4i64_8i64:
+-; X64-AVX512: # %bb.0:
+-; X64-AVX512-NEXT: vbroadcasti64x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3]
+-; X64-AVX512-NEXT: retq
+- %1 = load <4 x i64>, <4 x i64> *%p
+- %2 = shufflevector <4 x i64> %1, <4 x i64> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+- ret <8 x i64> %2
+-}
+-
+-define <8 x float> @test_broadcast_4f32_8f32(<4 x float> *%p) nounwind {
+-; X32-LABEL: test_broadcast_4f32_8f32:
+-; X32: # %bb.0:
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-NEXT: retl
+-;
+-; X64-LABEL: test_broadcast_4f32_8f32:
+-; X64: # %bb.0:
+-; X64-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-NEXT: retq
+- %1 = load <4 x float>, <4 x float> *%p
+- %2 = shufflevector <4 x float> %1, <4 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+- ret <8 x float> %2
+-}
+-
+-define <16 x float> @test_broadcast_4f32_16f32(<4 x float> *%p) nounwind {
+-; X32-AVX-LABEL: test_broadcast_4f32_16f32:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-AVX-NEXT: vmovdqa %ymm0, %ymm1
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512-LABEL: test_broadcast_4f32_16f32:
+-; X32-AVX512: # %bb.0:
+-; X32-AVX512-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512-NEXT: vbroadcastf32x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
+-; X32-AVX512-NEXT: retl
+-;
+-; X64-AVX-LABEL: test_broadcast_4f32_16f32:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-AVX-NEXT: vmovdqa %ymm0, %ymm1
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512-LABEL: test_broadcast_4f32_16f32:
+-; X64-AVX512: # %bb.0:
+-; X64-AVX512-NEXT: vbroadcastf32x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
+-; X64-AVX512-NEXT: retq
+- %1 = load <4 x float>, <4 x float> *%p
+- %2 = shufflevector <4 x float> %1, <4 x float> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+- ret <16 x float> %2
+-}
+-
+-define <16 x float> @test_broadcast_8f32_16f32(<8 x float> *%p) nounwind {
+-; X32-AVX-LABEL: test_broadcast_8f32_16f32:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX-NEXT: vmovaps (%eax), %ymm0
+-; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512-LABEL: test_broadcast_8f32_16f32:
+-; X32-AVX512: # %bb.0:
+-; X32-AVX512-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512-NEXT: vbroadcastf64x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3]
+-; X32-AVX512-NEXT: retl
+-;
+-; X64-AVX-LABEL: test_broadcast_8f32_16f32:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: vmovaps (%rdi), %ymm0
+-; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512-LABEL: test_broadcast_8f32_16f32:
+-; X64-AVX512: # %bb.0:
+-; X64-AVX512-NEXT: vbroadcastf64x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3]
+-; X64-AVX512-NEXT: retq
+- %1 = load <8 x float>, <8 x float> *%p
+- %2 = shufflevector <8 x float> %1, <8 x float> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+- ret <16 x float> %2
+-}
+-
+-define <8 x i32> @test_broadcast_4i32_8i32(<4 x i32> *%p) nounwind {
+-; X32-AVX-LABEL: test_broadcast_4i32_8i32:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512-LABEL: test_broadcast_4i32_8i32:
+-; X32-AVX512: # %bb.0:
+-; X32-AVX512-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512-NEXT: vbroadcasti128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-AVX512-NEXT: retl
+-;
+-; X64-AVX-LABEL: test_broadcast_4i32_8i32:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512-LABEL: test_broadcast_4i32_8i32:
+-; X64-AVX512: # %bb.0:
+-; X64-AVX512-NEXT: vbroadcasti128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-AVX512-NEXT: retq
+- %1 = load <4 x i32>, <4 x i32> *%p
+- %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+- ret <8 x i32> %2
+-}
+-
+-define <16 x i32> @test_broadcast_4i32_16i32(<4 x i32> *%p) nounwind {
+-; X32-AVX1-LABEL: test_broadcast_4i32_16i32:
+-; X32-AVX1: # %bb.0:
+-; X32-AVX1-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX1-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-AVX1-NEXT: vmovdqa %ymm0, %ymm1
+-; X32-AVX1-NEXT: retl
+-;
+-; X32-AVX2-LABEL: test_broadcast_4i32_16i32:
+-; X32-AVX2: # %bb.0:
+-; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX2-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-AVX2-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX2-NEXT: retl
+-;
+-; X32-AVX512-LABEL: test_broadcast_4i32_16i32:
+-; X32-AVX512: # %bb.0:
+-; X32-AVX512-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512-NEXT: vbroadcasti32x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
+-; X32-AVX512-NEXT: retl
+-;
+-; X64-AVX1-LABEL: test_broadcast_4i32_16i32:
+-; X64-AVX1: # %bb.0:
+-; X64-AVX1-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-AVX1-NEXT: vmovdqa %ymm0, %ymm1
+-; X64-AVX1-NEXT: retq
+-;
+-; X64-AVX2-LABEL: test_broadcast_4i32_16i32:
+-; X64-AVX2: # %bb.0:
+-; X64-AVX2-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-AVX2-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX2-NEXT: retq
+-;
+-; X64-AVX512-LABEL: test_broadcast_4i32_16i32:
+-; X64-AVX512: # %bb.0:
+-; X64-AVX512-NEXT: vbroadcasti32x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
+-; X64-AVX512-NEXT: retq
+- %1 = load <4 x i32>, <4 x i32> *%p
+- %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+- ret <16 x i32> %2
+-}
+-
+-define <16 x i32> @test_broadcast_8i32_16i32(<8 x i32> *%p) nounwind {
+-; X32-AVX-LABEL: test_broadcast_8i32_16i32:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX-NEXT: vmovaps (%eax), %ymm0
+-; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512-LABEL: test_broadcast_8i32_16i32:
+-; X32-AVX512: # %bb.0:
+-; X32-AVX512-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512-NEXT: vbroadcasti64x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3]
+-; X32-AVX512-NEXT: retl
+-;
+-; X64-AVX-LABEL: test_broadcast_8i32_16i32:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: vmovaps (%rdi), %ymm0
+-; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512-LABEL: test_broadcast_8i32_16i32:
+-; X64-AVX512: # %bb.0:
+-; X64-AVX512-NEXT: vbroadcasti64x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3]
+-; X64-AVX512-NEXT: retq
+- %1 = load <8 x i32>, <8 x i32> *%p
+- %2 = shufflevector <8 x i32> %1, <8 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+- ret <16 x i32> %2
+-}
+-
+-define <16 x i16> @test_broadcast_8i16_16i16(<8 x i16> *%p) nounwind {
+-; X32-AVX-LABEL: test_broadcast_8i16_16i16:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512-LABEL: test_broadcast_8i16_16i16:
+-; X32-AVX512: # %bb.0:
+-; X32-AVX512-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512-NEXT: vbroadcasti128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-AVX512-NEXT: retl
+-;
+-; X64-AVX-LABEL: test_broadcast_8i16_16i16:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512-LABEL: test_broadcast_8i16_16i16:
+-; X64-AVX512: # %bb.0:
+-; X64-AVX512-NEXT: vbroadcasti128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-AVX512-NEXT: retq
+- %1 = load <8 x i16>, <8 x i16> *%p
+- %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+- ret <16 x i16> %2
+-}
+-
+-define <32 x i16> @test_broadcast_8i16_32i16(<8 x i16> *%p) nounwind {
+-; X32-AVX1-LABEL: test_broadcast_8i16_32i16:
+-; X32-AVX1: # %bb.0:
+-; X32-AVX1-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX1-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-AVX1-NEXT: vmovdqa %ymm0, %ymm1
+-; X32-AVX1-NEXT: retl
+-;
+-; X32-AVX2-LABEL: test_broadcast_8i16_32i16:
+-; X32-AVX2: # %bb.0:
+-; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX2-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-AVX2-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX2-NEXT: retl
+-;
+-; X32-AVX512F-LABEL: test_broadcast_8i16_32i16:
+-; X32-AVX512F: # %bb.0:
+-; X32-AVX512F-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512F-NEXT: vbroadcasti128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-AVX512F-NEXT: vmovdqa %ymm0, %ymm1
+-; X32-AVX512F-NEXT: retl
+-;
+-; X32-AVX512BW-LABEL: test_broadcast_8i16_32i16:
+-; X32-AVX512BW: # %bb.0:
+-; X32-AVX512BW-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512BW-NEXT: vbroadcasti32x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
+-; X32-AVX512BW-NEXT: retl
+-;
+-; X32-AVX512DQ-LABEL: test_broadcast_8i16_32i16:
+-; X32-AVX512DQ: # %bb.0:
+-; X32-AVX512DQ-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512DQ-NEXT: vbroadcasti128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-AVX512DQ-NEXT: vmovdqa %ymm0, %ymm1
+-; X32-AVX512DQ-NEXT: retl
+-;
+-; X64-AVX1-LABEL: test_broadcast_8i16_32i16:
+-; X64-AVX1: # %bb.0:
+-; X64-AVX1-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-AVX1-NEXT: vmovdqa %ymm0, %ymm1
+-; X64-AVX1-NEXT: retq
+-;
+-; X64-AVX2-LABEL: test_broadcast_8i16_32i16:
+-; X64-AVX2: # %bb.0:
+-; X64-AVX2-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-AVX2-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX2-NEXT: retq
+-;
+-; X64-AVX512F-LABEL: test_broadcast_8i16_32i16:
+-; X64-AVX512F: # %bb.0:
+-; X64-AVX512F-NEXT: vbroadcasti128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-AVX512F-NEXT: vmovdqa %ymm0, %ymm1
+-; X64-AVX512F-NEXT: retq
+-;
+-; X64-AVX512BW-LABEL: test_broadcast_8i16_32i16:
+-; X64-AVX512BW: # %bb.0:
+-; X64-AVX512BW-NEXT: vbroadcasti32x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
+-; X64-AVX512BW-NEXT: retq
+-;
+-; X64-AVX512DQ-LABEL: test_broadcast_8i16_32i16:
+-; X64-AVX512DQ: # %bb.0:
+-; X64-AVX512DQ-NEXT: vbroadcasti128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-AVX512DQ-NEXT: vmovdqa %ymm0, %ymm1
+-; X64-AVX512DQ-NEXT: retq
+- %1 = load <8 x i16>, <8 x i16> *%p
+- %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+- ret <32 x i16> %2
+-}
+-
+-define <32 x i16> @test_broadcast_16i16_32i16(<16 x i16> *%p) nounwind {
+-; X32-AVX-LABEL: test_broadcast_16i16_32i16:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX-NEXT: vmovaps (%eax), %ymm0
+-; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512F-LABEL: test_broadcast_16i16_32i16:
+-; X32-AVX512F: # %bb.0:
+-; X32-AVX512F-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512F-NEXT: vmovaps (%eax), %ymm0
+-; X32-AVX512F-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX512F-NEXT: retl
+-;
+-; X32-AVX512BW-LABEL: test_broadcast_16i16_32i16:
+-; X32-AVX512BW: # %bb.0:
+-; X32-AVX512BW-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512BW-NEXT: vbroadcasti64x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3]
+-; X32-AVX512BW-NEXT: retl
+-;
+-; X32-AVX512DQ-LABEL: test_broadcast_16i16_32i16:
+-; X32-AVX512DQ: # %bb.0:
+-; X32-AVX512DQ-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512DQ-NEXT: vmovaps (%eax), %ymm0
+-; X32-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX512DQ-NEXT: retl
+-;
+-; X64-AVX-LABEL: test_broadcast_16i16_32i16:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: vmovaps (%rdi), %ymm0
+-; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512F-LABEL: test_broadcast_16i16_32i16:
+-; X64-AVX512F: # %bb.0:
+-; X64-AVX512F-NEXT: vmovaps (%rdi), %ymm0
+-; X64-AVX512F-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX512F-NEXT: retq
+-;
+-; X64-AVX512BW-LABEL: test_broadcast_16i16_32i16:
+-; X64-AVX512BW: # %bb.0:
+-; X64-AVX512BW-NEXT: vbroadcasti64x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3]
+-; X64-AVX512BW-NEXT: retq
+-;
+-; X64-AVX512DQ-LABEL: test_broadcast_16i16_32i16:
+-; X64-AVX512DQ: # %bb.0:
+-; X64-AVX512DQ-NEXT: vmovaps (%rdi), %ymm0
+-; X64-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX512DQ-NEXT: retq
+- %1 = load <16 x i16>, <16 x i16> *%p
+- %2 = shufflevector <16 x i16> %1, <16 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+- ret <32 x i16> %2
+-}
+-
+-define <32 x i8> @test_broadcast_16i8_32i8(<16 x i8> *%p) nounwind {
+-; X32-AVX-LABEL: test_broadcast_16i8_32i8:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512-LABEL: test_broadcast_16i8_32i8:
+-; X32-AVX512: # %bb.0:
+-; X32-AVX512-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512-NEXT: vbroadcasti128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-AVX512-NEXT: retl
+-;
+-; X64-AVX-LABEL: test_broadcast_16i8_32i8:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512-LABEL: test_broadcast_16i8_32i8:
+-; X64-AVX512: # %bb.0:
+-; X64-AVX512-NEXT: vbroadcasti128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-AVX512-NEXT: retq
+- %1 = load <16 x i8>, <16 x i8> *%p
+- %2 = shufflevector <16 x i8> %1, <16 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+- ret <32 x i8> %2
+-}
+-
+-define <64 x i8> @test_broadcast_16i8_64i8(<16 x i8> *%p) nounwind {
+-; X32-AVX1-LABEL: test_broadcast_16i8_64i8:
+-; X32-AVX1: # %bb.0:
+-; X32-AVX1-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX1-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-AVX1-NEXT: vmovdqa %ymm0, %ymm1
+-; X32-AVX1-NEXT: retl
+-;
+-; X32-AVX2-LABEL: test_broadcast_16i8_64i8:
+-; X32-AVX2: # %bb.0:
+-; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX2-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-AVX2-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX2-NEXT: retl
+-;
+-; X32-AVX512F-LABEL: test_broadcast_16i8_64i8:
+-; X32-AVX512F: # %bb.0:
+-; X32-AVX512F-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512F-NEXT: vbroadcasti128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-AVX512F-NEXT: vmovdqa %ymm0, %ymm1
+-; X32-AVX512F-NEXT: retl
+-;
+-; X32-AVX512BW-LABEL: test_broadcast_16i8_64i8:
+-; X32-AVX512BW: # %bb.0:
+-; X32-AVX512BW-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512BW-NEXT: vbroadcasti32x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
+-; X32-AVX512BW-NEXT: retl
+-;
+-; X32-AVX512DQ-LABEL: test_broadcast_16i8_64i8:
+-; X32-AVX512DQ: # %bb.0:
+-; X32-AVX512DQ-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512DQ-NEXT: vbroadcasti128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X32-AVX512DQ-NEXT: vmovdqa %ymm0, %ymm1
+-; X32-AVX512DQ-NEXT: retl
+-;
+-; X64-AVX1-LABEL: test_broadcast_16i8_64i8:
+-; X64-AVX1: # %bb.0:
+-; X64-AVX1-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-AVX1-NEXT: vmovdqa %ymm0, %ymm1
+-; X64-AVX1-NEXT: retq
+-;
+-; X64-AVX2-LABEL: test_broadcast_16i8_64i8:
+-; X64-AVX2: # %bb.0:
+-; X64-AVX2-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-AVX2-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX2-NEXT: retq
+-;
+-; X64-AVX512F-LABEL: test_broadcast_16i8_64i8:
+-; X64-AVX512F: # %bb.0:
+-; X64-AVX512F-NEXT: vbroadcasti128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-AVX512F-NEXT: vmovdqa %ymm0, %ymm1
+-; X64-AVX512F-NEXT: retq
+-;
+-; X64-AVX512BW-LABEL: test_broadcast_16i8_64i8:
+-; X64-AVX512BW: # %bb.0:
+-; X64-AVX512BW-NEXT: vbroadcasti32x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
+-; X64-AVX512BW-NEXT: retq
+-;
+-; X64-AVX512DQ-LABEL: test_broadcast_16i8_64i8:
+-; X64-AVX512DQ: # %bb.0:
+-; X64-AVX512DQ-NEXT: vbroadcasti128 {{.*#+}} ymm0 = mem[0,1,0,1]
+-; X64-AVX512DQ-NEXT: vmovdqa %ymm0, %ymm1
+-; X64-AVX512DQ-NEXT: retq
+- %1 = load <16 x i8>, <16 x i8> *%p
+- %2 = shufflevector <16 x i8> %1, <16 x i8> undef, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+- ret <64 x i8> %2
+-}
+-
+-define <64 x i8> @test_broadcast_32i8_64i8(<32 x i8> *%p) nounwind {
+-; X32-AVX-LABEL: test_broadcast_32i8_64i8:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX-NEXT: vmovaps (%eax), %ymm0
+-; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512F-LABEL: test_broadcast_32i8_64i8:
+-; X32-AVX512F: # %bb.0:
+-; X32-AVX512F-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512F-NEXT: vmovaps (%eax), %ymm0
+-; X32-AVX512F-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX512F-NEXT: retl
+-;
+-; X32-AVX512BW-LABEL: test_broadcast_32i8_64i8:
+-; X32-AVX512BW: # %bb.0:
+-; X32-AVX512BW-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512BW-NEXT: vbroadcasti64x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3]
+-; X32-AVX512BW-NEXT: retl
+-;
+-; X32-AVX512DQ-LABEL: test_broadcast_32i8_64i8:
+-; X32-AVX512DQ: # %bb.0:
+-; X32-AVX512DQ-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512DQ-NEXT: vmovaps (%eax), %ymm0
+-; X32-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX512DQ-NEXT: retl
+-;
+-; X64-AVX-LABEL: test_broadcast_32i8_64i8:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: vmovaps (%rdi), %ymm0
+-; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512F-LABEL: test_broadcast_32i8_64i8:
+-; X64-AVX512F: # %bb.0:
+-; X64-AVX512F-NEXT: vmovaps (%rdi), %ymm0
+-; X64-AVX512F-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX512F-NEXT: retq
+-;
+-; X64-AVX512BW-LABEL: test_broadcast_32i8_64i8:
+-; X64-AVX512BW: # %bb.0:
+-; X64-AVX512BW-NEXT: vbroadcasti64x4 {{.*#+}} zmm0 = mem[0,1,2,3,0,1,2,3]
+-; X64-AVX512BW-NEXT: retq
+-;
+-; X64-AVX512DQ-LABEL: test_broadcast_32i8_64i8:
+-; X64-AVX512DQ: # %bb.0:
+-; X64-AVX512DQ-NEXT: vmovaps (%rdi), %ymm0
+-; X64-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX512DQ-NEXT: retq
+- %1 = load <32 x i8>, <32 x i8> *%p
+- %2 = shufflevector <32 x i8> %1, <32 x i8> undef, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
+- ret <64 x i8> %2
+-}
+-
+-;
+-; Subvector Load + Broadcast + Store
+-;
+-
+-define <4 x double> @test_broadcast_2f64_4f64_reuse(<2 x double>* %p0, <2 x double>* %p1) {
+-; X32-LABEL: test_broadcast_2f64_4f64_reuse:
+-; X32: # %bb.0:
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32-NEXT: vmovaps (%ecx), %xmm0
+-; X32-NEXT: vmovaps %xmm0, (%eax)
+-; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-NEXT: retl
+-;
+-; X64-LABEL: test_broadcast_2f64_4f64_reuse:
+-; X64: # %bb.0:
+-; X64-NEXT: vmovaps (%rdi), %xmm0
+-; X64-NEXT: vmovaps %xmm0, (%rsi)
+-; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-NEXT: retq
+- %1 = load <2 x double>, <2 x double>* %p0
+- store <2 x double> %1, <2 x double>* %p1
+- %2 = shufflevector <2 x double> %1, <2 x double> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
+- ret <4 x double> %2
+-}
+-
+-define <4 x i64> @test_broadcast_2i64_4i64_reuse(<2 x i64>* %p0, <2 x i64>* %p1) {
+-; X32-LABEL: test_broadcast_2i64_4i64_reuse:
+-; X32: # %bb.0:
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32-NEXT: vmovaps (%ecx), %xmm0
+-; X32-NEXT: vmovaps %xmm0, (%eax)
+-; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-NEXT: retl
+-;
+-; X64-LABEL: test_broadcast_2i64_4i64_reuse:
+-; X64: # %bb.0:
+-; X64-NEXT: vmovaps (%rdi), %xmm0
+-; X64-NEXT: vmovaps %xmm0, (%rsi)
+-; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-NEXT: retq
+- %1 = load <2 x i64>, <2 x i64>* %p0
+- store <2 x i64> %1, <2 x i64>* %p1
+- %2 = shufflevector <2 x i64> %1, <2 x i64> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
+- ret <4 x i64> %2
+-}
+-
+-define <8 x float> @test_broadcast_4f32_8f32_reuse(<4 x float>* %p0, <4 x float>* %p1) {
+-; X32-LABEL: test_broadcast_4f32_8f32_reuse:
+-; X32: # %bb.0:
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32-NEXT: vmovaps (%ecx), %xmm0
+-; X32-NEXT: vmovaps %xmm0, (%eax)
+-; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-NEXT: retl
+-;
+-; X64-LABEL: test_broadcast_4f32_8f32_reuse:
+-; X64: # %bb.0:
+-; X64-NEXT: vmovaps (%rdi), %xmm0
+-; X64-NEXT: vmovaps %xmm0, (%rsi)
+-; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-NEXT: retq
+- %1 = load <4 x float>, <4 x float>* %p0
+- store <4 x float> %1, <4 x float>* %p1
+- %2 = shufflevector <4 x float> %1, <4 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+- ret <8 x float> %2
+-}
+-
+-define <8 x i32> @test_broadcast_4i32_8i32_reuse(<4 x i32>* %p0, <4 x i32>* %p1) {
+-; X32-LABEL: test_broadcast_4i32_8i32_reuse:
+-; X32: # %bb.0:
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32-NEXT: vmovaps (%ecx), %xmm0
+-; X32-NEXT: vmovaps %xmm0, (%eax)
+-; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-NEXT: retl
+-;
+-; X64-LABEL: test_broadcast_4i32_8i32_reuse:
+-; X64: # %bb.0:
+-; X64-NEXT: vmovaps (%rdi), %xmm0
+-; X64-NEXT: vmovaps %xmm0, (%rsi)
+-; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-NEXT: retq
+- %1 = load <4 x i32>, <4 x i32>* %p0
+- store <4 x i32> %1, <4 x i32>* %p1
+- %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+- ret <8 x i32> %2
+-}
+-
+-define <16 x i16> @test_broadcast_8i16_16i16_reuse(<8 x i16> *%p0, <8 x i16> *%p1) nounwind {
+-; X32-LABEL: test_broadcast_8i16_16i16_reuse:
+-; X32: # %bb.0:
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32-NEXT: vmovaps (%ecx), %xmm0
+-; X32-NEXT: vmovaps %xmm0, (%eax)
+-; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-NEXT: retl
+-;
+-; X64-LABEL: test_broadcast_8i16_16i16_reuse:
+-; X64: # %bb.0:
+-; X64-NEXT: vmovaps (%rdi), %xmm0
+-; X64-NEXT: vmovaps %xmm0, (%rsi)
+-; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-NEXT: retq
+- %1 = load <8 x i16>, <8 x i16> *%p0
+- store <8 x i16> %1, <8 x i16>* %p1
+- %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+- ret <16 x i16> %2
+-}
+-
+-define <32 x i8> @test_broadcast_16i8_32i8_reuse(<16 x i8> *%p0, <16 x i8> *%p1) nounwind {
+-; X32-LABEL: test_broadcast_16i8_32i8_reuse:
+-; X32: # %bb.0:
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32-NEXT: vmovaps (%ecx), %xmm0
+-; X32-NEXT: vmovaps %xmm0, (%eax)
+-; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-NEXT: retl
+-;
+-; X64-LABEL: test_broadcast_16i8_32i8_reuse:
+-; X64: # %bb.0:
+-; X64-NEXT: vmovaps (%rdi), %xmm0
+-; X64-NEXT: vmovaps %xmm0, (%rsi)
+-; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-NEXT: retq
+- %1 = load <16 x i8>, <16 x i8> *%p0
+- store <16 x i8> %1, <16 x i8>* %p1
+- %2 = shufflevector <16 x i8> %1, <16 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+- ret <32 x i8> %2
+-}
+-
+-;
+-; Subvector Load + Broadcast with Separate Store
+-;
+-
+-define <8 x i32> @test_broadcast_4i32_8i32_chain(<4 x i32>* %p0, <4 x float>* %p1) {
+-; X32-AVX-LABEL: test_broadcast_4i32_8i32_chain:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32-AVX-NEXT: vmovaps (%ecx), %xmm0
+-; X32-AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+-; X32-AVX-NEXT: vmovaps %xmm1, (%eax)
+-; X32-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512F-LABEL: test_broadcast_4i32_8i32_chain:
+-; X32-AVX512F: # %bb.0:
+-; X32-AVX512F-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512F-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32-AVX512F-NEXT: vmovaps (%ecx), %xmm0
+-; X32-AVX512F-NEXT: vpxor %xmm1, %xmm1, %xmm1
+-; X32-AVX512F-NEXT: vmovdqa %xmm1, (%eax)
+-; X32-AVX512F-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-AVX512F-NEXT: retl
+-;
+-; X32-AVX512BW-LABEL: test_broadcast_4i32_8i32_chain:
+-; X32-AVX512BW: # %bb.0:
+-; X32-AVX512BW-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512BW-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32-AVX512BW-NEXT: vmovaps (%ecx), %xmm0
+-; X32-AVX512BW-NEXT: vpxor %xmm1, %xmm1, %xmm1
+-; X32-AVX512BW-NEXT: vmovdqa %xmm1, (%eax)
+-; X32-AVX512BW-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-AVX512BW-NEXT: retl
+-;
+-; X32-AVX512DQ-LABEL: test_broadcast_4i32_8i32_chain:
+-; X32-AVX512DQ: # %bb.0:
+-; X32-AVX512DQ-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512DQ-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32-AVX512DQ-NEXT: vmovaps (%ecx), %xmm0
+-; X32-AVX512DQ-NEXT: vxorps %xmm1, %xmm1, %xmm1
+-; X32-AVX512DQ-NEXT: vmovaps %xmm1, (%eax)
+-; X32-AVX512DQ-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-AVX512DQ-NEXT: retl
+-;
+-; X64-AVX-LABEL: test_broadcast_4i32_8i32_chain:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: vmovaps (%rdi), %xmm0
+-; X64-AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+-; X64-AVX-NEXT: vmovaps %xmm1, (%rsi)
+-; X64-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512F-LABEL: test_broadcast_4i32_8i32_chain:
+-; X64-AVX512F: # %bb.0:
+-; X64-AVX512F-NEXT: vmovaps (%rdi), %xmm0
+-; X64-AVX512F-NEXT: vpxor %xmm1, %xmm1, %xmm1
+-; X64-AVX512F-NEXT: vmovdqa %xmm1, (%rsi)
+-; X64-AVX512F-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-AVX512F-NEXT: retq
+-;
+-; X64-AVX512BW-LABEL: test_broadcast_4i32_8i32_chain:
+-; X64-AVX512BW: # %bb.0:
+-; X64-AVX512BW-NEXT: vmovaps (%rdi), %xmm0
+-; X64-AVX512BW-NEXT: vpxor %xmm1, %xmm1, %xmm1
+-; X64-AVX512BW-NEXT: vmovdqa %xmm1, (%rsi)
+-; X64-AVX512BW-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-AVX512BW-NEXT: retq
+-;
+-; X64-AVX512DQ-LABEL: test_broadcast_4i32_8i32_chain:
+-; X64-AVX512DQ: # %bb.0:
+-; X64-AVX512DQ-NEXT: vmovaps (%rdi), %xmm0
+-; X64-AVX512DQ-NEXT: vxorps %xmm1, %xmm1, %xmm1
+-; X64-AVX512DQ-NEXT: vmovaps %xmm1, (%rsi)
+-; X64-AVX512DQ-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-AVX512DQ-NEXT: retq
+- %1 = load <4 x i32>, <4 x i32>* %p0
+- store <4 x float> zeroinitializer, <4 x float>* %p1
+- %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+- ret <8 x i32> %2
+-}
+-
+-define <16 x i32> @test_broadcast_4i32_16i32_chain(<4 x i32>* %p0, <4 x float>* %p1) {
+-; X32-AVX-LABEL: test_broadcast_4i32_16i32_chain:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32-AVX-NEXT: vmovaps (%ecx), %xmm0
+-; X32-AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+-; X32-AVX-NEXT: vmovaps %xmm1, (%eax)
+-; X32-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512F-LABEL: test_broadcast_4i32_16i32_chain:
+-; X32-AVX512F: # %bb.0:
+-; X32-AVX512F-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512F-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32-AVX512F-NEXT: vmovdqa (%ecx), %xmm0
+-; X32-AVX512F-NEXT: vpxor %xmm1, %xmm1, %xmm1
+-; X32-AVX512F-NEXT: vmovdqa %xmm1, (%eax)
+-; X32-AVX512F-NEXT: vshufi32x4 {{.*#+}} zmm0 = zmm0[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
+-; X32-AVX512F-NEXT: retl
+-;
+-; X32-AVX512BW-LABEL: test_broadcast_4i32_16i32_chain:
+-; X32-AVX512BW: # %bb.0:
+-; X32-AVX512BW-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512BW-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32-AVX512BW-NEXT: vmovdqa (%ecx), %xmm0
+-; X32-AVX512BW-NEXT: vpxor %xmm1, %xmm1, %xmm1
+-; X32-AVX512BW-NEXT: vmovdqa %xmm1, (%eax)
+-; X32-AVX512BW-NEXT: vshufi32x4 {{.*#+}} zmm0 = zmm0[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
+-; X32-AVX512BW-NEXT: retl
+-;
+-; X32-AVX512DQ-LABEL: test_broadcast_4i32_16i32_chain:
+-; X32-AVX512DQ: # %bb.0:
+-; X32-AVX512DQ-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-AVX512DQ-NEXT: movl {{[0-9]+}}(%esp), %ecx
+-; X32-AVX512DQ-NEXT: vmovdqa (%ecx), %xmm0
+-; X32-AVX512DQ-NEXT: vxorps %xmm1, %xmm1, %xmm1
+-; X32-AVX512DQ-NEXT: vmovaps %xmm1, (%eax)
+-; X32-AVX512DQ-NEXT: vshufi32x4 {{.*#+}} zmm0 = zmm0[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
+-; X32-AVX512DQ-NEXT: retl
+-;
+-; X64-AVX-LABEL: test_broadcast_4i32_16i32_chain:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: vmovaps (%rdi), %xmm0
+-; X64-AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
+-; X64-AVX-NEXT: vmovaps %xmm1, (%rsi)
+-; X64-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512F-LABEL: test_broadcast_4i32_16i32_chain:
+-; X64-AVX512F: # %bb.0:
+-; X64-AVX512F-NEXT: vmovdqa (%rdi), %xmm0
+-; X64-AVX512F-NEXT: vpxor %xmm1, %xmm1, %xmm1
+-; X64-AVX512F-NEXT: vmovdqa %xmm1, (%rsi)
+-; X64-AVX512F-NEXT: vshufi32x4 {{.*#+}} zmm0 = zmm0[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
+-; X64-AVX512F-NEXT: retq
+-;
+-; X64-AVX512BW-LABEL: test_broadcast_4i32_16i32_chain:
+-; X64-AVX512BW: # %bb.0:
+-; X64-AVX512BW-NEXT: vmovdqa (%rdi), %xmm0
+-; X64-AVX512BW-NEXT: vpxor %xmm1, %xmm1, %xmm1
+-; X64-AVX512BW-NEXT: vmovdqa %xmm1, (%rsi)
+-; X64-AVX512BW-NEXT: vshufi32x4 {{.*#+}} zmm0 = zmm0[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
+-; X64-AVX512BW-NEXT: retq
+-;
+-; X64-AVX512DQ-LABEL: test_broadcast_4i32_16i32_chain:
+-; X64-AVX512DQ: # %bb.0:
+-; X64-AVX512DQ-NEXT: vmovdqa (%rdi), %xmm0
+-; X64-AVX512DQ-NEXT: vxorps %xmm1, %xmm1, %xmm1
+-; X64-AVX512DQ-NEXT: vmovaps %xmm1, (%rsi)
+-; X64-AVX512DQ-NEXT: vshufi32x4 {{.*#+}} zmm0 = zmm0[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3]
+-; X64-AVX512DQ-NEXT: retq
+- %1 = load <4 x i32>, <4 x i32>* %p0
+- store <4 x float> zeroinitializer, <4 x float>* %p1
+- %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+- ret <16 x i32> %2
+-}
+-
+-;
+-; subvector Load with multiple uses + broadcast
+-; Fallback to the broadcast should be done
+-;
+-
+-@ga4 = global <4 x i64> zeroinitializer, align 8
+-@gb4 = global <8 x i64> zeroinitializer, align 8
+-
+-define void @fallback_broadcast_v4i64_to_v8i64(<4 x i64> %a, <8 x i64> %b) {
+-; X32-AVX1-LABEL: fallback_broadcast_v4i64_to_v8i64:
+-; X32-AVX1: # %bb.0: # %entry
+-; X32-AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
+-; X32-AVX1-NEXT: vmovdqa {{.*#+}} ymm4 = [1,0,2,0,3,0,4,0]
+-; X32-AVX1-NEXT: vextractf128 $1, %ymm4, %xmm5
+-; X32-AVX1-NEXT: vpaddq %xmm5, %xmm3, %xmm3
+-; X32-AVX1-NEXT: vpaddq %xmm4, %xmm0, %xmm0
+-; X32-AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0
+-; X32-AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3
+-; X32-AVX1-NEXT: vpaddq %xmm5, %xmm3, %xmm3
+-; X32-AVX1-NEXT: vpaddq %xmm4, %xmm2, %xmm2
+-; X32-AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2
+-; X32-AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
+-; X32-AVX1-NEXT: vpaddq %xmm5, %xmm3, %xmm3
+-; X32-AVX1-NEXT: vpaddq %xmm4, %xmm1, %xmm1
+-; X32-AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1
+-; X32-AVX1-NEXT: vandps %ymm4, %ymm1, %ymm1
+-; X32-AVX1-NEXT: vandps %ymm4, %ymm2, %ymm2
+-; X32-AVX1-NEXT: vmovups %ymm0, ga4
+-; X32-AVX1-NEXT: vmovups %ymm2, gb4+32
+-; X32-AVX1-NEXT: vmovups %ymm1, gb4
+-; X32-AVX1-NEXT: vzeroupper
+-; X32-AVX1-NEXT: retl
+-;
+-; X32-AVX2-LABEL: fallback_broadcast_v4i64_to_v8i64:
+-; X32-AVX2: # %bb.0: # %entry
+-; X32-AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [1,0,2,0,3,0,4,0]
+-; X32-AVX2-NEXT: vpaddq %ymm3, %ymm0, %ymm0
+-; X32-AVX2-NEXT: vpaddq %ymm3, %ymm2, %ymm2
+-; X32-AVX2-NEXT: vpaddq %ymm3, %ymm1, %ymm1
+-; X32-AVX2-NEXT: vpand %ymm3, %ymm1, %ymm1
+-; X32-AVX2-NEXT: vpand %ymm3, %ymm2, %ymm2
+-; X32-AVX2-NEXT: vmovdqu %ymm0, ga4
+-; X32-AVX2-NEXT: vmovdqu %ymm2, gb4+32
+-; X32-AVX2-NEXT: vmovdqu %ymm1, gb4
+-; X32-AVX2-NEXT: vzeroupper
+-; X32-AVX2-NEXT: retl
+-;
+-; X32-AVX512-LABEL: fallback_broadcast_v4i64_to_v8i64:
+-; X32-AVX512: # %bb.0: # %entry
+-; X32-AVX512-NEXT: vpaddq {{\.LCPI.*}}, %ymm0, %ymm0
+-; X32-AVX512-NEXT: vmovdqa64 {{.*#+}} zmm2 = [1,0,2,0,3,0,4,0,1,0,2,0,3,0,4,0]
+-; X32-AVX512-NEXT: vpaddq %zmm2, %zmm1, %zmm1
+-; X32-AVX512-NEXT: vpandq %zmm2, %zmm1, %zmm1
+-; X32-AVX512-NEXT: vmovdqu %ymm0, ga4
+-; X32-AVX512-NEXT: vmovdqu64 %zmm1, gb4
+-; X32-AVX512-NEXT: vzeroupper
+-; X32-AVX512-NEXT: retl
+-;
+-; X64-AVX1-LABEL: fallback_broadcast_v4i64_to_v8i64:
+-; X64-AVX1: # %bb.0: # %entry
+-; X64-AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3
+-; X64-AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [3,4]
+-; X64-AVX1-NEXT: vpaddq %xmm4, %xmm3, %xmm3
+-; X64-AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [1,2]
+-; X64-AVX1-NEXT: vpaddq %xmm5, %xmm0, %xmm0
+-; X64-AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0
+-; X64-AVX1-NEXT: vmovaps {{.*#+}} ymm3 = [1,2,3,4]
+-; X64-AVX1-NEXT: vextractf128 $1, %ymm2, %xmm6
+-; X64-AVX1-NEXT: vpaddq %xmm4, %xmm6, %xmm6
+-; X64-AVX1-NEXT: vpaddq %xmm5, %xmm2, %xmm2
+-; X64-AVX1-NEXT: vinsertf128 $1, %xmm6, %ymm2, %ymm2
+-; X64-AVX1-NEXT: vextractf128 $1, %ymm1, %xmm6
+-; X64-AVX1-NEXT: vpaddq %xmm4, %xmm6, %xmm4
+-; X64-AVX1-NEXT: vpaddq %xmm5, %xmm1, %xmm1
+-; X64-AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm1, %ymm1
+-; X64-AVX1-NEXT: vandps %ymm3, %ymm1, %ymm1
+-; X64-AVX1-NEXT: vandps %ymm3, %ymm2, %ymm2
+-; X64-AVX1-NEXT: vmovups %ymm0, {{.*}}(%rip)
+-; X64-AVX1-NEXT: vmovups %ymm2, gb4+{{.*}}(%rip)
+-; X64-AVX1-NEXT: vmovups %ymm1, {{.*}}(%rip)
+-; X64-AVX1-NEXT: vzeroupper
+-; X64-AVX1-NEXT: retq
+-;
+-; X64-AVX2-LABEL: fallback_broadcast_v4i64_to_v8i64:
+-; X64-AVX2: # %bb.0: # %entry
+-; X64-AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [1,2,3,4]
+-; X64-AVX2-NEXT: vpaddq %ymm3, %ymm0, %ymm0
+-; X64-AVX2-NEXT: vpaddq %ymm3, %ymm2, %ymm2
+-; X64-AVX2-NEXT: vpaddq %ymm3, %ymm1, %ymm1
+-; X64-AVX2-NEXT: vpand %ymm3, %ymm1, %ymm1
+-; X64-AVX2-NEXT: vpand %ymm3, %ymm2, %ymm2
+-; X64-AVX2-NEXT: vmovdqu %ymm0, {{.*}}(%rip)
+-; X64-AVX2-NEXT: vmovdqu %ymm2, gb4+{{.*}}(%rip)
+-; X64-AVX2-NEXT: vmovdqu %ymm1, {{.*}}(%rip)
+-; X64-AVX2-NEXT: vzeroupper
+-; X64-AVX2-NEXT: retq
+-;
+-; X64-AVX512-LABEL: fallback_broadcast_v4i64_to_v8i64:
+-; X64-AVX512: # %bb.0: # %entry
+-; X64-AVX512-NEXT: vmovdqa {{.*#+}} ymm2 = [1,2,3,4]
+-; X64-AVX512-NEXT: vpaddq %ymm2, %ymm0, %ymm0
+-; X64-AVX512-NEXT: vinserti64x4 $1, %ymm2, %zmm2, %zmm2
+-; X64-AVX512-NEXT: vpaddq %zmm2, %zmm1, %zmm1
+-; X64-AVX512-NEXT: vpandq %zmm2, %zmm1, %zmm1
+-; X64-AVX512-NEXT: vmovdqu %ymm0, {{.*}}(%rip)
+-; X64-AVX512-NEXT: vmovdqu64 %zmm1, {{.*}}(%rip)
+-; X64-AVX512-NEXT: vzeroupper
+-; X64-AVX512-NEXT: retq
+-entry:
+- %0 = add <4 x i64> %a, <i64 1, i64 2, i64 3, i64 4>
+- %1 = add <8 x i64> %b, <i64 1, i64 2, i64 3, i64 4, i64 1, i64 2, i64 3, i64 4>
+- %2 = and <8 x i64> %1, <i64 1, i64 2, i64 3, i64 4, i64 1, i64 2, i64 3, i64 4>
+- store <4 x i64> %0, <4 x i64>* @ga4, align 8
+- store <8 x i64> %2, <8 x i64>* @gb4, align 8
+- ret void
+-}
+-
+-
+-@ga2 = global <4 x double> zeroinitializer, align 8
+-@gb2 = global <8 x double> zeroinitializer, align 8
+-
+-define void @fallback_broadcast_v4f64_to_v8f64(<4 x double> %a, <8 x double> %b) {
+-; X32-AVX-LABEL: fallback_broadcast_v4f64_to_v8f64:
+-; X32-AVX: # %bb.0: # %entry
+-; X32-AVX-NEXT: vmovapd {{.*#+}} ymm3 = [1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00]
+-; X32-AVX-NEXT: vaddpd %ymm3, %ymm0, %ymm0
+-; X32-AVX-NEXT: vaddpd %ymm3, %ymm2, %ymm2
+-; X32-AVX-NEXT: vaddpd %ymm3, %ymm1, %ymm1
+-; X32-AVX-NEXT: vdivpd %ymm3, %ymm1, %ymm1
+-; X32-AVX-NEXT: vdivpd %ymm3, %ymm2, %ymm2
+-; X32-AVX-NEXT: vmovupd %ymm0, ga2
+-; X32-AVX-NEXT: vmovupd %ymm2, gb2+32
+-; X32-AVX-NEXT: vmovupd %ymm1, gb2
+-; X32-AVX-NEXT: vzeroupper
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512-LABEL: fallback_broadcast_v4f64_to_v8f64:
+-; X32-AVX512: # %bb.0: # %entry
+-; X32-AVX512-NEXT: vmovapd {{.*#+}} ymm2 = [1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00]
+-; X32-AVX512-NEXT: vaddpd %ymm2, %ymm0, %ymm0
+-; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm2, %zmm2, %zmm2
+-; X32-AVX512-NEXT: vaddpd %zmm2, %zmm1, %zmm1
+-; X32-AVX512-NEXT: vdivpd %zmm2, %zmm1, %zmm1
+-; X32-AVX512-NEXT: vmovupd %ymm0, ga2
+-; X32-AVX512-NEXT: vmovupd %zmm1, gb2
+-; X32-AVX512-NEXT: vzeroupper
+-; X32-AVX512-NEXT: retl
+-;
+-; X64-AVX-LABEL: fallback_broadcast_v4f64_to_v8f64:
+-; X64-AVX: # %bb.0: # %entry
+-; X64-AVX-NEXT: vmovapd {{.*#+}} ymm3 = [1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00]
+-; X64-AVX-NEXT: vaddpd %ymm3, %ymm0, %ymm0
+-; X64-AVX-NEXT: vaddpd %ymm3, %ymm2, %ymm2
+-; X64-AVX-NEXT: vaddpd %ymm3, %ymm1, %ymm1
+-; X64-AVX-NEXT: vdivpd %ymm3, %ymm1, %ymm1
+-; X64-AVX-NEXT: vdivpd %ymm3, %ymm2, %ymm2
+-; X64-AVX-NEXT: vmovupd %ymm0, {{.*}}(%rip)
+-; X64-AVX-NEXT: vmovupd %ymm2, gb2+{{.*}}(%rip)
+-; X64-AVX-NEXT: vmovupd %ymm1, {{.*}}(%rip)
+-; X64-AVX-NEXT: vzeroupper
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512-LABEL: fallback_broadcast_v4f64_to_v8f64:
+-; X64-AVX512: # %bb.0: # %entry
+-; X64-AVX512-NEXT: vmovapd {{.*#+}} ymm2 = [1.000000e+00,2.000000e+00,3.000000e+00,4.000000e+00]
+-; X64-AVX512-NEXT: vaddpd %ymm2, %ymm0, %ymm0
+-; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm2, %zmm2, %zmm2
+-; X64-AVX512-NEXT: vaddpd %zmm2, %zmm1, %zmm1
+-; X64-AVX512-NEXT: vdivpd %zmm2, %zmm1, %zmm1
+-; X64-AVX512-NEXT: vmovupd %ymm0, {{.*}}(%rip)
+-; X64-AVX512-NEXT: vmovupd %zmm1, {{.*}}(%rip)
+-; X64-AVX512-NEXT: vzeroupper
+-; X64-AVX512-NEXT: retq
+-entry:
+- %0 = fadd <4 x double> %a, <double 1.0, double 2.0, double 3.0, double 4.0>
+- %1 = fadd <8 x double> %b, <double 1.0, double 2.0, double 3.0, double 4.0, double 1.0, double 2.0, double 3.0, double 4.0>
+- %2 = fdiv <8 x double> %1, <double 1.0, double 2.0, double 3.0, double 4.0, double 1.0, double 2.0, double 3.0, double 4.0>
+- store <4 x double> %0, <4 x double>* @ga2, align 8
+- store <8 x double> %2, <8 x double>* @gb2, align 8
+- ret void
+-}
+-
+-;
+-; Subvector Broadcast from register
+-;
+-
+-define <4 x double> @reg_broadcast_2f64_4f64(<2 x double> %a0) nounwind {
+-; X32-LABEL: reg_broadcast_2f64_4f64:
+-; X32: # %bb.0:
+-; X32-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-NEXT: retl
+-;
+-; X64-LABEL: reg_broadcast_2f64_4f64:
+-; X64: # %bb.0:
+-; X64-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-NEXT: retq
+- %1 = shufflevector <2 x double> %a0, <2 x double> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
+- ret <4 x double> %1
+-}
+-
+-define <8 x double> @reg_broadcast_2f64_8f64(<2 x double> %a0) nounwind {
+-; X32-AVX-LABEL: reg_broadcast_2f64_8f64:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X32-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512-LABEL: reg_broadcast_2f64_8f64:
+-; X32-AVX512: # %bb.0:
+-; X32-AVX512-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X32-AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X32-AVX512-NEXT: retl
+-;
+-; X64-AVX-LABEL: reg_broadcast_2f64_8f64:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X64-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512-LABEL: reg_broadcast_2f64_8f64:
+-; X64-AVX512: # %bb.0:
+-; X64-AVX512-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X64-AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X64-AVX512-NEXT: retq
+- %1 = shufflevector <2 x double> %a0, <2 x double> undef, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>
+- ret <8 x double> %1
+-}
+-
+-define <8 x double> @reg_broadcast_4f64_8f64(<4 x double> %a0) nounwind {
+-; X32-AVX-LABEL: reg_broadcast_4f64_8f64:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512-LABEL: reg_broadcast_4f64_8f64:
+-; X32-AVX512: # %bb.0:
+-; X32-AVX512-NEXT: # kill: def %ymm0 killed %ymm0 def %zmm0
+-; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X32-AVX512-NEXT: retl
+-;
+-; X64-AVX-LABEL: reg_broadcast_4f64_8f64:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512-LABEL: reg_broadcast_4f64_8f64:
+-; X64-AVX512: # %bb.0:
+-; X64-AVX512-NEXT: # kill: def %ymm0 killed %ymm0 def %zmm0
+-; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X64-AVX512-NEXT: retq
+- %1 = shufflevector <4 x double> %a0, <4 x double> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+- ret <8 x double> %1
+-}
+-
+-define <4 x i64> @reg_broadcast_2i64_4i64(<2 x i64> %a0) nounwind {
+-; X32-LABEL: reg_broadcast_2i64_4i64:
+-; X32: # %bb.0:
+-; X32-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-NEXT: retl
+-;
+-; X64-LABEL: reg_broadcast_2i64_4i64:
+-; X64: # %bb.0:
+-; X64-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-NEXT: retq
+- %1 = shufflevector <2 x i64> %a0, <2 x i64> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
+- ret <4 x i64> %1
+-}
+-
+-define <8 x i64> @reg_broadcast_2i64_8i64(<2 x i64> %a0) nounwind {
+-; X32-AVX-LABEL: reg_broadcast_2i64_8i64:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X32-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512-LABEL: reg_broadcast_2i64_8i64:
+-; X32-AVX512: # %bb.0:
+-; X32-AVX512-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X32-AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X32-AVX512-NEXT: retl
+-;
+-; X64-AVX-LABEL: reg_broadcast_2i64_8i64:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X64-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512-LABEL: reg_broadcast_2i64_8i64:
+-; X64-AVX512: # %bb.0:
+-; X64-AVX512-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X64-AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X64-AVX512-NEXT: retq
+- %1 = shufflevector <2 x i64> %a0, <2 x i64> undef, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>
+- ret <8 x i64> %1
+-}
+-
+-define <8 x i64> @reg_broadcast_4i64_8i64(<4 x i64> %a0) nounwind {
+-; X32-AVX-LABEL: reg_broadcast_4i64_8i64:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512-LABEL: reg_broadcast_4i64_8i64:
+-; X32-AVX512: # %bb.0:
+-; X32-AVX512-NEXT: # kill: def %ymm0 killed %ymm0 def %zmm0
+-; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X32-AVX512-NEXT: retl
+-;
+-; X64-AVX-LABEL: reg_broadcast_4i64_8i64:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512-LABEL: reg_broadcast_4i64_8i64:
+-; X64-AVX512: # %bb.0:
+-; X64-AVX512-NEXT: # kill: def %ymm0 killed %ymm0 def %zmm0
+-; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X64-AVX512-NEXT: retq
+- %1 = shufflevector <4 x i64> %a0, <4 x i64> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+- ret <8 x i64> %1
+-}
+-
+-define <8 x float> @reg_broadcast_4f32_8f32(<4 x float> %a0) nounwind {
+-; X32-LABEL: reg_broadcast_4f32_8f32:
+-; X32: # %bb.0:
+-; X32-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-NEXT: retl
+-;
+-; X64-LABEL: reg_broadcast_4f32_8f32:
+-; X64: # %bb.0:
+-; X64-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-NEXT: retq
+- %1 = shufflevector <4 x float> %a0, <4 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+- ret <8 x float> %1
+-}
+-
+-define <16 x float> @reg_broadcast_4f32_16f32(<4 x float> %a0) nounwind {
+-; X32-AVX-LABEL: reg_broadcast_4f32_16f32:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X32-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512-LABEL: reg_broadcast_4f32_16f32:
+-; X32-AVX512: # %bb.0:
+-; X32-AVX512-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X32-AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X32-AVX512-NEXT: retl
+-;
+-; X64-AVX-LABEL: reg_broadcast_4f32_16f32:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X64-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512-LABEL: reg_broadcast_4f32_16f32:
+-; X64-AVX512: # %bb.0:
+-; X64-AVX512-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X64-AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X64-AVX512-NEXT: retq
+- %1 = shufflevector <4 x float> %a0, <4 x float> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+- ret <16 x float> %1
+-}
+-
+-define <16 x float> @reg_broadcast_8f32_16f32(<8 x float> %a0) nounwind {
+-; X32-AVX-LABEL: reg_broadcast_8f32_16f32:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512-LABEL: reg_broadcast_8f32_16f32:
+-; X32-AVX512: # %bb.0:
+-; X32-AVX512-NEXT: # kill: def %ymm0 killed %ymm0 def %zmm0
+-; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X32-AVX512-NEXT: retl
+-;
+-; X64-AVX-LABEL: reg_broadcast_8f32_16f32:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512-LABEL: reg_broadcast_8f32_16f32:
+-; X64-AVX512: # %bb.0:
+-; X64-AVX512-NEXT: # kill: def %ymm0 killed %ymm0 def %zmm0
+-; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X64-AVX512-NEXT: retq
+- %1 = shufflevector <8 x float> %a0, <8 x float> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+- ret <16 x float> %1
+-}
+-
+-define <8 x i32> @reg_broadcast_4i32_8i32(<4 x i32> %a0) nounwind {
+-; X32-LABEL: reg_broadcast_4i32_8i32:
+-; X32: # %bb.0:
+-; X32-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-NEXT: retl
+-;
+-; X64-LABEL: reg_broadcast_4i32_8i32:
+-; X64: # %bb.0:
+-; X64-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-NEXT: retq
+- %1 = shufflevector <4 x i32> %a0, <4 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+- ret <8 x i32> %1
+-}
+-
+-define <16 x i32> @reg_broadcast_4i32_16i32(<4 x i32> %a0) nounwind {
+-; X32-AVX-LABEL: reg_broadcast_4i32_16i32:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X32-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512-LABEL: reg_broadcast_4i32_16i32:
+-; X32-AVX512: # %bb.0:
+-; X32-AVX512-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X32-AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X32-AVX512-NEXT: retl
+-;
+-; X64-AVX-LABEL: reg_broadcast_4i32_16i32:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X64-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512-LABEL: reg_broadcast_4i32_16i32:
+-; X64-AVX512: # %bb.0:
+-; X64-AVX512-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X64-AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X64-AVX512-NEXT: retq
+- %1 = shufflevector <4 x i32> %a0, <4 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+- ret <16 x i32> %1
+-}
+-
+-define <16 x i32> @reg_broadcast_8i32_16i32(<8 x i32> %a0) nounwind {
+-; X32-AVX-LABEL: reg_broadcast_8i32_16i32:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512-LABEL: reg_broadcast_8i32_16i32:
+-; X32-AVX512: # %bb.0:
+-; X32-AVX512-NEXT: # kill: def %ymm0 killed %ymm0 def %zmm0
+-; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X32-AVX512-NEXT: retl
+-;
+-; X64-AVX-LABEL: reg_broadcast_8i32_16i32:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512-LABEL: reg_broadcast_8i32_16i32:
+-; X64-AVX512: # %bb.0:
+-; X64-AVX512-NEXT: # kill: def %ymm0 killed %ymm0 def %zmm0
+-; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X64-AVX512-NEXT: retq
+- %1 = shufflevector <8 x i32> %a0, <8 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+- ret <16 x i32> %1
+-}
+-
+-define <16 x i16> @reg_broadcast_8i16_16i16(<8 x i16> %a0) nounwind {
+-; X32-LABEL: reg_broadcast_8i16_16i16:
+-; X32: # %bb.0:
+-; X32-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-NEXT: retl
+-;
+-; X64-LABEL: reg_broadcast_8i16_16i16:
+-; X64: # %bb.0:
+-; X64-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-NEXT: retq
+- %1 = shufflevector <8 x i16> %a0, <8 x i16> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+- ret <16 x i16> %1
+-}
+-
+-define <32 x i16> @reg_broadcast_8i16_32i16(<8 x i16> %a0) nounwind {
+-; X32-AVX-LABEL: reg_broadcast_8i16_32i16:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X32-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512F-LABEL: reg_broadcast_8i16_32i16:
+-; X32-AVX512F: # %bb.0:
+-; X32-AVX512F-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X32-AVX512F-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-AVX512F-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX512F-NEXT: retl
+-;
+-; X32-AVX512BW-LABEL: reg_broadcast_8i16_32i16:
+-; X32-AVX512BW: # %bb.0:
+-; X32-AVX512BW-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X32-AVX512BW-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X32-AVX512BW-NEXT: retl
+-;
+-; X32-AVX512DQ-LABEL: reg_broadcast_8i16_32i16:
+-; X32-AVX512DQ: # %bb.0:
+-; X32-AVX512DQ-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X32-AVX512DQ-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX512DQ-NEXT: retl
+-;
+-; X64-AVX-LABEL: reg_broadcast_8i16_32i16:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X64-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512F-LABEL: reg_broadcast_8i16_32i16:
+-; X64-AVX512F: # %bb.0:
+-; X64-AVX512F-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X64-AVX512F-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-AVX512F-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX512F-NEXT: retq
+-;
+-; X64-AVX512BW-LABEL: reg_broadcast_8i16_32i16:
+-; X64-AVX512BW: # %bb.0:
+-; X64-AVX512BW-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X64-AVX512BW-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X64-AVX512BW-NEXT: retq
+-;
+-; X64-AVX512DQ-LABEL: reg_broadcast_8i16_32i16:
+-; X64-AVX512DQ: # %bb.0:
+-; X64-AVX512DQ-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X64-AVX512DQ-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX512DQ-NEXT: retq
+- %1 = shufflevector <8 x i16> %a0, <8 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+- ret <32 x i16> %1
+-}
+-
+-define <32 x i16> @reg_broadcast_16i16_32i16(<16 x i16> %a0) nounwind {
+-; X32-AVX-LABEL: reg_broadcast_16i16_32i16:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512F-LABEL: reg_broadcast_16i16_32i16:
+-; X32-AVX512F: # %bb.0:
+-; X32-AVX512F-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX512F-NEXT: retl
+-;
+-; X32-AVX512BW-LABEL: reg_broadcast_16i16_32i16:
+-; X32-AVX512BW: # %bb.0:
+-; X32-AVX512BW-NEXT: # kill: def %ymm0 killed %ymm0 def %zmm0
+-; X32-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X32-AVX512BW-NEXT: retl
+-;
+-; X32-AVX512DQ-LABEL: reg_broadcast_16i16_32i16:
+-; X32-AVX512DQ: # %bb.0:
+-; X32-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX512DQ-NEXT: retl
+-;
+-; X64-AVX-LABEL: reg_broadcast_16i16_32i16:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512F-LABEL: reg_broadcast_16i16_32i16:
+-; X64-AVX512F: # %bb.0:
+-; X64-AVX512F-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX512F-NEXT: retq
+-;
+-; X64-AVX512BW-LABEL: reg_broadcast_16i16_32i16:
+-; X64-AVX512BW: # %bb.0:
+-; X64-AVX512BW-NEXT: # kill: def %ymm0 killed %ymm0 def %zmm0
+-; X64-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X64-AVX512BW-NEXT: retq
+-;
+-; X64-AVX512DQ-LABEL: reg_broadcast_16i16_32i16:
+-; X64-AVX512DQ: # %bb.0:
+-; X64-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX512DQ-NEXT: retq
+- %1 = shufflevector <16 x i16> %a0, <16 x i16> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+- ret <32 x i16> %1
+-}
+-
+-define <32 x i8> @reg_broadcast_16i8_32i8(<16 x i8> %a0) nounwind {
+-; X32-LABEL: reg_broadcast_16i8_32i8:
+-; X32: # %bb.0:
+-; X32-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X32-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-NEXT: retl
+-;
+-; X64-LABEL: reg_broadcast_16i8_32i8:
+-; X64: # %bb.0:
+-; X64-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X64-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-NEXT: retq
+- %1 = shufflevector <16 x i8> %a0, <16 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+- ret <32 x i8> %1
+-}
+-
+-define <64 x i8> @reg_broadcast_16i8_64i8(<16 x i8> %a0) nounwind {
+-; X32-AVX-LABEL: reg_broadcast_16i8_64i8:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X32-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512F-LABEL: reg_broadcast_16i8_64i8:
+-; X32-AVX512F: # %bb.0:
+-; X32-AVX512F-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X32-AVX512F-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-AVX512F-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX512F-NEXT: retl
+-;
+-; X32-AVX512BW-LABEL: reg_broadcast_16i8_64i8:
+-; X32-AVX512BW: # %bb.0:
+-; X32-AVX512BW-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X32-AVX512BW-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X32-AVX512BW-NEXT: retl
+-;
+-; X32-AVX512DQ-LABEL: reg_broadcast_16i8_64i8:
+-; X32-AVX512DQ: # %bb.0:
+-; X32-AVX512DQ-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X32-AVX512DQ-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X32-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX512DQ-NEXT: retl
+-;
+-; X64-AVX-LABEL: reg_broadcast_16i8_64i8:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X64-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512F-LABEL: reg_broadcast_16i8_64i8:
+-; X64-AVX512F: # %bb.0:
+-; X64-AVX512F-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X64-AVX512F-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-AVX512F-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX512F-NEXT: retq
+-;
+-; X64-AVX512BW-LABEL: reg_broadcast_16i8_64i8:
+-; X64-AVX512BW: # %bb.0:
+-; X64-AVX512BW-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X64-AVX512BW-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X64-AVX512BW-NEXT: retq
+-;
+-; X64-AVX512DQ-LABEL: reg_broadcast_16i8_64i8:
+-; X64-AVX512DQ: # %bb.0:
+-; X64-AVX512DQ-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; X64-AVX512DQ-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
+-; X64-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX512DQ-NEXT: retq
+- %1 = shufflevector <16 x i8> %a0, <16 x i8> undef, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
+- ret <64 x i8> %1
+-}
+-
+-define <64 x i8> @reg_broadcast_32i8_64i8(<32 x i8> %a0) nounwind {
+-; X32-AVX-LABEL: reg_broadcast_32i8_64i8:
+-; X32-AVX: # %bb.0:
+-; X32-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX-NEXT: retl
+-;
+-; X32-AVX512F-LABEL: reg_broadcast_32i8_64i8:
+-; X32-AVX512F: # %bb.0:
+-; X32-AVX512F-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX512F-NEXT: retl
+-;
+-; X32-AVX512BW-LABEL: reg_broadcast_32i8_64i8:
+-; X32-AVX512BW: # %bb.0:
+-; X32-AVX512BW-NEXT: # kill: def %ymm0 killed %ymm0 def %zmm0
+-; X32-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X32-AVX512BW-NEXT: retl
+-;
+-; X32-AVX512DQ-LABEL: reg_broadcast_32i8_64i8:
+-; X32-AVX512DQ: # %bb.0:
+-; X32-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
+-; X32-AVX512DQ-NEXT: retl
+-;
+-; X64-AVX-LABEL: reg_broadcast_32i8_64i8:
+-; X64-AVX: # %bb.0:
+-; X64-AVX-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX-NEXT: retq
+-;
+-; X64-AVX512F-LABEL: reg_broadcast_32i8_64i8:
+-; X64-AVX512F: # %bb.0:
+-; X64-AVX512F-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX512F-NEXT: retq
+-;
+-; X64-AVX512BW-LABEL: reg_broadcast_32i8_64i8:
+-; X64-AVX512BW: # %bb.0:
+-; X64-AVX512BW-NEXT: # kill: def %ymm0 killed %ymm0 def %zmm0
+-; X64-AVX512BW-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0
+-; X64-AVX512BW-NEXT: retq
+-;
+-; X64-AVX512DQ-LABEL: reg_broadcast_32i8_64i8:
+-; X64-AVX512DQ: # %bb.0:
+-; X64-AVX512DQ-NEXT: vmovaps %ymm0, %ymm1
+-; X64-AVX512DQ-NEXT: retq
+- %1 = shufflevector <32 x i8> %a0, <32 x i8> undef, <64 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
+- ret <64 x i8> %1
+-}
+diff --git a/test/CodeGen/X86/test-shrink-bug.ll b/test/CodeGen/X86/test-shrink-bug.ll
+index 814e07f718b..a79bb0a8c21 100644
+--- a/test/CodeGen/X86/test-shrink-bug.ll
++++ b/test/CodeGen/X86/test-shrink-bug.ll
+@@ -1,18 +1,39 @@
+-; RUN: llc < %s | FileCheck %s
+-
+-; Codegen shouldn't reduce the comparison down to testb $-1, %al
+-; because that changes the result of the signed test.
+-; PR5132
+-; CHECK: testl $255, %eax
+-
+-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+-target triple = "i386-apple-darwin10.0"
++; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
++; RUN: llc < %s -mtriple=i386-apple-darwin10.0 | FileCheck %s --check-prefix=CHECK-X86
++; RUN: llc < %s -mtriple=x86_64-grtev4-linux-gnu | FileCheck %s --check-prefix=CHECK-X64
+
+ @g_14 = global i8 -6, align 1 ; <i8*> [#uses=1]
+
+ declare i32 @func_16(i8 signext %p_19, i32 %p_20) nounwind
+
+ define i32 @func_35(i64 %p_38) nounwind ssp {
++; CHECK-X86-LABEL: func_35:
++; CHECK-X86: ## %bb.0: ## %entry
++; CHECK-X86-NEXT: subl $12, %esp
++; CHECK-X86-NEXT: movsbl _g_14, %eax
++; CHECK-X86-NEXT: xorl %ecx, %ecx
++; CHECK-X86-NEXT: testl $255, %eax
++; CHECK-X86-NEXT: setg %cl
++; CHECK-X86-NEXT: subl $8, %esp
++; CHECK-X86-NEXT: pushl %ecx
++; CHECK-X86-NEXT: pushl %eax
++; CHECK-X86-NEXT: calll _func_16
++; CHECK-X86-NEXT: addl $16, %esp
++; CHECK-X86-NEXT: movl $1, %eax
++; CHECK-X86-NEXT: addl $12, %esp
++; CHECK-X86-NEXT: retl
++;
++; CHECK-X64-LABEL: func_35:
++; CHECK-X64: # %bb.0: # %entry
++; CHECK-X64-NEXT: pushq %rax
++; CHECK-X64-NEXT: movsbl {{.*}}(%rip), %edi
++; CHECK-X64-NEXT: xorl %esi, %esi
++; CHECK-X64-NEXT: testl $255, %edi
++; CHECK-X64-NEXT: setg %sil
++; CHECK-X64-NEXT: callq func_16
++; CHECK-X64-NEXT: movl $1, %eax
++; CHECK-X64-NEXT: popq %rcx
++; CHECK-X64-NEXT: retq
+ entry:
+ %tmp = load i8, i8* @g_14 ; <i8> [#uses=2]
+ %conv = zext i8 %tmp to i32 ; <i32> [#uses=1]
+@@ -21,3 +42,62 @@ entry:
+ %call = call i32 @func_16(i8 signext %tmp, i32 %conv2) ssp ; <i32> [#uses=1]
+ ret i32 1
+ }
++
++define void @fail(i16 %a, <2 x i8> %b) {
++; CHECK-X86-LABEL: fail:
++; CHECK-X86: ## %bb.0:
++; CHECK-X86-NEXT: subl $12, %esp
++; CHECK-X86-NEXT: .cfi_def_cfa_offset 16
++; CHECK-X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
++; CHECK-X86-NEXT: cmpb $123, {{[0-9]+}}(%esp)
++; CHECK-X86-NEXT: sete %al
++; CHECK-X86-NEXT: testl $263, %ecx ## imm = 0x107
++; CHECK-X86-NEXT: je LBB1_2
++; CHECK-X86-NEXT: ## %bb.1:
++; CHECK-X86-NEXT: testb %al, %al
++; CHECK-X86-NEXT: jne LBB1_2
++; CHECK-X86-NEXT: ## %bb.3: ## %no
++; CHECK-X86-NEXT: calll _bar
++; CHECK-X86-NEXT: addl $12, %esp
++; CHECK-X86-NEXT: retl
++; CHECK-X86-NEXT: LBB1_2: ## %yes
++; CHECK-X86-NEXT: addl $12, %esp
++; CHECK-X86-NEXT: retl
++;
++; CHECK-X64-LABEL: fail:
++; CHECK-X64: # %bb.0:
++; CHECK-X64-NEXT: pushq %rax
++; CHECK-X64-NEXT: .cfi_def_cfa_offset 16
++; CHECK-X64-NEXT: andw $263, %di # imm = 0x107
++; CHECK-X64-NEXT: je .LBB1_2
++; CHECK-X64-NEXT: # %bb.1:
++; CHECK-X64-NEXT: pand {{.*}}(%rip), %xmm0
++; CHECK-X64-NEXT: pcmpeqd {{.*}}(%rip), %xmm0
++; CHECK-X64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,0,3,2]
++; CHECK-X64-NEXT: pand %xmm0, %xmm1
++; CHECK-X64-NEXT: pextrw $4, %xmm1, %eax
++; CHECK-X64-NEXT: testb $1, %al
++; CHECK-X64-NEXT: jne .LBB1_2
++; CHECK-X64-NEXT: # %bb.3: # %no
++; CHECK-X64-NEXT: callq bar
++; CHECK-X64-NEXT: popq %rax
++; CHECK-X64-NEXT: retq
++; CHECK-X64-NEXT: .LBB1_2: # %yes
++; CHECK-X64-NEXT: popq %rax
++; CHECK-X64-NEXT: retq
++ %1 = icmp eq <2 x i8> %b, <i8 40, i8 123>
++ %2 = extractelement <2 x i1> %1, i32 1
++ %3 = and i16 %a, 263
++ %4 = icmp eq i16 %3, 0
++ %merge = or i1 %4, %2
++ br i1 %merge, label %yes, label %no
++
++yes: ; preds = %0
++ ret void
++
++no: ; preds = %0
++ call void @bar()
++ ret void
++}
++
++declare void @bar()
+diff --git a/test/CodeGen/X86/test-shrink.ll b/test/CodeGen/X86/test-shrink.ll
+index 9e59f9a2faa..0cc7849e8e4 100644
+--- a/test/CodeGen/X86/test-shrink.ll
++++ b/test/CodeGen/X86/test-shrink.ll
+@@ -481,4 +481,94 @@ no:
+ ret void
+ }
+
++define void @truncand32(i16 inreg %x) nounwind {
++; CHECK-LINUX64-LABEL: truncand32:
++; CHECK-LINUX64: # %bb.0:
++; CHECK-LINUX64-NEXT: testl $2049, %edi # imm = 0x801
++; CHECK-LINUX64-NEXT: je .LBB11_1
++; CHECK-LINUX64-NEXT: # %bb.2: # %no
++; CHECK-LINUX64-NEXT: retq
++; CHECK-LINUX64-NEXT: .LBB11_1: # %yes
++; CHECK-LINUX64-NEXT: pushq %rax
++; CHECK-LINUX64-NEXT: callq bar
++; CHECK-LINUX64-NEXT: popq %rax
++; CHECK-LINUX64-NEXT: retq
++;
++; CHECK-WIN32-64-LABEL: truncand32:
++; CHECK-WIN32-64: # %bb.0:
++; CHECK-WIN32-64-NEXT: subq $40, %rsp
++; CHECK-WIN32-64-NEXT: testl $2049, %ecx # imm = 0x801
++; CHECK-WIN32-64-NEXT: je .LBB11_1
++; CHECK-WIN32-64-NEXT: # %bb.2: # %no
++; CHECK-WIN32-64-NEXT: addq $40, %rsp
++; CHECK-WIN32-64-NEXT: retq
++; CHECK-WIN32-64-NEXT: .LBB11_1: # %yes
++; CHECK-WIN32-64-NEXT: callq bar
++; CHECK-WIN32-64-NEXT: addq $40, %rsp
++; CHECK-WIN32-64-NEXT: retq
++;
++; CHECK-X86-LABEL: truncand32:
++; CHECK-X86: # %bb.0:
++; CHECK-X86-NEXT: testl $2049, %eax # imm = 0x801
++; CHECK-X86-NEXT: je .LBB11_1
++; CHECK-X86-NEXT: # %bb.2: # %no
++; CHECK-X86-NEXT: retl
++; CHECK-X86-NEXT: .LBB11_1: # %yes
++; CHECK-X86-NEXT: calll bar
++; CHECK-X86-NEXT: retl
++ %t = and i16 %x, 2049
++ %s = icmp eq i16 %t, 0
++ br i1 %s, label %yes, label %no
++
++yes:
++ call void @bar()
++ ret void
++no:
++ ret void
++}
++
++define void @testw(i16 inreg %x) nounwind minsize {
++; CHECK-LINUX64-LABEL: testw:
++; CHECK-LINUX64: # %bb.0:
++; CHECK-LINUX64-NEXT: testw $2049, %di # imm = 0x801
++; CHECK-LINUX64-NEXT: je .LBB12_1
++; CHECK-LINUX64-NEXT: # %bb.2: # %no
++; CHECK-LINUX64-NEXT: retq
++; CHECK-LINUX64-NEXT: .LBB12_1: # %yes
++; CHECK-LINUX64-NEXT: pushq %rax
++; CHECK-LINUX64-NEXT: callq bar
++; CHECK-LINUX64-NEXT: popq %rax
++; CHECK-LINUX64-NEXT: retq
++;
++; CHECK-WIN32-64-LABEL: testw:
++; CHECK-WIN32-64: # %bb.0:
++; CHECK-WIN32-64-NEXT: subq $40, %rsp
++; CHECK-WIN32-64-NEXT: testw $2049, %cx # imm = 0x801
++; CHECK-WIN32-64-NEXT: jne .LBB12_2
++; CHECK-WIN32-64-NEXT: # %bb.1: # %yes
++; CHECK-WIN32-64-NEXT: callq bar
++; CHECK-WIN32-64-NEXT: .LBB12_2: # %no
++; CHECK-WIN32-64-NEXT: addq $40, %rsp
++; CHECK-WIN32-64-NEXT: retq
++;
++; CHECK-X86-LABEL: testw:
++; CHECK-X86: # %bb.0:
++; CHECK-X86-NEXT: testw $2049, %ax # imm = 0x801
++; CHECK-X86-NEXT: je .LBB12_1
++; CHECK-X86-NEXT: # %bb.2: # %no
++; CHECK-X86-NEXT: retl
++; CHECK-X86-NEXT: .LBB12_1: # %yes
++; CHECK-X86-NEXT: calll bar
++; CHECK-X86-NEXT: retl
++ %t = and i16 %x, 2049
++ %s = icmp eq i16 %t, 0
++ br i1 %s, label %yes, label %no
++
++yes:
++ call void @bar()
++ ret void
++no:
++ ret void
++}
++
+ declare void @bar()
+diff --git a/test/CodeGen/X86/testb-je-fusion.ll b/test/CodeGen/X86/testb-je-fusion.ll
+index c085a422295..47453ca6791 100644
+--- a/test/CodeGen/X86/testb-je-fusion.ll
++++ b/test/CodeGen/X86/testb-je-fusion.ll
+@@ -1,11 +1,18 @@
++; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+ ; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx | FileCheck %s
+
+ ; testb should be scheduled right before je to enable macro-fusion.
+
+-; CHECK: testb $2, %{{[abcd]}}h
+-; CHECK-NEXT: je
+-
+ define i32 @check_flag(i32 %flags, ...) nounwind {
++; CHECK-LABEL: check_flag:
++; CHECK: # %bb.0: # %entry
++; CHECK-NEXT: xorl %eax, %eax
++; CHECK-NEXT: testl $512, %edi # imm = 0x200
++; CHECK-NEXT: je .LBB0_2
++; CHECK-NEXT: # %bb.1: # %if.then
++; CHECK-NEXT: movl $1, %eax
++; CHECK-NEXT: .LBB0_2: # %if.end
++; CHECK-NEXT: retq
+ entry:
+ %and = and i32 %flags, 512
+ %tobool = icmp eq i32 %and, 0
+diff --git a/test/CodeGen/X86/var-permute-256.ll b/test/CodeGen/X86/var-permute-256.ll
+deleted file mode 100644
+index b624fb08719..00000000000
+--- a/test/CodeGen/X86/var-permute-256.ll
++++ /dev/null
+@@ -1,1459 +0,0 @@
+-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVXNOVLBW,AVX1
+-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVXNOVLBW,INT256,AVX2
+-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVXNOVLBW,INT256,AVX512,AVX512F
+-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX,AVXNOVLBW,INT256,AVX512,AVX512VL
+-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX,INT256,AVX512,AVX512VLBW
+-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+avx512vbmi | FileCheck %s --check-prefixes=AVX,INT256,AVX512,AVX512VLBW,VBMI
+-
+-define <4 x i64> @var_shuffle_v4i64(<4 x i64> %v, <4 x i64> %indices) nounwind {
+-; AVX1-LABEL: var_shuffle_v4i64:
+-; AVX1: # %bb.0:
+-; AVX1-NEXT: pushq %rbp
+-; AVX1-NEXT: movq %rsp, %rbp
+-; AVX1-NEXT: andq $-32, %rsp
+-; AVX1-NEXT: subq $64, %rsp
+-; AVX1-NEXT: vmovq %xmm1, %rax
+-; AVX1-NEXT: andl $3, %eax
+-; AVX1-NEXT: vpextrq $1, %xmm1, %rcx
+-; AVX1-NEXT: andl $3, %ecx
+-; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1
+-; AVX1-NEXT: vmovq %xmm1, %rdx
+-; AVX1-NEXT: andl $3, %edx
+-; AVX1-NEXT: vpextrq $1, %xmm1, %rsi
+-; AVX1-NEXT: andl $3, %esi
+-; AVX1-NEXT: vmovaps %ymm0, (%rsp)
+-; AVX1-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+-; AVX1-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
+-; AVX1-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
+-; AVX1-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
+-; AVX1-NEXT: vmovsd {{.*#+}} xmm2 = mem[0],zero
+-; AVX1-NEXT: vmovlhps {{.*#+}} xmm1 = xmm2[0],xmm1[0]
+-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+-; AVX1-NEXT: movq %rbp, %rsp
+-; AVX1-NEXT: popq %rbp
+-; AVX1-NEXT: retq
+-;
+-; AVX2-LABEL: var_shuffle_v4i64:
+-; AVX2: # %bb.0:
+-; AVX2-NEXT: pushq %rbp
+-; AVX2-NEXT: movq %rsp, %rbp
+-; AVX2-NEXT: andq $-32, %rsp
+-; AVX2-NEXT: subq $64, %rsp
+-; AVX2-NEXT: vmovq %xmm1, %rax
+-; AVX2-NEXT: andl $3, %eax
+-; AVX2-NEXT: vpextrq $1, %xmm1, %rcx
+-; AVX2-NEXT: andl $3, %ecx
+-; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm1
+-; AVX2-NEXT: vmovq %xmm1, %rdx
+-; AVX2-NEXT: andl $3, %edx
+-; AVX2-NEXT: vpextrq $1, %xmm1, %rsi
+-; AVX2-NEXT: andl $3, %esi
+-; AVX2-NEXT: vmovaps %ymm0, (%rsp)
+-; AVX2-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+-; AVX2-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
+-; AVX2-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
+-; AVX2-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
+-; AVX2-NEXT: vmovsd {{.*#+}} xmm2 = mem[0],zero
+-; AVX2-NEXT: vmovlhps {{.*#+}} xmm1 = xmm2[0],xmm1[0]
+-; AVX2-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+-; AVX2-NEXT: movq %rbp, %rsp
+-; AVX2-NEXT: popq %rbp
+-; AVX2-NEXT: retq
+-;
+-; AVX512F-LABEL: var_shuffle_v4i64:
+-; AVX512F: # %bb.0:
+-; AVX512F-NEXT: pushq %rbp
+-; AVX512F-NEXT: movq %rsp, %rbp
+-; AVX512F-NEXT: andq $-32, %rsp
+-; AVX512F-NEXT: subq $64, %rsp
+-; AVX512F-NEXT: vmovq %xmm1, %rax
+-; AVX512F-NEXT: andl $3, %eax
+-; AVX512F-NEXT: vpextrq $1, %xmm1, %rcx
+-; AVX512F-NEXT: andl $3, %ecx
+-; AVX512F-NEXT: vextracti128 $1, %ymm1, %xmm1
+-; AVX512F-NEXT: vmovq %xmm1, %rdx
+-; AVX512F-NEXT: andl $3, %edx
+-; AVX512F-NEXT: vpextrq $1, %xmm1, %rsi
+-; AVX512F-NEXT: andl $3, %esi
+-; AVX512F-NEXT: vmovaps %ymm0, (%rsp)
+-; AVX512F-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+-; AVX512F-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
+-; AVX512F-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
+-; AVX512F-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
+-; AVX512F-NEXT: vmovsd {{.*#+}} xmm2 = mem[0],zero
+-; AVX512F-NEXT: vmovlhps {{.*#+}} xmm1 = xmm2[0],xmm1[0]
+-; AVX512F-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+-; AVX512F-NEXT: movq %rbp, %rsp
+-; AVX512F-NEXT: popq %rbp
+-; AVX512F-NEXT: retq
+-;
+-; AVX512VL-LABEL: var_shuffle_v4i64:
+-; AVX512VL: # %bb.0:
+-; AVX512VL-NEXT: vpermpd %ymm0, %ymm1, %ymm0
+-; AVX512VL-NEXT: retq
+-;
+-; AVX512VLBW-LABEL: var_shuffle_v4i64:
+-; AVX512VLBW: # %bb.0:
+-; AVX512VLBW-NEXT: vpermpd %ymm0, %ymm1, %ymm0
+-; AVX512VLBW-NEXT: retq
+- %index0 = extractelement <4 x i64> %indices, i32 0
+- %index1 = extractelement <4 x i64> %indices, i32 1
+- %index2 = extractelement <4 x i64> %indices, i32 2
+- %index3 = extractelement <4 x i64> %indices, i32 3
+- %v0 = extractelement <4 x i64> %v, i64 %index0
+- %v1 = extractelement <4 x i64> %v, i64 %index1
+- %v2 = extractelement <4 x i64> %v, i64 %index2
+- %v3 = extractelement <4 x i64> %v, i64 %index3
+- %ret0 = insertelement <4 x i64> undef, i64 %v0, i32 0
+- %ret1 = insertelement <4 x i64> %ret0, i64 %v1, i32 1
+- %ret2 = insertelement <4 x i64> %ret1, i64 %v2, i32 2
+- %ret3 = insertelement <4 x i64> %ret2, i64 %v3, i32 3
+- ret <4 x i64> %ret3
+-}
+-
+-define <8 x i32> @var_shuffle_v8i32(<8 x i32> %v, <8 x i32> %indices) nounwind {
+-; AVX1-LABEL: var_shuffle_v8i32:
+-; AVX1: # %bb.0:
+-; AVX1-NEXT: pushq %rbp
+-; AVX1-NEXT: movq %rsp, %rbp
+-; AVX1-NEXT: andq $-32, %rsp
+-; AVX1-NEXT: subq $64, %rsp
+-; AVX1-NEXT: vpextrq $1, %xmm1, %r8
+-; AVX1-NEXT: movq %r8, %rcx
+-; AVX1-NEXT: shrq $30, %rcx
+-; AVX1-NEXT: vmovq %xmm1, %r9
+-; AVX1-NEXT: movq %r9, %rsi
+-; AVX1-NEXT: shrq $30, %rsi
+-; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1
+-; AVX1-NEXT: vpextrq $1, %xmm1, %r10
+-; AVX1-NEXT: movq %r10, %rdi
+-; AVX1-NEXT: shrq $30, %rdi
+-; AVX1-NEXT: vmovq %xmm1, %rax
+-; AVX1-NEXT: movq %rax, %rdx
+-; AVX1-NEXT: shrq $30, %rdx
+-; AVX1-NEXT: vmovaps %ymm0, (%rsp)
+-; AVX1-NEXT: andl $7, %r9d
+-; AVX1-NEXT: andl $28, %esi
+-; AVX1-NEXT: andl $7, %r8d
+-; AVX1-NEXT: andl $28, %ecx
+-; AVX1-NEXT: andl $7, %eax
+-; AVX1-NEXT: andl $28, %edx
+-; AVX1-NEXT: andl $7, %r10d
+-; AVX1-NEXT: andl $28, %edi
+-; AVX1-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
+-; AVX1-NEXT: vpinsrd $1, (%rsp,%rdx), %xmm0, %xmm0
+-; AVX1-NEXT: vpinsrd $2, (%rsp,%r10,4), %xmm0, %xmm0
+-; AVX1-NEXT: vpinsrd $3, (%rsp,%rdi), %xmm0, %xmm0
+-; AVX1-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero
+-; AVX1-NEXT: vpinsrd $1, (%rsp,%rsi), %xmm1, %xmm1
+-; AVX1-NEXT: vpinsrd $2, (%rsp,%r8,4), %xmm1, %xmm1
+-; AVX1-NEXT: vpinsrd $3, (%rsp,%rcx), %xmm1, %xmm1
+-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+-; AVX1-NEXT: movq %rbp, %rsp
+-; AVX1-NEXT: popq %rbp
+-; AVX1-NEXT: retq
+-;
+-; INT256-LABEL: var_shuffle_v8i32:
+-; INT256: # %bb.0:
+-; INT256-NEXT: vpermps %ymm0, %ymm1, %ymm0
+-; INT256-NEXT: retq
+- %index0 = extractelement <8 x i32> %indices, i32 0
+- %index1 = extractelement <8 x i32> %indices, i32 1
+- %index2 = extractelement <8 x i32> %indices, i32 2
+- %index3 = extractelement <8 x i32> %indices, i32 3
+- %index4 = extractelement <8 x i32> %indices, i32 4
+- %index5 = extractelement <8 x i32> %indices, i32 5
+- %index6 = extractelement <8 x i32> %indices, i32 6
+- %index7 = extractelement <8 x i32> %indices, i32 7
+- %v0 = extractelement <8 x i32> %v, i32 %index0
+- %v1 = extractelement <8 x i32> %v, i32 %index1
+- %v2 = extractelement <8 x i32> %v, i32 %index2
+- %v3 = extractelement <8 x i32> %v, i32 %index3
+- %v4 = extractelement <8 x i32> %v, i32 %index4
+- %v5 = extractelement <8 x i32> %v, i32 %index5
+- %v6 = extractelement <8 x i32> %v, i32 %index6
+- %v7 = extractelement <8 x i32> %v, i32 %index7
+- %ret0 = insertelement <8 x i32> undef, i32 %v0, i32 0
+- %ret1 = insertelement <8 x i32> %ret0, i32 %v1, i32 1
+- %ret2 = insertelement <8 x i32> %ret1, i32 %v2, i32 2
+- %ret3 = insertelement <8 x i32> %ret2, i32 %v3, i32 3
+- %ret4 = insertelement <8 x i32> %ret3, i32 %v4, i32 4
+- %ret5 = insertelement <8 x i32> %ret4, i32 %v5, i32 5
+- %ret6 = insertelement <8 x i32> %ret5, i32 %v6, i32 6
+- %ret7 = insertelement <8 x i32> %ret6, i32 %v7, i32 7
+- ret <8 x i32> %ret7
+-}
+-
+-define <16 x i16> @var_shuffle_v16i16(<16 x i16> %v, <16 x i16> %indices) nounwind {
+-; AVX1-LABEL: var_shuffle_v16i16:
+-; AVX1: # %bb.0:
+-; AVX1-NEXT: pushq %rbp
+-; AVX1-NEXT: movq %rsp, %rbp
+-; AVX1-NEXT: andq $-32, %rsp
+-; AVX1-NEXT: subq $64, %rsp
+-; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
+-; AVX1-NEXT: vmovd %xmm2, %eax
+-; AVX1-NEXT: vmovaps %ymm0, (%rsp)
+-; AVX1-NEXT: andl $15, %eax
+-; AVX1-NEXT: movzwl (%rsp,%rax,2), %eax
+-; AVX1-NEXT: vmovd %eax, %xmm0
+-; AVX1-NEXT: vpextrw $1, %xmm2, %eax
+-; AVX1-NEXT: andl $15, %eax
+-; AVX1-NEXT: vpinsrw $1, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX1-NEXT: vpextrw $2, %xmm2, %eax
+-; AVX1-NEXT: andl $15, %eax
+-; AVX1-NEXT: vpinsrw $2, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX1-NEXT: vpextrw $3, %xmm2, %eax
+-; AVX1-NEXT: andl $15, %eax
+-; AVX1-NEXT: vpinsrw $3, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX1-NEXT: vpextrw $4, %xmm2, %eax
+-; AVX1-NEXT: andl $15, %eax
+-; AVX1-NEXT: vpinsrw $4, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX1-NEXT: vpextrw $5, %xmm2, %eax
+-; AVX1-NEXT: andl $15, %eax
+-; AVX1-NEXT: vpinsrw $5, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX1-NEXT: vpextrw $6, %xmm2, %eax
+-; AVX1-NEXT: andl $15, %eax
+-; AVX1-NEXT: vpinsrw $6, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX1-NEXT: vpextrw $7, %xmm2, %eax
+-; AVX1-NEXT: andl $15, %eax
+-; AVX1-NEXT: vpinsrw $7, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX1-NEXT: vmovd %xmm1, %eax
+-; AVX1-NEXT: andl $15, %eax
+-; AVX1-NEXT: movzwl (%rsp,%rax,2), %eax
+-; AVX1-NEXT: vmovd %eax, %xmm2
+-; AVX1-NEXT: vpextrw $1, %xmm1, %eax
+-; AVX1-NEXT: andl $15, %eax
+-; AVX1-NEXT: vpinsrw $1, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX1-NEXT: vpextrw $2, %xmm1, %eax
+-; AVX1-NEXT: andl $15, %eax
+-; AVX1-NEXT: vpinsrw $2, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX1-NEXT: vpextrw $3, %xmm1, %eax
+-; AVX1-NEXT: andl $15, %eax
+-; AVX1-NEXT: vpinsrw $3, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX1-NEXT: vpextrw $4, %xmm1, %eax
+-; AVX1-NEXT: andl $15, %eax
+-; AVX1-NEXT: vpinsrw $4, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX1-NEXT: vpextrw $5, %xmm1, %eax
+-; AVX1-NEXT: andl $15, %eax
+-; AVX1-NEXT: vpinsrw $5, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX1-NEXT: vpextrw $6, %xmm1, %eax
+-; AVX1-NEXT: andl $15, %eax
+-; AVX1-NEXT: vpinsrw $6, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX1-NEXT: vpextrw $7, %xmm1, %eax
+-; AVX1-NEXT: andl $15, %eax
+-; AVX1-NEXT: vpinsrw $7, (%rsp,%rax,2), %xmm2, %xmm1
+-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+-; AVX1-NEXT: movq %rbp, %rsp
+-; AVX1-NEXT: popq %rbp
+-; AVX1-NEXT: retq
+-;
+-; AVX2-LABEL: var_shuffle_v16i16:
+-; AVX2: # %bb.0:
+-; AVX2-NEXT: pushq %rbp
+-; AVX2-NEXT: movq %rsp, %rbp
+-; AVX2-NEXT: andq $-32, %rsp
+-; AVX2-NEXT: subq $64, %rsp
+-; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2
+-; AVX2-NEXT: vmovd %xmm2, %eax
+-; AVX2-NEXT: vmovaps %ymm0, (%rsp)
+-; AVX2-NEXT: andl $15, %eax
+-; AVX2-NEXT: movzwl (%rsp,%rax,2), %eax
+-; AVX2-NEXT: vmovd %eax, %xmm0
+-; AVX2-NEXT: vpextrw $1, %xmm2, %eax
+-; AVX2-NEXT: andl $15, %eax
+-; AVX2-NEXT: vpinsrw $1, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX2-NEXT: vpextrw $2, %xmm2, %eax
+-; AVX2-NEXT: andl $15, %eax
+-; AVX2-NEXT: vpinsrw $2, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX2-NEXT: vpextrw $3, %xmm2, %eax
+-; AVX2-NEXT: andl $15, %eax
+-; AVX2-NEXT: vpinsrw $3, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX2-NEXT: vpextrw $4, %xmm2, %eax
+-; AVX2-NEXT: andl $15, %eax
+-; AVX2-NEXT: vpinsrw $4, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX2-NEXT: vpextrw $5, %xmm2, %eax
+-; AVX2-NEXT: andl $15, %eax
+-; AVX2-NEXT: vpinsrw $5, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX2-NEXT: vpextrw $6, %xmm2, %eax
+-; AVX2-NEXT: andl $15, %eax
+-; AVX2-NEXT: vpinsrw $6, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX2-NEXT: vpextrw $7, %xmm2, %eax
+-; AVX2-NEXT: andl $15, %eax
+-; AVX2-NEXT: vpinsrw $7, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX2-NEXT: vmovd %xmm1, %eax
+-; AVX2-NEXT: andl $15, %eax
+-; AVX2-NEXT: movzwl (%rsp,%rax,2), %eax
+-; AVX2-NEXT: vmovd %eax, %xmm2
+-; AVX2-NEXT: vpextrw $1, %xmm1, %eax
+-; AVX2-NEXT: andl $15, %eax
+-; AVX2-NEXT: vpinsrw $1, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX2-NEXT: vpextrw $2, %xmm1, %eax
+-; AVX2-NEXT: andl $15, %eax
+-; AVX2-NEXT: vpinsrw $2, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX2-NEXT: vpextrw $3, %xmm1, %eax
+-; AVX2-NEXT: andl $15, %eax
+-; AVX2-NEXT: vpinsrw $3, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX2-NEXT: vpextrw $4, %xmm1, %eax
+-; AVX2-NEXT: andl $15, %eax
+-; AVX2-NEXT: vpinsrw $4, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX2-NEXT: vpextrw $5, %xmm1, %eax
+-; AVX2-NEXT: andl $15, %eax
+-; AVX2-NEXT: vpinsrw $5, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX2-NEXT: vpextrw $6, %xmm1, %eax
+-; AVX2-NEXT: andl $15, %eax
+-; AVX2-NEXT: vpinsrw $6, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX2-NEXT: vpextrw $7, %xmm1, %eax
+-; AVX2-NEXT: andl $15, %eax
+-; AVX2-NEXT: vpinsrw $7, (%rsp,%rax,2), %xmm2, %xmm1
+-; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
+-; AVX2-NEXT: movq %rbp, %rsp
+-; AVX2-NEXT: popq %rbp
+-; AVX2-NEXT: retq
+-;
+-; AVX512F-LABEL: var_shuffle_v16i16:
+-; AVX512F: # %bb.0:
+-; AVX512F-NEXT: pushq %rbp
+-; AVX512F-NEXT: movq %rsp, %rbp
+-; AVX512F-NEXT: andq $-32, %rsp
+-; AVX512F-NEXT: subq $64, %rsp
+-; AVX512F-NEXT: vextracti128 $1, %ymm1, %xmm2
+-; AVX512F-NEXT: vmovd %xmm2, %eax
+-; AVX512F-NEXT: vmovaps %ymm0, (%rsp)
+-; AVX512F-NEXT: andl $15, %eax
+-; AVX512F-NEXT: movzwl (%rsp,%rax,2), %eax
+-; AVX512F-NEXT: vmovd %eax, %xmm0
+-; AVX512F-NEXT: vpextrw $1, %xmm2, %eax
+-; AVX512F-NEXT: andl $15, %eax
+-; AVX512F-NEXT: vpinsrw $1, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX512F-NEXT: vpextrw $2, %xmm2, %eax
+-; AVX512F-NEXT: andl $15, %eax
+-; AVX512F-NEXT: vpinsrw $2, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX512F-NEXT: vpextrw $3, %xmm2, %eax
+-; AVX512F-NEXT: andl $15, %eax
+-; AVX512F-NEXT: vpinsrw $3, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX512F-NEXT: vpextrw $4, %xmm2, %eax
+-; AVX512F-NEXT: andl $15, %eax
+-; AVX512F-NEXT: vpinsrw $4, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX512F-NEXT: vpextrw $5, %xmm2, %eax
+-; AVX512F-NEXT: andl $15, %eax
+-; AVX512F-NEXT: vpinsrw $5, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX512F-NEXT: vpextrw $6, %xmm2, %eax
+-; AVX512F-NEXT: andl $15, %eax
+-; AVX512F-NEXT: vpinsrw $6, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX512F-NEXT: vpextrw $7, %xmm2, %eax
+-; AVX512F-NEXT: andl $15, %eax
+-; AVX512F-NEXT: vpinsrw $7, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX512F-NEXT: vmovd %xmm1, %eax
+-; AVX512F-NEXT: andl $15, %eax
+-; AVX512F-NEXT: movzwl (%rsp,%rax,2), %eax
+-; AVX512F-NEXT: vmovd %eax, %xmm2
+-; AVX512F-NEXT: vpextrw $1, %xmm1, %eax
+-; AVX512F-NEXT: andl $15, %eax
+-; AVX512F-NEXT: vpinsrw $1, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX512F-NEXT: vpextrw $2, %xmm1, %eax
+-; AVX512F-NEXT: andl $15, %eax
+-; AVX512F-NEXT: vpinsrw $2, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX512F-NEXT: vpextrw $3, %xmm1, %eax
+-; AVX512F-NEXT: andl $15, %eax
+-; AVX512F-NEXT: vpinsrw $3, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX512F-NEXT: vpextrw $4, %xmm1, %eax
+-; AVX512F-NEXT: andl $15, %eax
+-; AVX512F-NEXT: vpinsrw $4, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX512F-NEXT: vpextrw $5, %xmm1, %eax
+-; AVX512F-NEXT: andl $15, %eax
+-; AVX512F-NEXT: vpinsrw $5, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX512F-NEXT: vpextrw $6, %xmm1, %eax
+-; AVX512F-NEXT: andl $15, %eax
+-; AVX512F-NEXT: vpinsrw $6, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX512F-NEXT: vpextrw $7, %xmm1, %eax
+-; AVX512F-NEXT: andl $15, %eax
+-; AVX512F-NEXT: vpinsrw $7, (%rsp,%rax,2), %xmm2, %xmm1
+-; AVX512F-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
+-; AVX512F-NEXT: movq %rbp, %rsp
+-; AVX512F-NEXT: popq %rbp
+-; AVX512F-NEXT: retq
+-;
+-; AVX512VL-LABEL: var_shuffle_v16i16:
+-; AVX512VL: # %bb.0:
+-; AVX512VL-NEXT: pushq %rbp
+-; AVX512VL-NEXT: movq %rsp, %rbp
+-; AVX512VL-NEXT: andq $-32, %rsp
+-; AVX512VL-NEXT: subq $64, %rsp
+-; AVX512VL-NEXT: vextracti128 $1, %ymm1, %xmm2
+-; AVX512VL-NEXT: vmovd %xmm2, %eax
+-; AVX512VL-NEXT: vmovaps %ymm0, (%rsp)
+-; AVX512VL-NEXT: andl $15, %eax
+-; AVX512VL-NEXT: movzwl (%rsp,%rax,2), %eax
+-; AVX512VL-NEXT: vmovd %eax, %xmm0
+-; AVX512VL-NEXT: vpextrw $1, %xmm2, %eax
+-; AVX512VL-NEXT: andl $15, %eax
+-; AVX512VL-NEXT: vpinsrw $1, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX512VL-NEXT: vpextrw $2, %xmm2, %eax
+-; AVX512VL-NEXT: andl $15, %eax
+-; AVX512VL-NEXT: vpinsrw $2, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX512VL-NEXT: vpextrw $3, %xmm2, %eax
+-; AVX512VL-NEXT: andl $15, %eax
+-; AVX512VL-NEXT: vpinsrw $3, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX512VL-NEXT: vpextrw $4, %xmm2, %eax
+-; AVX512VL-NEXT: andl $15, %eax
+-; AVX512VL-NEXT: vpinsrw $4, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX512VL-NEXT: vpextrw $5, %xmm2, %eax
+-; AVX512VL-NEXT: andl $15, %eax
+-; AVX512VL-NEXT: vpinsrw $5, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX512VL-NEXT: vpextrw $6, %xmm2, %eax
+-; AVX512VL-NEXT: andl $15, %eax
+-; AVX512VL-NEXT: vpinsrw $6, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX512VL-NEXT: vpextrw $7, %xmm2, %eax
+-; AVX512VL-NEXT: andl $15, %eax
+-; AVX512VL-NEXT: vpinsrw $7, (%rsp,%rax,2), %xmm0, %xmm0
+-; AVX512VL-NEXT: vmovd %xmm1, %eax
+-; AVX512VL-NEXT: andl $15, %eax
+-; AVX512VL-NEXT: movzwl (%rsp,%rax,2), %eax
+-; AVX512VL-NEXT: vmovd %eax, %xmm2
+-; AVX512VL-NEXT: vpextrw $1, %xmm1, %eax
+-; AVX512VL-NEXT: andl $15, %eax
+-; AVX512VL-NEXT: vpinsrw $1, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX512VL-NEXT: vpextrw $2, %xmm1, %eax
+-; AVX512VL-NEXT: andl $15, %eax
+-; AVX512VL-NEXT: vpinsrw $2, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX512VL-NEXT: vpextrw $3, %xmm1, %eax
+-; AVX512VL-NEXT: andl $15, %eax
+-; AVX512VL-NEXT: vpinsrw $3, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX512VL-NEXT: vpextrw $4, %xmm1, %eax
+-; AVX512VL-NEXT: andl $15, %eax
+-; AVX512VL-NEXT: vpinsrw $4, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX512VL-NEXT: vpextrw $5, %xmm1, %eax
+-; AVX512VL-NEXT: andl $15, %eax
+-; AVX512VL-NEXT: vpinsrw $5, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX512VL-NEXT: vpextrw $6, %xmm1, %eax
+-; AVX512VL-NEXT: andl $15, %eax
+-; AVX512VL-NEXT: vpinsrw $6, (%rsp,%rax,2), %xmm2, %xmm2
+-; AVX512VL-NEXT: vpextrw $7, %xmm1, %eax
+-; AVX512VL-NEXT: andl $15, %eax
+-; AVX512VL-NEXT: vpinsrw $7, (%rsp,%rax,2), %xmm2, %xmm1
+-; AVX512VL-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
+-; AVX512VL-NEXT: movq %rbp, %rsp
+-; AVX512VL-NEXT: popq %rbp
+-; AVX512VL-NEXT: retq
+-;
+-; AVX512VLBW-LABEL: var_shuffle_v16i16:
+-; AVX512VLBW: # %bb.0:
+-; AVX512VLBW-NEXT: vpermw %ymm0, %ymm1, %ymm0
+-; AVX512VLBW-NEXT: retq
+- %index0 = extractelement <16 x i16> %indices, i32 0
+- %index1 = extractelement <16 x i16> %indices, i32 1
+- %index2 = extractelement <16 x i16> %indices, i32 2
+- %index3 = extractelement <16 x i16> %indices, i32 3
+- %index4 = extractelement <16 x i16> %indices, i32 4
+- %index5 = extractelement <16 x i16> %indices, i32 5
+- %index6 = extractelement <16 x i16> %indices, i32 6
+- %index7 = extractelement <16 x i16> %indices, i32 7
+- %index8 = extractelement <16 x i16> %indices, i32 8
+- %index9 = extractelement <16 x i16> %indices, i32 9
+- %index10 = extractelement <16 x i16> %indices, i32 10
+- %index11 = extractelement <16 x i16> %indices, i32 11
+- %index12 = extractelement <16 x i16> %indices, i32 12
+- %index13 = extractelement <16 x i16> %indices, i32 13
+- %index14 = extractelement <16 x i16> %indices, i32 14
+- %index15 = extractelement <16 x i16> %indices, i32 15
+- %v0 = extractelement <16 x i16> %v, i16 %index0
+- %v1 = extractelement <16 x i16> %v, i16 %index1
+- %v2 = extractelement <16 x i16> %v, i16 %index2
+- %v3 = extractelement <16 x i16> %v, i16 %index3
+- %v4 = extractelement <16 x i16> %v, i16 %index4
+- %v5 = extractelement <16 x i16> %v, i16 %index5
+- %v6 = extractelement <16 x i16> %v, i16 %index6
+- %v7 = extractelement <16 x i16> %v, i16 %index7
+- %v8 = extractelement <16 x i16> %v, i16 %index8
+- %v9 = extractelement <16 x i16> %v, i16 %index9
+- %v10 = extractelement <16 x i16> %v, i16 %index10
+- %v11 = extractelement <16 x i16> %v, i16 %index11
+- %v12 = extractelement <16 x i16> %v, i16 %index12
+- %v13 = extractelement <16 x i16> %v, i16 %index13
+- %v14 = extractelement <16 x i16> %v, i16 %index14
+- %v15 = extractelement <16 x i16> %v, i16 %index15
+- %ret0 = insertelement <16 x i16> undef, i16 %v0, i32 0
+- %ret1 = insertelement <16 x i16> %ret0, i16 %v1, i32 1
+- %ret2 = insertelement <16 x i16> %ret1, i16 %v2, i32 2
+- %ret3 = insertelement <16 x i16> %ret2, i16 %v3, i32 3
+- %ret4 = insertelement <16 x i16> %ret3, i16 %v4, i32 4
+- %ret5 = insertelement <16 x i16> %ret4, i16 %v5, i32 5
+- %ret6 = insertelement <16 x i16> %ret5, i16 %v6, i32 6
+- %ret7 = insertelement <16 x i16> %ret6, i16 %v7, i32 7
+- %ret8 = insertelement <16 x i16> %ret7, i16 %v8, i32 8
+- %ret9 = insertelement <16 x i16> %ret8, i16 %v9, i32 9
+- %ret10 = insertelement <16 x i16> %ret9, i16 %v10, i32 10
+- %ret11 = insertelement <16 x i16> %ret10, i16 %v11, i32 11
+- %ret12 = insertelement <16 x i16> %ret11, i16 %v12, i32 12
+- %ret13 = insertelement <16 x i16> %ret12, i16 %v13, i32 13
+- %ret14 = insertelement <16 x i16> %ret13, i16 %v14, i32 14
+- %ret15 = insertelement <16 x i16> %ret14, i16 %v15, i32 15
+- ret <16 x i16> %ret15
+-}
+-
+-define <32 x i8> @var_shuffle_v32i8(<32 x i8> %v, <32 x i8> %indices) nounwind {
+-; AVX1-LABEL: var_shuffle_v32i8:
+-; AVX1: # %bb.0:
+-; AVX1-NEXT: pushq %rbp
+-; AVX1-NEXT: movq %rsp, %rbp
+-; AVX1-NEXT: andq $-32, %rsp
+-; AVX1-NEXT: subq $64, %rsp
+-; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
+-; AVX1-NEXT: vpextrb $0, %xmm2, %eax
+-; AVX1-NEXT: vmovaps %ymm0, (%rsp)
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX1-NEXT: vmovd %eax, %xmm0
+-; AVX1-NEXT: vpextrb $1, %xmm2, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX1-NEXT: vpinsrb $1, %eax, %xmm0, %xmm0
+-; AVX1-NEXT: vpextrb $2, %xmm2, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX1-NEXT: vpinsrb $2, %eax, %xmm0, %xmm0
+-; AVX1-NEXT: vpextrb $3, %xmm2, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX1-NEXT: vpinsrb $3, %eax, %xmm0, %xmm0
+-; AVX1-NEXT: vpextrb $4, %xmm2, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX1-NEXT: vpinsrb $4, %eax, %xmm0, %xmm0
+-; AVX1-NEXT: vpextrb $5, %xmm2, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX1-NEXT: vpinsrb $5, %eax, %xmm0, %xmm0
+-; AVX1-NEXT: vpextrb $6, %xmm2, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX1-NEXT: vpinsrb $6, %eax, %xmm0, %xmm0
+-; AVX1-NEXT: vpextrb $7, %xmm2, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX1-NEXT: vpinsrb $7, %eax, %xmm0, %xmm0
+-; AVX1-NEXT: vpextrb $8, %xmm2, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX1-NEXT: vpinsrb $8, %eax, %xmm0, %xmm0
+-; AVX1-NEXT: vpextrb $9, %xmm2, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX1-NEXT: vpinsrb $9, %eax, %xmm0, %xmm0
+-; AVX1-NEXT: vpextrb $10, %xmm2, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX1-NEXT: vpinsrb $10, %eax, %xmm0, %xmm0
+-; AVX1-NEXT: vpextrb $11, %xmm2, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX1-NEXT: vpinsrb $11, %eax, %xmm0, %xmm0
+-; AVX1-NEXT: vpextrb $12, %xmm2, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX1-NEXT: vpinsrb $12, %eax, %xmm0, %xmm0
+-; AVX1-NEXT: vpextrb $13, %xmm2, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX1-NEXT: vpinsrb $13, %eax, %xmm0, %xmm0
+-; AVX1-NEXT: vpextrb $14, %xmm2, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX1-NEXT: vpinsrb $14, %eax, %xmm0, %xmm0
+-; AVX1-NEXT: vpextrb $15, %xmm2, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX1-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
+-; AVX1-NEXT: vpextrb $0, %xmm1, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX1-NEXT: vmovd %eax, %xmm2
+-; AVX1-NEXT: vpextrb $1, %xmm1, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: vpinsrb $1, (%rsp,%rax), %xmm2, %xmm2
+-; AVX1-NEXT: vpextrb $2, %xmm1, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: vpinsrb $2, (%rsp,%rax), %xmm2, %xmm2
+-; AVX1-NEXT: vpextrb $3, %xmm1, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: vpinsrb $3, (%rsp,%rax), %xmm2, %xmm2
+-; AVX1-NEXT: vpextrb $4, %xmm1, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: vpinsrb $4, (%rsp,%rax), %xmm2, %xmm2
+-; AVX1-NEXT: vpextrb $5, %xmm1, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: vpinsrb $5, (%rsp,%rax), %xmm2, %xmm2
+-; AVX1-NEXT: vpextrb $6, %xmm1, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: vpinsrb $6, (%rsp,%rax), %xmm2, %xmm2
+-; AVX1-NEXT: vpextrb $7, %xmm1, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: vpinsrb $7, (%rsp,%rax), %xmm2, %xmm2
+-; AVX1-NEXT: vpextrb $8, %xmm1, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: vpinsrb $8, (%rsp,%rax), %xmm2, %xmm2
+-; AVX1-NEXT: vpextrb $9, %xmm1, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: vpinsrb $9, (%rsp,%rax), %xmm2, %xmm2
+-; AVX1-NEXT: vpextrb $10, %xmm1, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: vpinsrb $10, (%rsp,%rax), %xmm2, %xmm2
+-; AVX1-NEXT: vpextrb $11, %xmm1, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: vpinsrb $11, (%rsp,%rax), %xmm2, %xmm2
+-; AVX1-NEXT: vpextrb $12, %xmm1, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: vpinsrb $12, (%rsp,%rax), %xmm2, %xmm2
+-; AVX1-NEXT: vpextrb $13, %xmm1, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: vpinsrb $13, (%rsp,%rax), %xmm2, %xmm2
+-; AVX1-NEXT: vpextrb $14, %xmm1, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: vpinsrb $14, (%rsp,%rax), %xmm2, %xmm2
+-; AVX1-NEXT: vpextrb $15, %xmm1, %eax
+-; AVX1-NEXT: andl $31, %eax
+-; AVX1-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX1-NEXT: vpinsrb $15, %eax, %xmm2, %xmm1
+-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+-; AVX1-NEXT: movq %rbp, %rsp
+-; AVX1-NEXT: popq %rbp
+-; AVX1-NEXT: retq
+-;
+-; AVX2-LABEL: var_shuffle_v32i8:
+-; AVX2: # %bb.0:
+-; AVX2-NEXT: pushq %rbp
+-; AVX2-NEXT: movq %rsp, %rbp
+-; AVX2-NEXT: andq $-32, %rsp
+-; AVX2-NEXT: subq $64, %rsp
+-; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2
+-; AVX2-NEXT: vpextrb $0, %xmm2, %eax
+-; AVX2-NEXT: vmovaps %ymm0, (%rsp)
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX2-NEXT: vmovd %eax, %xmm0
+-; AVX2-NEXT: vpextrb $1, %xmm2, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX2-NEXT: vpinsrb $1, %eax, %xmm0, %xmm0
+-; AVX2-NEXT: vpextrb $2, %xmm2, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX2-NEXT: vpinsrb $2, %eax, %xmm0, %xmm0
+-; AVX2-NEXT: vpextrb $3, %xmm2, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX2-NEXT: vpinsrb $3, %eax, %xmm0, %xmm0
+-; AVX2-NEXT: vpextrb $4, %xmm2, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX2-NEXT: vpinsrb $4, %eax, %xmm0, %xmm0
+-; AVX2-NEXT: vpextrb $5, %xmm2, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX2-NEXT: vpinsrb $5, %eax, %xmm0, %xmm0
+-; AVX2-NEXT: vpextrb $6, %xmm2, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX2-NEXT: vpinsrb $6, %eax, %xmm0, %xmm0
+-; AVX2-NEXT: vpextrb $7, %xmm2, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX2-NEXT: vpinsrb $7, %eax, %xmm0, %xmm0
+-; AVX2-NEXT: vpextrb $8, %xmm2, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX2-NEXT: vpinsrb $8, %eax, %xmm0, %xmm0
+-; AVX2-NEXT: vpextrb $9, %xmm2, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX2-NEXT: vpinsrb $9, %eax, %xmm0, %xmm0
+-; AVX2-NEXT: vpextrb $10, %xmm2, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX2-NEXT: vpinsrb $10, %eax, %xmm0, %xmm0
+-; AVX2-NEXT: vpextrb $11, %xmm2, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX2-NEXT: vpinsrb $11, %eax, %xmm0, %xmm0
+-; AVX2-NEXT: vpextrb $12, %xmm2, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX2-NEXT: vpinsrb $12, %eax, %xmm0, %xmm0
+-; AVX2-NEXT: vpextrb $13, %xmm2, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX2-NEXT: vpinsrb $13, %eax, %xmm0, %xmm0
+-; AVX2-NEXT: vpextrb $14, %xmm2, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX2-NEXT: vpinsrb $14, %eax, %xmm0, %xmm0
+-; AVX2-NEXT: vpextrb $15, %xmm2, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX2-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
+-; AVX2-NEXT: vpextrb $0, %xmm1, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX2-NEXT: vmovd %eax, %xmm2
+-; AVX2-NEXT: vpextrb $1, %xmm1, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: vpinsrb $1, (%rsp,%rax), %xmm2, %xmm2
+-; AVX2-NEXT: vpextrb $2, %xmm1, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: vpinsrb $2, (%rsp,%rax), %xmm2, %xmm2
+-; AVX2-NEXT: vpextrb $3, %xmm1, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: vpinsrb $3, (%rsp,%rax), %xmm2, %xmm2
+-; AVX2-NEXT: vpextrb $4, %xmm1, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: vpinsrb $4, (%rsp,%rax), %xmm2, %xmm2
+-; AVX2-NEXT: vpextrb $5, %xmm1, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: vpinsrb $5, (%rsp,%rax), %xmm2, %xmm2
+-; AVX2-NEXT: vpextrb $6, %xmm1, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: vpinsrb $6, (%rsp,%rax), %xmm2, %xmm2
+-; AVX2-NEXT: vpextrb $7, %xmm1, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: vpinsrb $7, (%rsp,%rax), %xmm2, %xmm2
+-; AVX2-NEXT: vpextrb $8, %xmm1, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: vpinsrb $8, (%rsp,%rax), %xmm2, %xmm2
+-; AVX2-NEXT: vpextrb $9, %xmm1, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: vpinsrb $9, (%rsp,%rax), %xmm2, %xmm2
+-; AVX2-NEXT: vpextrb $10, %xmm1, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: vpinsrb $10, (%rsp,%rax), %xmm2, %xmm2
+-; AVX2-NEXT: vpextrb $11, %xmm1, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: vpinsrb $11, (%rsp,%rax), %xmm2, %xmm2
+-; AVX2-NEXT: vpextrb $12, %xmm1, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: vpinsrb $12, (%rsp,%rax), %xmm2, %xmm2
+-; AVX2-NEXT: vpextrb $13, %xmm1, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: vpinsrb $13, (%rsp,%rax), %xmm2, %xmm2
+-; AVX2-NEXT: vpextrb $14, %xmm1, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: vpinsrb $14, (%rsp,%rax), %xmm2, %xmm2
+-; AVX2-NEXT: vpextrb $15, %xmm1, %eax
+-; AVX2-NEXT: andl $31, %eax
+-; AVX2-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX2-NEXT: vpinsrb $15, %eax, %xmm2, %xmm1
+-; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
+-; AVX2-NEXT: movq %rbp, %rsp
+-; AVX2-NEXT: popq %rbp
+-; AVX2-NEXT: retq
+-;
+-; AVX512F-LABEL: var_shuffle_v32i8:
+-; AVX512F: # %bb.0:
+-; AVX512F-NEXT: pushq %rbp
+-; AVX512F-NEXT: movq %rsp, %rbp
+-; AVX512F-NEXT: andq $-32, %rsp
+-; AVX512F-NEXT: subq $64, %rsp
+-; AVX512F-NEXT: vextracti128 $1, %ymm1, %xmm2
+-; AVX512F-NEXT: vpextrb $0, %xmm2, %eax
+-; AVX512F-NEXT: vmovaps %ymm0, (%rsp)
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512F-NEXT: vmovd %eax, %xmm0
+-; AVX512F-NEXT: vpextrb $1, %xmm2, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512F-NEXT: vpinsrb $1, %eax, %xmm0, %xmm0
+-; AVX512F-NEXT: vpextrb $2, %xmm2, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512F-NEXT: vpinsrb $2, %eax, %xmm0, %xmm0
+-; AVX512F-NEXT: vpextrb $3, %xmm2, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512F-NEXT: vpinsrb $3, %eax, %xmm0, %xmm0
+-; AVX512F-NEXT: vpextrb $4, %xmm2, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512F-NEXT: vpinsrb $4, %eax, %xmm0, %xmm0
+-; AVX512F-NEXT: vpextrb $5, %xmm2, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512F-NEXT: vpinsrb $5, %eax, %xmm0, %xmm0
+-; AVX512F-NEXT: vpextrb $6, %xmm2, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512F-NEXT: vpinsrb $6, %eax, %xmm0, %xmm0
+-; AVX512F-NEXT: vpextrb $7, %xmm2, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512F-NEXT: vpinsrb $7, %eax, %xmm0, %xmm0
+-; AVX512F-NEXT: vpextrb $8, %xmm2, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512F-NEXT: vpinsrb $8, %eax, %xmm0, %xmm0
+-; AVX512F-NEXT: vpextrb $9, %xmm2, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512F-NEXT: vpinsrb $9, %eax, %xmm0, %xmm0
+-; AVX512F-NEXT: vpextrb $10, %xmm2, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512F-NEXT: vpinsrb $10, %eax, %xmm0, %xmm0
+-; AVX512F-NEXT: vpextrb $11, %xmm2, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512F-NEXT: vpinsrb $11, %eax, %xmm0, %xmm0
+-; AVX512F-NEXT: vpextrb $12, %xmm2, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512F-NEXT: vpinsrb $12, %eax, %xmm0, %xmm0
+-; AVX512F-NEXT: vpextrb $13, %xmm2, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512F-NEXT: vpinsrb $13, %eax, %xmm0, %xmm0
+-; AVX512F-NEXT: vpextrb $14, %xmm2, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512F-NEXT: vpinsrb $14, %eax, %xmm0, %xmm0
+-; AVX512F-NEXT: vpextrb $15, %xmm2, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512F-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
+-; AVX512F-NEXT: vpextrb $0, %xmm1, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512F-NEXT: vmovd %eax, %xmm2
+-; AVX512F-NEXT: vpextrb $1, %xmm1, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: vpinsrb $1, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512F-NEXT: vpextrb $2, %xmm1, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: vpinsrb $2, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512F-NEXT: vpextrb $3, %xmm1, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: vpinsrb $3, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512F-NEXT: vpextrb $4, %xmm1, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: vpinsrb $4, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512F-NEXT: vpextrb $5, %xmm1, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: vpinsrb $5, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512F-NEXT: vpextrb $6, %xmm1, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: vpinsrb $6, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512F-NEXT: vpextrb $7, %xmm1, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: vpinsrb $7, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512F-NEXT: vpextrb $8, %xmm1, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: vpinsrb $8, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512F-NEXT: vpextrb $9, %xmm1, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: vpinsrb $9, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512F-NEXT: vpextrb $10, %xmm1, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: vpinsrb $10, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512F-NEXT: vpextrb $11, %xmm1, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: vpinsrb $11, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512F-NEXT: vpextrb $12, %xmm1, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: vpinsrb $12, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512F-NEXT: vpextrb $13, %xmm1, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: vpinsrb $13, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512F-NEXT: vpextrb $14, %xmm1, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: vpinsrb $14, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512F-NEXT: vpextrb $15, %xmm1, %eax
+-; AVX512F-NEXT: andl $31, %eax
+-; AVX512F-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512F-NEXT: vpinsrb $15, %eax, %xmm2, %xmm1
+-; AVX512F-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
+-; AVX512F-NEXT: movq %rbp, %rsp
+-; AVX512F-NEXT: popq %rbp
+-; AVX512F-NEXT: retq
+-;
+-; AVX512VL-LABEL: var_shuffle_v32i8:
+-; AVX512VL: # %bb.0:
+-; AVX512VL-NEXT: pushq %rbp
+-; AVX512VL-NEXT: movq %rsp, %rbp
+-; AVX512VL-NEXT: andq $-32, %rsp
+-; AVX512VL-NEXT: subq $64, %rsp
+-; AVX512VL-NEXT: vextracti128 $1, %ymm1, %xmm2
+-; AVX512VL-NEXT: vpextrb $0, %xmm2, %eax
+-; AVX512VL-NEXT: vmovaps %ymm0, (%rsp)
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512VL-NEXT: vmovd %eax, %xmm0
+-; AVX512VL-NEXT: vpextrb $1, %xmm2, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512VL-NEXT: vpinsrb $1, %eax, %xmm0, %xmm0
+-; AVX512VL-NEXT: vpextrb $2, %xmm2, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512VL-NEXT: vpinsrb $2, %eax, %xmm0, %xmm0
+-; AVX512VL-NEXT: vpextrb $3, %xmm2, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512VL-NEXT: vpinsrb $3, %eax, %xmm0, %xmm0
+-; AVX512VL-NEXT: vpextrb $4, %xmm2, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512VL-NEXT: vpinsrb $4, %eax, %xmm0, %xmm0
+-; AVX512VL-NEXT: vpextrb $5, %xmm2, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512VL-NEXT: vpinsrb $5, %eax, %xmm0, %xmm0
+-; AVX512VL-NEXT: vpextrb $6, %xmm2, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512VL-NEXT: vpinsrb $6, %eax, %xmm0, %xmm0
+-; AVX512VL-NEXT: vpextrb $7, %xmm2, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512VL-NEXT: vpinsrb $7, %eax, %xmm0, %xmm0
+-; AVX512VL-NEXT: vpextrb $8, %xmm2, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512VL-NEXT: vpinsrb $8, %eax, %xmm0, %xmm0
+-; AVX512VL-NEXT: vpextrb $9, %xmm2, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512VL-NEXT: vpinsrb $9, %eax, %xmm0, %xmm0
+-; AVX512VL-NEXT: vpextrb $10, %xmm2, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512VL-NEXT: vpinsrb $10, %eax, %xmm0, %xmm0
+-; AVX512VL-NEXT: vpextrb $11, %xmm2, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512VL-NEXT: vpinsrb $11, %eax, %xmm0, %xmm0
+-; AVX512VL-NEXT: vpextrb $12, %xmm2, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512VL-NEXT: vpinsrb $12, %eax, %xmm0, %xmm0
+-; AVX512VL-NEXT: vpextrb $13, %xmm2, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512VL-NEXT: vpinsrb $13, %eax, %xmm0, %xmm0
+-; AVX512VL-NEXT: vpextrb $14, %xmm2, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512VL-NEXT: vpinsrb $14, %eax, %xmm0, %xmm0
+-; AVX512VL-NEXT: vpextrb $15, %xmm2, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512VL-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
+-; AVX512VL-NEXT: vpextrb $0, %xmm1, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512VL-NEXT: vmovd %eax, %xmm2
+-; AVX512VL-NEXT: vpextrb $1, %xmm1, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: vpinsrb $1, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512VL-NEXT: vpextrb $2, %xmm1, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: vpinsrb $2, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512VL-NEXT: vpextrb $3, %xmm1, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: vpinsrb $3, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512VL-NEXT: vpextrb $4, %xmm1, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: vpinsrb $4, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512VL-NEXT: vpextrb $5, %xmm1, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: vpinsrb $5, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512VL-NEXT: vpextrb $6, %xmm1, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: vpinsrb $6, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512VL-NEXT: vpextrb $7, %xmm1, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: vpinsrb $7, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512VL-NEXT: vpextrb $8, %xmm1, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: vpinsrb $8, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512VL-NEXT: vpextrb $9, %xmm1, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: vpinsrb $9, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512VL-NEXT: vpextrb $10, %xmm1, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: vpinsrb $10, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512VL-NEXT: vpextrb $11, %xmm1, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: vpinsrb $11, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512VL-NEXT: vpextrb $12, %xmm1, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: vpinsrb $12, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512VL-NEXT: vpextrb $13, %xmm1, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: vpinsrb $13, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512VL-NEXT: vpextrb $14, %xmm1, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: vpinsrb $14, (%rsp,%rax), %xmm2, %xmm2
+-; AVX512VL-NEXT: vpextrb $15, %xmm1, %eax
+-; AVX512VL-NEXT: andl $31, %eax
+-; AVX512VL-NEXT: movzbl (%rsp,%rax), %eax
+-; AVX512VL-NEXT: vpinsrb $15, %eax, %xmm2, %xmm1
+-; AVX512VL-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
+-; AVX512VL-NEXT: movq %rbp, %rsp
+-; AVX512VL-NEXT: popq %rbp
+-; AVX512VL-NEXT: retq
+-;
+-; VBMI-LABEL: var_shuffle_v32i8:
+-; VBMI: # %bb.0:
+-; VBMI-NEXT: vpermb %ymm0, %ymm1, %ymm0
+-; VBMI-NEXT: retq
+- %index0 = extractelement <32 x i8> %indices, i32 0
+- %index1 = extractelement <32 x i8> %indices, i32 1
+- %index2 = extractelement <32 x i8> %indices, i32 2
+- %index3 = extractelement <32 x i8> %indices, i32 3
+- %index4 = extractelement <32 x i8> %indices, i32 4
+- %index5 = extractelement <32 x i8> %indices, i32 5
+- %index6 = extractelement <32 x i8> %indices, i32 6
+- %index7 = extractelement <32 x i8> %indices, i32 7
+- %index8 = extractelement <32 x i8> %indices, i32 8
+- %index9 = extractelement <32 x i8> %indices, i32 9
+- %index10 = extractelement <32 x i8> %indices, i32 10
+- %index11 = extractelement <32 x i8> %indices, i32 11
+- %index12 = extractelement <32 x i8> %indices, i32 12
+- %index13 = extractelement <32 x i8> %indices, i32 13
+- %index14 = extractelement <32 x i8> %indices, i32 14
+- %index15 = extractelement <32 x i8> %indices, i32 15
+- %index16 = extractelement <32 x i8> %indices, i32 16
+- %index17 = extractelement <32 x i8> %indices, i32 17
+- %index18 = extractelement <32 x i8> %indices, i32 18
+- %index19 = extractelement <32 x i8> %indices, i32 19
+- %index20 = extractelement <32 x i8> %indices, i32 20
+- %index21 = extractelement <32 x i8> %indices, i32 21
+- %index22 = extractelement <32 x i8> %indices, i32 22
+- %index23 = extractelement <32 x i8> %indices, i32 23
+- %index24 = extractelement <32 x i8> %indices, i32 24
+- %index25 = extractelement <32 x i8> %indices, i32 25
+- %index26 = extractelement <32 x i8> %indices, i32 26
+- %index27 = extractelement <32 x i8> %indices, i32 27
+- %index28 = extractelement <32 x i8> %indices, i32 28
+- %index29 = extractelement <32 x i8> %indices, i32 29
+- %index30 = extractelement <32 x i8> %indices, i32 30
+- %index31 = extractelement <32 x i8> %indices, i32 31
+- %v0 = extractelement <32 x i8> %v, i8 %index0
+- %v1 = extractelement <32 x i8> %v, i8 %index1
+- %v2 = extractelement <32 x i8> %v, i8 %index2
+- %v3 = extractelement <32 x i8> %v, i8 %index3
+- %v4 = extractelement <32 x i8> %v, i8 %index4
+- %v5 = extractelement <32 x i8> %v, i8 %index5
+- %v6 = extractelement <32 x i8> %v, i8 %index6
+- %v7 = extractelement <32 x i8> %v, i8 %index7
+- %v8 = extractelement <32 x i8> %v, i8 %index8
+- %v9 = extractelement <32 x i8> %v, i8 %index9
+- %v10 = extractelement <32 x i8> %v, i8 %index10
+- %v11 = extractelement <32 x i8> %v, i8 %index11
+- %v12 = extractelement <32 x i8> %v, i8 %index12
+- %v13 = extractelement <32 x i8> %v, i8 %index13
+- %v14 = extractelement <32 x i8> %v, i8 %index14
+- %v15 = extractelement <32 x i8> %v, i8 %index15
+- %v16 = extractelement <32 x i8> %v, i8 %index16
+- %v17 = extractelement <32 x i8> %v, i8 %index17
+- %v18 = extractelement <32 x i8> %v, i8 %index18
+- %v19 = extractelement <32 x i8> %v, i8 %index19
+- %v20 = extractelement <32 x i8> %v, i8 %index20
+- %v21 = extractelement <32 x i8> %v, i8 %index21
+- %v22 = extractelement <32 x i8> %v, i8 %index22
+- %v23 = extractelement <32 x i8> %v, i8 %index23
+- %v24 = extractelement <32 x i8> %v, i8 %index24
+- %v25 = extractelement <32 x i8> %v, i8 %index25
+- %v26 = extractelement <32 x i8> %v, i8 %index26
+- %v27 = extractelement <32 x i8> %v, i8 %index27
+- %v28 = extractelement <32 x i8> %v, i8 %index28
+- %v29 = extractelement <32 x i8> %v, i8 %index29
+- %v30 = extractelement <32 x i8> %v, i8 %index30
+- %v31 = extractelement <32 x i8> %v, i8 %index31
+- %ret0 = insertelement <32 x i8> undef, i8 %v0, i32 0
+- %ret1 = insertelement <32 x i8> %ret0, i8 %v1, i32 1
+- %ret2 = insertelement <32 x i8> %ret1, i8 %v2, i32 2
+- %ret3 = insertelement <32 x i8> %ret2, i8 %v3, i32 3
+- %ret4 = insertelement <32 x i8> %ret3, i8 %v4, i32 4
+- %ret5 = insertelement <32 x i8> %ret4, i8 %v5, i32 5
+- %ret6 = insertelement <32 x i8> %ret5, i8 %v6, i32 6
+- %ret7 = insertelement <32 x i8> %ret6, i8 %v7, i32 7
+- %ret8 = insertelement <32 x i8> %ret7, i8 %v8, i32 8
+- %ret9 = insertelement <32 x i8> %ret8, i8 %v9, i32 9
+- %ret10 = insertelement <32 x i8> %ret9, i8 %v10, i32 10
+- %ret11 = insertelement <32 x i8> %ret10, i8 %v11, i32 11
+- %ret12 = insertelement <32 x i8> %ret11, i8 %v12, i32 12
+- %ret13 = insertelement <32 x i8> %ret12, i8 %v13, i32 13
+- %ret14 = insertelement <32 x i8> %ret13, i8 %v14, i32 14
+- %ret15 = insertelement <32 x i8> %ret14, i8 %v15, i32 15
+- %ret16 = insertelement <32 x i8> %ret15, i8 %v16, i32 16
+- %ret17 = insertelement <32 x i8> %ret16, i8 %v17, i32 17
+- %ret18 = insertelement <32 x i8> %ret17, i8 %v18, i32 18
+- %ret19 = insertelement <32 x i8> %ret18, i8 %v19, i32 19
+- %ret20 = insertelement <32 x i8> %ret19, i8 %v20, i32 20
+- %ret21 = insertelement <32 x i8> %ret20, i8 %v21, i32 21
+- %ret22 = insertelement <32 x i8> %ret21, i8 %v22, i32 22
+- %ret23 = insertelement <32 x i8> %ret22, i8 %v23, i32 23
+- %ret24 = insertelement <32 x i8> %ret23, i8 %v24, i32 24
+- %ret25 = insertelement <32 x i8> %ret24, i8 %v25, i32 25
+- %ret26 = insertelement <32 x i8> %ret25, i8 %v26, i32 26
+- %ret27 = insertelement <32 x i8> %ret26, i8 %v27, i32 27
+- %ret28 = insertelement <32 x i8> %ret27, i8 %v28, i32 28
+- %ret29 = insertelement <32 x i8> %ret28, i8 %v29, i32 29
+- %ret30 = insertelement <32 x i8> %ret29, i8 %v30, i32 30
+- %ret31 = insertelement <32 x i8> %ret30, i8 %v31, i32 31
+- ret <32 x i8> %ret31
+-}
+-
+-define <4 x double> @var_shuffle_v4f64(<4 x double> %v, <4 x i64> %indices) nounwind {
+-; AVX1-LABEL: var_shuffle_v4f64:
+-; AVX1: # %bb.0:
+-; AVX1-NEXT: pushq %rbp
+-; AVX1-NEXT: movq %rsp, %rbp
+-; AVX1-NEXT: andq $-32, %rsp
+-; AVX1-NEXT: subq $64, %rsp
+-; AVX1-NEXT: vmovq %xmm1, %rax
+-; AVX1-NEXT: andl $3, %eax
+-; AVX1-NEXT: vpextrq $1, %xmm1, %rcx
+-; AVX1-NEXT: andl $3, %ecx
+-; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1
+-; AVX1-NEXT: vmovq %xmm1, %rdx
+-; AVX1-NEXT: andl $3, %edx
+-; AVX1-NEXT: vpextrq $1, %xmm1, %rsi
+-; AVX1-NEXT: andl $3, %esi
+-; AVX1-NEXT: vmovaps %ymm0, (%rsp)
+-; AVX1-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+-; AVX1-NEXT: vmovhpd {{.*#+}} xmm0 = xmm0[0],mem[0]
+-; AVX1-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
+-; AVX1-NEXT: vmovhpd {{.*#+}} xmm1 = xmm1[0],mem[0]
+-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+-; AVX1-NEXT: movq %rbp, %rsp
+-; AVX1-NEXT: popq %rbp
+-; AVX1-NEXT: retq
+-;
+-; AVX2-LABEL: var_shuffle_v4f64:
+-; AVX2: # %bb.0:
+-; AVX2-NEXT: pushq %rbp
+-; AVX2-NEXT: movq %rsp, %rbp
+-; AVX2-NEXT: andq $-32, %rsp
+-; AVX2-NEXT: subq $64, %rsp
+-; AVX2-NEXT: vmovq %xmm1, %rax
+-; AVX2-NEXT: andl $3, %eax
+-; AVX2-NEXT: vpextrq $1, %xmm1, %rcx
+-; AVX2-NEXT: andl $3, %ecx
+-; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm1
+-; AVX2-NEXT: vmovq %xmm1, %rdx
+-; AVX2-NEXT: andl $3, %edx
+-; AVX2-NEXT: vpextrq $1, %xmm1, %rsi
+-; AVX2-NEXT: andl $3, %esi
+-; AVX2-NEXT: vmovaps %ymm0, (%rsp)
+-; AVX2-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+-; AVX2-NEXT: vmovhpd {{.*#+}} xmm0 = xmm0[0],mem[0]
+-; AVX2-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
+-; AVX2-NEXT: vmovhpd {{.*#+}} xmm1 = xmm1[0],mem[0]
+-; AVX2-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+-; AVX2-NEXT: movq %rbp, %rsp
+-; AVX2-NEXT: popq %rbp
+-; AVX2-NEXT: retq
+-;
+-; AVX512F-LABEL: var_shuffle_v4f64:
+-; AVX512F: # %bb.0:
+-; AVX512F-NEXT: pushq %rbp
+-; AVX512F-NEXT: movq %rsp, %rbp
+-; AVX512F-NEXT: andq $-32, %rsp
+-; AVX512F-NEXT: subq $64, %rsp
+-; AVX512F-NEXT: vmovq %xmm1, %rax
+-; AVX512F-NEXT: andl $3, %eax
+-; AVX512F-NEXT: vpextrq $1, %xmm1, %rcx
+-; AVX512F-NEXT: andl $3, %ecx
+-; AVX512F-NEXT: vextracti128 $1, %ymm1, %xmm1
+-; AVX512F-NEXT: vmovq %xmm1, %rdx
+-; AVX512F-NEXT: andl $3, %edx
+-; AVX512F-NEXT: vpextrq $1, %xmm1, %rsi
+-; AVX512F-NEXT: andl $3, %esi
+-; AVX512F-NEXT: vmovaps %ymm0, (%rsp)
+-; AVX512F-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+-; AVX512F-NEXT: vmovhpd {{.*#+}} xmm0 = xmm0[0],mem[0]
+-; AVX512F-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
+-; AVX512F-NEXT: vmovhpd {{.*#+}} xmm1 = xmm1[0],mem[0]
+-; AVX512F-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+-; AVX512F-NEXT: movq %rbp, %rsp
+-; AVX512F-NEXT: popq %rbp
+-; AVX512F-NEXT: retq
+-;
+-; AVX512VL-LABEL: var_shuffle_v4f64:
+-; AVX512VL: # %bb.0:
+-; AVX512VL-NEXT: vpermpd %ymm0, %ymm1, %ymm0
+-; AVX512VL-NEXT: retq
+-;
+-; AVX512VLBW-LABEL: var_shuffle_v4f64:
+-; AVX512VLBW: # %bb.0:
+-; AVX512VLBW-NEXT: vpermpd %ymm0, %ymm1, %ymm0
+-; AVX512VLBW-NEXT: retq
+- %index0 = extractelement <4 x i64> %indices, i32 0
+- %index1 = extractelement <4 x i64> %indices, i32 1
+- %index2 = extractelement <4 x i64> %indices, i32 2
+- %index3 = extractelement <4 x i64> %indices, i32 3
+- %v0 = extractelement <4 x double> %v, i64 %index0
+- %v1 = extractelement <4 x double> %v, i64 %index1
+- %v2 = extractelement <4 x double> %v, i64 %index2
+- %v3 = extractelement <4 x double> %v, i64 %index3
+- %ret0 = insertelement <4 x double> undef, double %v0, i32 0
+- %ret1 = insertelement <4 x double> %ret0, double %v1, i32 1
+- %ret2 = insertelement <4 x double> %ret1, double %v2, i32 2
+- %ret3 = insertelement <4 x double> %ret2, double %v3, i32 3
+- ret <4 x double> %ret3
+-}
+-
+-define <8 x float> @var_shuffle_v8f32(<8 x float> %v, <8 x i32> %indices) nounwind {
+-; AVX1-LABEL: var_shuffle_v8f32:
+-; AVX1: # %bb.0:
+-; AVX1-NEXT: pushq %rbp
+-; AVX1-NEXT: movq %rsp, %rbp
+-; AVX1-NEXT: andq $-32, %rsp
+-; AVX1-NEXT: subq $64, %rsp
+-; AVX1-NEXT: vpextrq $1, %xmm1, %r8
+-; AVX1-NEXT: movq %r8, %rcx
+-; AVX1-NEXT: shrq $30, %rcx
+-; AVX1-NEXT: vmovq %xmm1, %r9
+-; AVX1-NEXT: movq %r9, %rdx
+-; AVX1-NEXT: shrq $30, %rdx
+-; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1
+-; AVX1-NEXT: vpextrq $1, %xmm1, %r10
+-; AVX1-NEXT: movq %r10, %rdi
+-; AVX1-NEXT: shrq $30, %rdi
+-; AVX1-NEXT: vmovq %xmm1, %rax
+-; AVX1-NEXT: movq %rax, %rsi
+-; AVX1-NEXT: shrq $30, %rsi
+-; AVX1-NEXT: vmovaps %ymm0, (%rsp)
+-; AVX1-NEXT: andl $7, %r9d
+-; AVX1-NEXT: andl $28, %edx
+-; AVX1-NEXT: andl $7, %r8d
+-; AVX1-NEXT: andl $28, %ecx
+-; AVX1-NEXT: andl $7, %eax
+-; AVX1-NEXT: andl $28, %esi
+-; AVX1-NEXT: andl $7, %r10d
+-; AVX1-NEXT: andl $28, %edi
+-; AVX1-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+-; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2,3]
+-; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
+-; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
+-; AVX1-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+-; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[2,3]
+-; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],mem[0],xmm1[3]
+-; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],mem[0]
+-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+-; AVX1-NEXT: movq %rbp, %rsp
+-; AVX1-NEXT: popq %rbp
+-; AVX1-NEXT: retq
+-;
+-; INT256-LABEL: var_shuffle_v8f32:
+-; INT256: # %bb.0:
+-; INT256-NEXT: vpermps %ymm0, %ymm1, %ymm0
+-; INT256-NEXT: retq
+- %index0 = extractelement <8 x i32> %indices, i32 0
+- %index1 = extractelement <8 x i32> %indices, i32 1
+- %index2 = extractelement <8 x i32> %indices, i32 2
+- %index3 = extractelement <8 x i32> %indices, i32 3
+- %index4 = extractelement <8 x i32> %indices, i32 4
+- %index5 = extractelement <8 x i32> %indices, i32 5
+- %index6 = extractelement <8 x i32> %indices, i32 6
+- %index7 = extractelement <8 x i32> %indices, i32 7
+- %v0 = extractelement <8 x float> %v, i32 %index0
+- %v1 = extractelement <8 x float> %v, i32 %index1
+- %v2 = extractelement <8 x float> %v, i32 %index2
+- %v3 = extractelement <8 x float> %v, i32 %index3
+- %v4 = extractelement <8 x float> %v, i32 %index4
+- %v5 = extractelement <8 x float> %v, i32 %index5
+- %v6 = extractelement <8 x float> %v, i32 %index6
+- %v7 = extractelement <8 x float> %v, i32 %index7
+- %ret0 = insertelement <8 x float> undef, float %v0, i32 0
+- %ret1 = insertelement <8 x float> %ret0, float %v1, i32 1
+- %ret2 = insertelement <8 x float> %ret1, float %v2, i32 2
+- %ret3 = insertelement <8 x float> %ret2, float %v3, i32 3
+- %ret4 = insertelement <8 x float> %ret3, float %v4, i32 4
+- %ret5 = insertelement <8 x float> %ret4, float %v5, i32 5
+- %ret6 = insertelement <8 x float> %ret5, float %v6, i32 6
+- %ret7 = insertelement <8 x float> %ret6, float %v7, i32 7
+- ret <8 x float> %ret7
+-}
+-
+-define <8 x i32> @pr35820(<4 x i32> %v, <8 x i32> %indices) unnamed_addr nounwind {
+-; AVX1-LABEL: pr35820:
+-; AVX1: # %bb.0: # %entry
+-; AVX1-NEXT: vpextrq $1, %xmm1, %r8
+-; AVX1-NEXT: movq %r8, %r10
+-; AVX1-NEXT: shrq $30, %r10
+-; AVX1-NEXT: vmovq %xmm1, %r9
+-; AVX1-NEXT: movq %r9, %rsi
+-; AVX1-NEXT: shrq $30, %rsi
+-; AVX1-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
+-; AVX1-NEXT: andl $3, %r9d
+-; AVX1-NEXT: andl $12, %esi
+-; AVX1-NEXT: andl $3, %r8d
+-; AVX1-NEXT: andl $12, %r10d
+-; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm0
+-; AVX1-NEXT: vpextrq $1, %xmm0, %rax
+-; AVX1-NEXT: movq %rax, %rdi
+-; AVX1-NEXT: shrq $30, %rdi
+-; AVX1-NEXT: vmovq %xmm0, %rcx
+-; AVX1-NEXT: movq %rcx, %rdx
+-; AVX1-NEXT: shrq $30, %rdx
+-; AVX1-NEXT: andl $3, %ecx
+-; AVX1-NEXT: andl $12, %edx
+-; AVX1-NEXT: andl $3, %eax
+-; AVX1-NEXT: andl $12, %edi
+-; AVX1-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
+-; AVX1-NEXT: vpinsrd $1, -24(%rsp,%rdx), %xmm0, %xmm0
+-; AVX1-NEXT: vpinsrd $2, -24(%rsp,%rax,4), %xmm0, %xmm0
+-; AVX1-NEXT: vpinsrd $3, -24(%rsp,%rdi), %xmm0, %xmm0
+-; AVX1-NEXT: vmovd {{.*#+}} xmm1 = mem[0],zero,zero,zero
+-; AVX1-NEXT: vpinsrd $1, -24(%rsp,%rsi), %xmm1, %xmm1
+-; AVX1-NEXT: vpinsrd $2, -24(%rsp,%r8,4), %xmm1, %xmm1
+-; AVX1-NEXT: vpinsrd $3, -24(%rsp,%r10), %xmm1, %xmm1
+-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+-; AVX1-NEXT: retq
+-;
+-; INT256-LABEL: pr35820:
+-; INT256: # %bb.0: # %entry
+-; INT256-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; INT256-NEXT: vpermps %ymm0, %ymm1, %ymm0
+-; INT256-NEXT: retq
+-entry:
+- %tmp1 = extractelement <8 x i32> %indices, i32 0
+- %vecext2.8 = extractelement <4 x i32> %v, i32 %tmp1
+- %tmp2 = extractelement <8 x i32> %indices, i32 1
+- %vecext2.9 = extractelement <4 x i32> %v, i32 %tmp2
+- %tmp3 = extractelement <8 x i32> %indices, i32 2
+- %vecext2.10 = extractelement <4 x i32> %v, i32 %tmp3
+- %tmp4 = extractelement <8 x i32> %indices, i32 3
+- %vecext2.11 = extractelement <4 x i32> %v, i32 %tmp4
+- %tmp5 = extractelement <8 x i32> %indices, i32 4
+- %vecext2.12 = extractelement <4 x i32> %v, i32 %tmp5
+- %tmp6 = extractelement <8 x i32> %indices, i32 5
+- %vecext2.13 = extractelement <4 x i32> %v, i32 %tmp6
+- %tmp7 = extractelement <8 x i32> %indices, i32 6
+- %vecext2.14 = extractelement <4 x i32> %v, i32 %tmp7
+- %tmp8 = extractelement <8 x i32> %indices, i32 7
+- %vecext2.15 = extractelement <4 x i32> %v, i32 %tmp8
+- %tmp9 = insertelement <8 x i32> undef, i32 %vecext2.8, i32 0
+- %tmp10 = insertelement <8 x i32> %tmp9, i32 %vecext2.9, i32 1
+- %tmp11 = insertelement <8 x i32> %tmp10, i32 %vecext2.10, i32 2
+- %tmp12 = insertelement <8 x i32> %tmp11, i32 %vecext2.11, i32 3
+- %tmp13 = insertelement <8 x i32> %tmp12, i32 %vecext2.12, i32 4
+- %tmp14 = insertelement <8 x i32> %tmp13, i32 %vecext2.13, i32 5
+- %tmp15 = insertelement <8 x i32> %tmp14, i32 %vecext2.14, i32 6
+- %tmp16 = insertelement <8 x i32> %tmp15, i32 %vecext2.15, i32 7
+- ret <8 x i32> %tmp16
+-}
+-
+-define <8 x float> @pr35820_float(<4 x float> %v, <8 x i32> %indices) unnamed_addr nounwind {
+-; AVX1-LABEL: pr35820_float:
+-; AVX1: # %bb.0: # %entry
+-; AVX1-NEXT: vpextrq $1, %xmm1, %r8
+-; AVX1-NEXT: movq %r8, %r10
+-; AVX1-NEXT: shrq $30, %r10
+-; AVX1-NEXT: vmovq %xmm1, %r9
+-; AVX1-NEXT: movq %r9, %rdx
+-; AVX1-NEXT: shrq $30, %rdx
+-; AVX1-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp)
+-; AVX1-NEXT: andl $3, %r9d
+-; AVX1-NEXT: andl $12, %edx
+-; AVX1-NEXT: andl $3, %r8d
+-; AVX1-NEXT: andl $12, %r10d
+-; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm0
+-; AVX1-NEXT: vpextrq $1, %xmm0, %rax
+-; AVX1-NEXT: movq %rax, %rdi
+-; AVX1-NEXT: shrq $30, %rdi
+-; AVX1-NEXT: vmovq %xmm0, %rcx
+-; AVX1-NEXT: movq %rcx, %rsi
+-; AVX1-NEXT: shrq $30, %rsi
+-; AVX1-NEXT: andl $3, %ecx
+-; AVX1-NEXT: andl $12, %esi
+-; AVX1-NEXT: andl $3, %eax
+-; AVX1-NEXT: andl $12, %edi
+-; AVX1-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+-; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2,3]
+-; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
+-; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
+-; AVX1-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
+-; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],mem[0],xmm1[2,3]
+-; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],mem[0],xmm1[3]
+-; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],mem[0]
+-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+-; AVX1-NEXT: retq
+-;
+-; INT256-LABEL: pr35820_float:
+-; INT256: # %bb.0: # %entry
+-; INT256-NEXT: # kill: def %xmm0 killed %xmm0 def %ymm0
+-; INT256-NEXT: vpermps %ymm0, %ymm1, %ymm0
+-; INT256-NEXT: retq
+-entry:
+- %tmp1 = extractelement <8 x i32> %indices, i32 0
+- %vecext2.8 = extractelement <4 x float> %v, i32 %tmp1
+- %tmp2 = extractelement <8 x i32> %indices, i32 1
+- %vecext2.9 = extractelement <4 x float> %v, i32 %tmp2
+- %tmp3 = extractelement <8 x i32> %indices, i32 2
+- %vecext2.10 = extractelement <4 x float> %v, i32 %tmp3
+- %tmp4 = extractelement <8 x i32> %indices, i32 3
+- %vecext2.11 = extractelement <4 x float> %v, i32 %tmp4
+- %tmp5 = extractelement <8 x i32> %indices, i32 4
+- %vecext2.12 = extractelement <4 x float> %v, i32 %tmp5
+- %tmp6 = extractelement <8 x i32> %indices, i32 5
+- %vecext2.13 = extractelement <4 x float> %v, i32 %tmp6
+- %tmp7 = extractelement <8 x i32> %indices, i32 6
+- %vecext2.14 = extractelement <4 x float> %v, i32 %tmp7
+- %tmp8 = extractelement <8 x i32> %indices, i32 7
+- %vecext2.15 = extractelement <4 x float> %v, i32 %tmp8
+- %tmp9 = insertelement <8 x float> undef, float %vecext2.8, i32 0
+- %tmp10 = insertelement <8 x float> %tmp9, float %vecext2.9, i32 1
+- %tmp11 = insertelement <8 x float> %tmp10, float %vecext2.10, i32 2
+- %tmp12 = insertelement <8 x float> %tmp11, float %vecext2.11, i32 3
+- %tmp13 = insertelement <8 x float> %tmp12, float %vecext2.12, i32 4
+- %tmp14 = insertelement <8 x float> %tmp13, float %vecext2.13, i32 5
+- %tmp15 = insertelement <8 x float> %tmp14, float %vecext2.14, i32 6
+- %tmp16 = insertelement <8 x float> %tmp15, float %vecext2.15, i32 7
+- ret <8 x float> %tmp16
+-}
+-
+-define <4 x i32> @big_source(<8 x i32> %v, <4 x i32> %indices) unnamed_addr nounwind {
+-; AVX-LABEL: big_source:
+-; AVX: # %bb.0: # %entry
+-; AVX-NEXT: pushq %rbp
+-; AVX-NEXT: movq %rsp, %rbp
+-; AVX-NEXT: andq $-32, %rsp
+-; AVX-NEXT: subq $64, %rsp
+-; AVX-NEXT: vmovq %xmm1, %rax
+-; AVX-NEXT: movq %rax, %rcx
+-; AVX-NEXT: shrq $30, %rcx
+-; AVX-NEXT: andl $28, %ecx
+-; AVX-NEXT: vpextrq $1, %xmm1, %rdx
+-; AVX-NEXT: movq %rdx, %rsi
+-; AVX-NEXT: sarq $32, %rsi
+-; AVX-NEXT: andl $7, %eax
+-; AVX-NEXT: andl $7, %edx
+-; AVX-NEXT: vmovaps %ymm0, (%rsp)
+-; AVX-NEXT: andl $7, %esi
+-; AVX-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero
+-; AVX-NEXT: vpinsrd $1, (%rsp,%rcx), %xmm0, %xmm0
+-; AVX-NEXT: vpinsrd $2, (%rsp,%rdx,4), %xmm0, %xmm0
+-; AVX-NEXT: vpinsrd $3, (%rsp,%rsi,4), %xmm0, %xmm0
+-; AVX-NEXT: movq %rbp, %rsp
+-; AVX-NEXT: popq %rbp
+-; AVX-NEXT: vzeroupper
+-; AVX-NEXT: retq
+-entry:
+- %tmp1 = extractelement <4 x i32> %indices, i32 0
+- %vecext2.8 = extractelement <8 x i32> %v, i32 %tmp1
+- %tmp2 = extractelement <4 x i32> %indices, i32 1
+- %vecext2.9 = extractelement <8 x i32> %v, i32 %tmp2
+- %tmp3 = extractelement <4 x i32> %indices, i32 2
+- %vecext2.10 = extractelement <8 x i32> %v, i32 %tmp3
+- %tmp4 = extractelement <4 x i32> %indices, i32 3
+- %vecext2.11 = extractelement <8 x i32> %v, i32 %tmp4
+- %tmp9 = insertelement <4 x i32> undef, i32 %vecext2.8, i32 0
+- %tmp10 = insertelement <4 x i32> %tmp9, i32 %vecext2.9, i32 1
+- %tmp11 = insertelement <4 x i32> %tmp10, i32 %vecext2.10, i32 2
+- %tmp12 = insertelement <4 x i32> %tmp11, i32 %vecext2.11, i32 3
+- ret <4 x i32> %tmp12
+-}
+diff --git a/test/CodeGen/X86/vastart-defs-eflags.ll b/test/CodeGen/X86/vastart-defs-eflags.ll
+index d0c515089f4..6ef691552aa 100644
+--- a/test/CodeGen/X86/vastart-defs-eflags.ll
++++ b/test/CodeGen/X86/vastart-defs-eflags.ll
+@@ -1,3 +1,4 @@
++; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+ ; RUN: llc %s -o - | FileCheck %s
+
+ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+@@ -5,10 +6,41 @@ target triple = "x86_64-apple-macosx10.10.0"
+
+ ; Check that vastart handling doesn't get between testb and je for the branch.
+ define i32 @check_flag(i32 %flags, ...) nounwind {
++; CHECK-LABEL: check_flag:
++; CHECK: ## %bb.0: ## %entry
++; CHECK-NEXT: subq $56, %rsp
++; CHECK-NEXT: testb %al, %al
++; CHECK-NEXT: je LBB0_2
++; CHECK-NEXT: ## %bb.1: ## %entry
++; CHECK-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
++; CHECK-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
++; CHECK-NEXT: movaps %xmm2, -{{[0-9]+}}(%rsp)
++; CHECK-NEXT: movaps %xmm3, -{{[0-9]+}}(%rsp)
++; CHECK-NEXT: movaps %xmm4, -{{[0-9]+}}(%rsp)
++; CHECK-NEXT: movaps %xmm5, (%rsp)
++; CHECK-NEXT: movaps %xmm6, {{[0-9]+}}(%rsp)
++; CHECK-NEXT: movaps %xmm7, {{[0-9]+}}(%rsp)
++; CHECK-NEXT: LBB0_2: ## %entry
++; CHECK-NEXT: movq %r9, -{{[0-9]+}}(%rsp)
++; CHECK-NEXT: movq %r8, -{{[0-9]+}}(%rsp)
++; CHECK-NEXT: movq %rcx, -{{[0-9]+}}(%rsp)
++; CHECK-NEXT: movq %rdx, -{{[0-9]+}}(%rsp)
++; CHECK-NEXT: movq %rsi, -{{[0-9]+}}(%rsp)
++; CHECK-NEXT: xorl %eax, %eax
++; CHECK-NEXT: testl $512, %edi ## imm = 0x200
++; CHECK-NEXT: je LBB0_4
++; CHECK-NEXT: ## %bb.3: ## %if.then
++; CHECK-NEXT: leaq -{{[0-9]+}}(%rsp), %rax
++; CHECK-NEXT: movq %rax, 16
++; CHECK-NEXT: leaq {{[0-9]+}}(%rsp), %rax
++; CHECK-NEXT: movq %rax, 8
++; CHECK-NEXT: movl $48, 4
++; CHECK-NEXT: movl $8, 0
++; CHECK-NEXT: movl $1, %eax
++; CHECK-NEXT: LBB0_4: ## %if.end
++; CHECK-NEXT: addq $56, %rsp
++; CHECK-NEXT: retq
+ entry:
+-; CHECK: {{^}} testb $2, %bh
+-; CHECK-NOT: test
+-; CHECK: {{^}} je
+ %and = and i32 %flags, 512
+ %tobool = icmp eq i32 %and, 0
+ br i1 %tobool, label %if.end, label %if.then
+diff --git a/test/CodeGen/X86/vector-shuffle-combining-xop.ll b/test/CodeGen/X86/vector-shuffle-combining-xop.ll
+index 83001cf5fb9..dc08ad8a3de 100644
+--- a/test/CodeGen/X86/vector-shuffle-combining-xop.ll
++++ b/test/CodeGen/X86/vector-shuffle-combining-xop.ll
+@@ -1,8 +1,8 @@
+ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefix=X32
+-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefix=X32
+-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefix=X64
+-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefix=X64
++; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefix=X32 --check-prefix=X86AVX
++; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefix=X32 --check-prefix=X86AVX2
++; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefix=X64 --check-prefix=X64AVX
++; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefix=X64 --check-prefix=X64AVX2
+
+ declare <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double>, <2 x double>, <2 x i64>, i8) nounwind readnone
+ declare <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double>, <4 x double>, <4 x i64>, i8) nounwind readnone
+@@ -320,20 +320,35 @@ define <4 x i32> @combine_vpperm_10zz32BA(<4 x i32> %a0, <4 x i32> %a1) {
+
+ ; FIXME: Duplicated load in i686
+ define void @buildvector_v4f32_0404(float %a, float %b, <4 x float>* %ptr) {
+-; X32-LABEL: buildvector_v4f32_0404:
+-; X32: # %bb.0:
+-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+-; X32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+-; X32-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
+-; X32-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
+-; X32-NEXT: vmovaps %xmm0, (%eax)
+-; X32-NEXT: retl
++; X86AVX-LABEL: buildvector_v4f32_0404:
++; X86AVX: # %bb.0:
++; X86AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
++; X86AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
++; X86AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
++; X86AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
++; X86AVX-NEXT: vmovaps %xmm0, (%eax)
++; X86AVX-NEXT: retl
+ ;
+-; X64-LABEL: buildvector_v4f32_0404:
+-; X64: # %bb.0:
+-; X64-NEXT: vpermil2ps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[0],xmm1[0]
+-; X64-NEXT: vmovaps %xmm0, (%rdi)
+-; X64-NEXT: retq
++; X86AVX2-LABEL: buildvector_v4f32_0404:
++; X86AVX2: # %bb.0:
++; X86AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
++; X86AVX2-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
++; X86AVX2-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
++; X86AVX2-NEXT: vmovapd %xmm0, (%eax)
++; X86AVX2-NEXT: retl
++;
++; X64AVX-LABEL: buildvector_v4f32_0404:
++; X64AVX: # %bb.0:
++; X64AVX-NEXT: vpermil2ps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[0],xmm1[0]
++; X64AVX-NEXT: vmovaps %xmm0, (%rdi)
++; X64AVX-NEXT: retq
++;
++; X64AVX2-LABEL: buildvector_v4f32_0404:
++; X64AVX2: # %bb.0:
++; X64AVX2-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3]
++; X64AVX2-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
++; X64AVX2-NEXT: vmovapd %xmm0, (%rdi)
++; X64AVX2-NEXT: retq
+ %v0 = insertelement <4 x float> undef, float %a, i32 0
+ %v1 = insertelement <4 x float> %v0, float %b, i32 1
+ %v2 = insertelement <4 x float> %v1, float %a, i32 2
+diff --git a/test/CodeGen/X86/vector-shuffle-variable-256.ll b/test/CodeGen/X86/vector-shuffle-variable-256.ll
+index 91672d07b05..0c806d76273 100644
+--- a/test/CodeGen/X86/vector-shuffle-variable-256.ll
++++ b/test/CodeGen/X86/vector-shuffle-variable-256.ll
+@@ -47,8 +47,7 @@ define <4 x double> @var_shuffle_v4f64_v4f64_uxx0_i64(<4 x double> %x, i64 %i0,
+ ; ALL-NEXT: andl $3, %edx
+ ; ALL-NEXT: andl $3, %esi
+ ; ALL-NEXT: vmovaps %ymm0, (%rsp)
+-; ALL-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+-; ALL-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
++; ALL-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
+ ; ALL-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
+ ; ALL-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
+ ; ALL-NEXT: movq %rbp, %rsp
--- /dev/null
+lldb-server exec users always /usr/bin/lldb-server. Server is required
+for any debugging with lldb which makes it unusable unless default version
+package has been installed. Small changes to code and debian/rules allows
+a workaround for lldb-server start up.
+
+To use this one needs to add cmake defination during configure. eg
+-DDEBIAN_VERSION_SUFFIX=-$(LLVM_VERSION)
+
+Better implementation would be to use /usr/share/llvm-$(VERSION)/bin but
+that change seems to require a big change to the path handling code
+which could then break something else.
+
+This probably should have upstream bug but I couldn't find any existing report.
+
+Index: llvm-toolchain-snapshot_6.0~svn293997/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn293997.orig/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
++++ llvm-toolchain-snapshot_6.0~svn293997/lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
+@@ -32,6 +32,7 @@
+ #include "lldb/Utility/StreamString.h"
+ #include "llvm/ADT/SmallString.h"
+ #include "llvm/Support/ScopedPrinter.h"
++#include "llvm/Config/llvm-config.h"
+
+ // Project includes
+ #include "ProcessGDBRemoteLog.h"
+@@ -39,7 +40,7 @@
+ #if defined(__APPLE__)
+ #define DEBUGSERVER_BASENAME "debugserver"
+ #else
+-#define DEBUGSERVER_BASENAME "lldb-server"
++# define DEBUGSERVER_BASENAME "lldb-server-"LLVM_VERSION_STRING
+ #endif
+
+ #if defined(HAVE_LIBCOMPRESSION)
--- /dev/null
+Index: llvm-toolchain-snapshot_5.0~svn306792/lldb/scripts/lldb.swig
+===================================================================
+--- llvm-toolchain-snapshot_5.0~svn306792.orig/lldb/scripts/lldb.swig
++++ llvm-toolchain-snapshot_5.0~svn306792/lldb/scripts/lldb.swig
+@@ -50,7 +50,7 @@ except ImportError:
+ %enddef
+ // These versions will not generate working python modules, so error out early.
+ #if SWIG_VERSION >= 0x030009 && SWIG_VERSION < 0x030011
+-#error Swig versions 3.0.9 and 3.0.10 are incompatible with lldb.
++#warning Swig versions 3.0.9 and 3.0.10 are incompatible with lldb.
+ #endif
+
+ // The name of the module to be created.
--- /dev/null
+---
+ lldb/scripts/Python/finishSwigPythonLLDB.py | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/lldb/scripts/Python/finishSwigPythonLLDB.py
++++ b/lldb/scripts/Python/finishSwigPythonLLDB.py
+@@ -443,7 +443,7 @@ def make_symlink_liblldb(
+ if eOSType == utilsOsType.EnumOsType.Darwin:
+ strLibFileExtn = ".dylib"
+ else:
+- strLibFileExtn = ".so"
++ strLibFileExtn = "-6.0.so"
+ strSrc = os.path.join(vstrLldbLibDir, "liblldb" + strLibFileExtn)
+
+ bOk, strErrMsg = make_symlink(
--- /dev/null
+Description: Link with -latomic when mips* processor is detected
+Author: Gianfranco Costamagna <locutusofborg@debian.org>
+Last-Update: 2016-07-27
+
+---
+ lldb/cmake/LLDBDependencies.cmake | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+Index: llvm-toolchain-snapshot_6.0~svn317000/lldb/source/Utility/CMakeLists.txt
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn317000.orig/lldb/source/Utility/CMakeLists.txt
++++ llvm-toolchain-snapshot_6.0~svn317000/lldb/source/Utility/CMakeLists.txt
+@@ -30,6 +30,14 @@ endif()
+
+ list(APPEND LLDB_SYSTEM_LIBS ${system_libs})
+
++if(CMAKE_HOST_SYSTEM_PROCESSOR MATCHES "mips" OR
++ CMAKE_HOST_SYSTEM_PROCESSOR MATCHES "mipsel" OR
++ CMAKE_HOST_SYSTEM_PROCESSOR MATCHES "mips64el" OR
++ CMAKE_HOST_SYSTEM_PROCESSOR MATCHES "powerpcspe")
++ list(APPEND LLDB_SYSTEM_LIBS atomic)
++endif()
++
++
+ if (LLVM_BUILD_STATIC)
+ if (NOT LLDB_DISABLE_PYTHON)
+ list(APPEND LLDB_SYSTEM_LIBS python2.7 util)
--- /dev/null
+Index: llvm-toolchain-snapshot_6.0~svn319966/lldb/tools/argdumper/CMakeLists.txt
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn319966.orig/lldb/tools/argdumper/CMakeLists.txt
++++ llvm-toolchain-snapshot_6.0~svn319966/lldb/tools/argdumper/CMakeLists.txt
+@@ -4,3 +4,7 @@ add_lldb_tool(lldb-argdumper INCLUDE_IN_
+ LINK_LIBS
+ lldbUtility
+ )
++
++install(TARGETS lldb-argdumper
++ RUNTIME DESTINATION bin)
++
+Index: llvm-toolchain-snapshot_6.0~svn319966/lldb/tools/lldb-server/CMakeLists.txt
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn319966.orig/lldb/tools/lldb-server/CMakeLists.txt
++++ llvm-toolchain-snapshot_6.0~svn319966/lldb/tools/lldb-server/CMakeLists.txt
+@@ -55,3 +55,7 @@ add_lldb_tool(lldb-server INCLUDE_IN_FRA
+ )
+
+ target_link_libraries(lldb-server PRIVATE ${LLDB_SYSTEM_LIBS})
++
++install(TARGETS lldb-server
++ RUNTIME DESTINATION bin)
++
--- /dev/null
+---
+ lldb/source/API/CMakeLists.txt | 14 +++++++-------
+ 1 file changed, 7 insertions(+), 7 deletions(-)
+
+Index: llvm-toolchain-snapshot_5.0~svn294583/lldb/source/API/CMakeLists.txt
+===================================================================
+--- llvm-toolchain-snapshot_5.0~svn294583.orig/lldb/source/API/CMakeLists.txt
++++ llvm-toolchain-snapshot_5.0~svn294583/lldb/source/API/CMakeLists.txt
+@@ -18,7 +18,12 @@ endif()
+
+ get_property(LLDB_ALL_PLUGINS GLOBAL PROPERTY LLDB_PLUGINS)
+
+-add_lldb_library(liblldb SHARED
++set(output_name lldb)
++if (CMAKE_SYSTEM_NAME MATCHES "Windows")
++ set(output_name liblldb)
++endif()
++
++add_lldb_library(liblldb SHARED OUTPUT_NAME ${output_name} SONAME
+ SBAddress.cpp
+ SBAttachInfo.cpp
+ SBBlock.cpp
+@@ -116,7 +121,7 @@ target_link_libraries(liblldb PRIVATE
+
+ set_target_properties(liblldb
+ PROPERTIES
+- VERSION ${LLDB_VERSION}
++ VERSION 1
+ )
+
+ if (NOT CMAKE_SYSTEM_NAME MATCHES "Windows")
+@@ -140,11 +145,6 @@ if ( CMAKE_SYSTEM_NAME MATCHES "Windows"
+ if (MSVC AND NOT LLDB_DISABLE_PYTHON)
+ target_link_libraries(liblldb PRIVATE ${PYTHON_LIBRARY})
+ endif()
+-else()
+- set_target_properties(liblldb
+- PROPERTIES
+- OUTPUT_NAME lldb
+- )
+ endif()
+
+ if (LLDB_WRAP_PYTHON)
--- /dev/null
+commit 98592fcc61307968f7df1362771534595a1e1c21
+Author: Keno Fischer <keno@juliacomputing.com>
+Date: Wed Jul 25 19:29:02 2018 -0400
+
+ [SCEV] Don't expand Wrap predicate using inttoptr in ni addrspaces
+
+ Summary:
+ In non-integral address spaces, we're not allowed to introduce inttoptr/ptrtoint
+ intrinsics. Instead, we need to expand any pointer arithmetic as geps on the
+ base pointer. Luckily this is a common task for SCEV, so all we have to do here
+ is hook up the corresponding helper function and add test case.
+
+ Fixes PR38290
+
+ Reviewers: reames, sanjoy
+
+ Subscribers: javed.absar, llvm-commits
+
+ Differential Revision: https://reviews.llvm.org/D49832
+
+diff --git a/lib/Analysis/ScalarEvolutionExpander.cpp b/lib/Analysis/ScalarEvolutionExpander.cpp
+index 7f76f057216..f441a3647fb 100644
+--- a/lib/Analysis/ScalarEvolutionExpander.cpp
++++ b/lib/Analysis/ScalarEvolutionExpander.cpp
+@@ -2154,8 +2154,9 @@ Value *SCEVExpander::generateOverflowCheck(const SCEVAddRecExpr *AR,
+ const SCEV *Step = AR->getStepRecurrence(SE);
+ const SCEV *Start = AR->getStart();
+
++ Type *ARTy = AR->getType();
+ unsigned SrcBits = SE.getTypeSizeInBits(ExitCount->getType());
+- unsigned DstBits = SE.getTypeSizeInBits(AR->getType());
++ unsigned DstBits = SE.getTypeSizeInBits(ARTy);
+
+ // The expression {Start,+,Step} has nusw/nssw if
+ // Step < 0, Start - |Step| * Backedge <= Start
+@@ -2167,11 +2168,12 @@ Value *SCEVExpander::generateOverflowCheck(const SCEVAddRecExpr *AR,
+ Value *TripCountVal = expandCodeFor(ExitCount, CountTy, Loc);
+
+ IntegerType *Ty =
+- IntegerType::get(Loc->getContext(), SE.getTypeSizeInBits(AR->getType()));
++ IntegerType::get(Loc->getContext(), SE.getTypeSizeInBits(ARTy));
++ Type *ARExpandTy = DL.isNonIntegralPointerType(ARTy) ? ARTy : Ty;
+
+ Value *StepValue = expandCodeFor(Step, Ty, Loc);
+ Value *NegStepValue = expandCodeFor(SE.getNegativeSCEV(Step), Ty, Loc);
+- Value *StartValue = expandCodeFor(Start, Ty, Loc);
++ Value *StartValue = expandCodeFor(Start, ARExpandTy, Loc);
+
+ ConstantInt *Zero =
+ ConstantInt::get(Loc->getContext(), APInt::getNullValue(DstBits));
+@@ -2194,8 +2196,21 @@ Value *SCEVExpander::generateOverflowCheck(const SCEVAddRecExpr *AR,
+ // Compute:
+ // Start + |Step| * Backedge < Start
+ // Start - |Step| * Backedge > Start
+- Value *Add = Builder.CreateAdd(StartValue, MulV);
+- Value *Sub = Builder.CreateSub(StartValue, MulV);
++ Value *Add = nullptr, *Sub = nullptr;
++ if (ARExpandTy->isPointerTy()) {
++ PointerType *ARPtrTy = cast<PointerType>(ARExpandTy);
++ const SCEV *MulS = SE.getSCEV(MulV);
++ const SCEV *const StepArray[2] = {MulS, SE.getNegativeSCEV(MulS)};
++ Add = Builder.CreateBitCast(
++ expandAddToGEP(&StepArray[0], &StepArray[1], ARPtrTy, Ty, StartValue),
++ ARPtrTy);
++ Sub = Builder.CreateBitCast(
++ expandAddToGEP(&StepArray[1], &StepArray[2], ARPtrTy, Ty, StartValue),
++ ARPtrTy);
++ } else {
++ Add = Builder.CreateAdd(StartValue, MulV);
++ Sub = Builder.CreateSub(StartValue, MulV);
++ }
+
+ Value *EndCompareGT = Builder.CreateICmp(
+ Signed ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT, Sub, StartValue);
+diff --git a/test/Analysis/LoopAccessAnalysis/wrapping-pointer-ni.ll b/test/Analysis/LoopAccessAnalysis/wrapping-pointer-ni.ll
+new file mode 100644
+index 00000000000..ddcf5e1a195
+--- /dev/null
++++ b/test/Analysis/LoopAccessAnalysis/wrapping-pointer-ni.ll
+@@ -0,0 +1,73 @@
++; RUN: opt -loop-versioning -S < %s | FileCheck %s -check-prefix=LV
++
++; NB: addrspaces 10-13 are non-integral
++target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:10:11:12:13"
++
++; This matches the test case from PR38290
++; Check that we expand the SCEV predicate check using GEP, rather
++; than ptrtoint.
++
++%jl_value_t = type opaque
++%jl_array_t = type { i8 addrspace(13)*, i64, i16, i16, i32 }
++
++declare i64 @julia_steprange_last_4949()
++
++define void @"japi1_align!_9477"(%jl_value_t addrspace(10)**) #0 {
++; LV-LAVEL: L26.lver.check
++; LV: [[OFMul:%[^ ]*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 4, i64 [[Step:%[^ ]*]])
++; LV-NEXT: [[OFMulResult:%[^ ]*]] = extractvalue { i64, i1 } [[OFMul]], 0
++; LV-NEXT: [[OFMulOverflow:%[^ ]*]] = extractvalue { i64, i1 } [[OFMul]], 1
++; LV-NEXT: [[PosGEP:%[^ ]*]] = getelementptr i32, i32 addrspace(13)* [[Base:%[^ ]*]], i64 [[Step]]
++; LV-NEXT: [[NegGEP:%[^ ]*]] = getelementptr i32, i32 addrspace(13)* [[Base]], i64 [[NegStep:%[^ ]*]]
++; LV-NEXT: icmp ugt i32 addrspace(13)* [[NegGEP]], [[Base]]
++; LV-NEXT: icmp ult i32 addrspace(13)* [[PosGEP]], [[Base]]
++; LV-NOT: inttoptr
++; LV-NOT: ptrtoint
++top:
++ %1 = load %jl_value_t addrspace(10)*, %jl_value_t addrspace(10)** %0, align 8, !nonnull !1, !dereferenceable !2, !align !3
++ %2 = load i32, i32* inttoptr (i64 12 to i32*), align 4, !tbaa !4
++ %3 = sub i32 0, %2
++ %4 = call i64 @julia_steprange_last_4949()
++ %5 = addrspacecast %jl_value_t addrspace(10)* %1 to %jl_value_t addrspace(11)*
++ %6 = bitcast %jl_value_t addrspace(11)* %5 to %jl_value_t addrspace(10)* addrspace(11)*
++ %7 = load %jl_value_t addrspace(10)*, %jl_value_t addrspace(10)* addrspace(11)* %6, align 8, !tbaa !4, !nonnull !1, !dereferenceable !9, !align !2
++ %8 = addrspacecast %jl_value_t addrspace(10)* %7 to %jl_value_t addrspace(11)*
++ %9 = bitcast %jl_value_t addrspace(11)* %8 to i32 addrspace(13)* addrspace(11)*
++ %10 = load i32 addrspace(13)*, i32 addrspace(13)* addrspace(11)* %9, align 8, !tbaa !10, !nonnull !1
++ %11 = sext i32 %3 to i64
++ br label %L26
++
++L26: ; preds = %L26, %top
++ %value_phi3 = phi i64 [ 0, %top ], [ %12, %L26 ]
++ %12 = add i64 %value_phi3, -1
++ %13 = getelementptr inbounds i32, i32 addrspace(13)* %10, i64 %12
++ %14 = load i32, i32 addrspace(13)* %13, align 4, !tbaa !13
++ %15 = add i64 %12, %11
++ %16 = getelementptr inbounds i32, i32 addrspace(13)* %10, i64 %15
++ store i32 %14, i32 addrspace(13)* %16, align 4, !tbaa !13
++ %17 = icmp eq i64 %value_phi3, %4
++ br i1 %17, label %L45, label %L26
++
++L45: ; preds = %L26
++ ret void
++}
++
++attributes #0 = { "thunk" }
++
++!llvm.module.flags = !{!0}
++
++!0 = !{i32 1, !"Debug Info Version", i32 3}
++!1 = !{}
++!2 = !{i64 16}
++!3 = !{i64 8}
++!4 = !{!5, !5, i64 0}
++!5 = !{!"jtbaa_mutab", !6, i64 0}
++!6 = !{!"jtbaa_value", !7, i64 0}
++!7 = !{!"jtbaa_data", !8, i64 0}
++!8 = !{!"jtbaa"}
++!9 = !{i64 40}
++!10 = !{!11, !11, i64 0}
++!11 = !{!"jtbaa_arrayptr", !12, i64 0}
++!12 = !{!"jtbaa_array", !8, i64 0}
++!13 = !{!14, !14, i64 0}
++!14 = !{!"jtbaa_arraybuf", !7, i64 0}
+diff --git a/test/Analysis/LoopAccessAnalysis/wrapping-pointer-versioning.ll b/test/Analysis/LoopAccessAnalysis/wrapping-pointer-versioning.ll
+index a7e5bce7445..fa6fccecbf1 100644
+--- a/test/Analysis/LoopAccessAnalysis/wrapping-pointer-versioning.ll
++++ b/test/Analysis/LoopAccessAnalysis/wrapping-pointer-versioning.ll
+@@ -58,10 +58,10 @@ target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
+ ; LV-NEXT: [[OFMul1:%[^ ]*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 4, i64 [[BE]])
+ ; LV-NEXT: [[OFMulResult1:%[^ ]*]] = extractvalue { i64, i1 } [[OFMul1]], 0
+ ; LV-NEXT: [[OFMulOverflow1:%[^ ]*]] = extractvalue { i64, i1 } [[OFMul1]], 1
+-; LV-NEXT: [[AddEnd1:%[^ ]*]] = add i64 %a2, [[OFMulResult1]]
+-; LV-NEXT: [[SubEnd1:%[^ ]*]] = sub i64 %a2, [[OFMulResult1]]
+-; LV-NEXT: [[CmpNeg1:%[^ ]*]] = icmp ugt i64 [[SubEnd1]], %a2
+-; LV-NEXT: [[CmpPos1:%[^ ]*]] = icmp ult i64 [[AddEnd1]], %a2
++; LV-NEXT: [[AddEnd1:%[^ ]*]] = add i64 [[A0:%[^ ]*]], [[OFMulResult1]]
++; LV-NEXT: [[SubEnd1:%[^ ]*]] = sub i64 [[A0]], [[OFMulResult1]]
++; LV-NEXT: [[CmpNeg1:%[^ ]*]] = icmp ugt i64 [[SubEnd1]], [[A0]]
++; LV-NEXT: [[CmpPos1:%[^ ]*]] = icmp ult i64 [[AddEnd1]], [[A0]]
+ ; LV-NEXT: [[Cmp:%[^ ]*]] = select i1 false, i1 [[CmpNeg1]], i1 [[CmpPos1]]
+ ; LV-NEXT: [[PredCheck1:%[^ ]*]] = or i1 [[Cmp]], [[OFMulOverflow1]]
+
+@@ -233,10 +233,10 @@ for.end: ; preds = %for.body
+ ; LV: [[OFMul1:%[^ ]*]] = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 4, i64 [[BE:%[^ ]*]])
+ ; LV-NEXT: [[OFMulResult1:%[^ ]*]] = extractvalue { i64, i1 } [[OFMul1]], 0
+ ; LV-NEXT: [[OFMulOverflow1:%[^ ]*]] = extractvalue { i64, i1 } [[OFMul1]], 1
+-; LV-NEXT: [[AddEnd1:%[^ ]*]] = add i64 %a2, [[OFMulResult1]]
+-; LV-NEXT: [[SubEnd1:%[^ ]*]] = sub i64 %a2, [[OFMulResult1]]
+-; LV-NEXT: [[CmpNeg1:%[^ ]*]] = icmp ugt i64 [[SubEnd1]], %a2
+-; LV-NEXT: [[CmpPos1:%[^ ]*]] = icmp ult i64 [[AddEnd1]], %a2
++; LV-NEXT: [[AddEnd1:%[^ ]*]] = add i64 [[A0:%[^ ]*]], [[OFMulResult1]]
++; LV-NEXT: [[SubEnd1:%[^ ]*]] = sub i64 [[A0]], [[OFMulResult1]]
++; LV-NEXT: [[CmpNeg1:%[^ ]*]] = icmp ugt i64 [[SubEnd1]], [[A0]]
++; LV-NEXT: [[CmpPos1:%[^ ]*]] = icmp ult i64 [[AddEnd1]], [[A0]]
+ ; LV-NEXT: [[Cmp:%[^ ]*]] = select i1 false, i1 [[CmpNeg1]], i1 [[CmpPos1]]
+ ; LV-NEXT: [[PredCheck1:%[^ ]*]] = or i1 [[Cmp]], [[OFMulOverflow1]]
+
--- /dev/null
+commit ab60b05a472e8651cbe53c19513b7e62b9ff32df
+Author: Mikael Holmen <mikael.holmen@ericsson.com>
+Date: Thu Feb 1 06:38:34 2018 +0000
+
+ [LSR] Don't force bases of foldable formulae to the final type.
+
+ Summary:
+ Before emitting code for scaled registers, we prevent
+ SCEVExpander from hoisting any scaled addressing mode
+ by emitting all the bases first. However, these bases
+ are being forced to the final type, resulting in some
+ odd code.
+
+ For example, if the type of the base is an integer and
+ the final type is a pointer, we will emit an inttoptr
+ for the base, a ptrtoint for the scale, and then a
+ 'reverse' GEP where the GEP pointer is actually the base
+ integer and the index is the pointer. It's more intuitive
+ to use the pointer as a pointer and the integer as index.
+
+ Patch by: Bevin Hansson
+
+ Reviewers: atrick, qcolombet, sanjoy
+
+ Reviewed By: qcolombet
+
+ Subscribers: llvm-commits
+
+ Differential Revision: https://reviews.llvm.org/D42103
+
+ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323946 91177308-0d34-0410-b5e6-96231b3b80d8
+
+diff --git a/lib/Transforms/Scalar/LoopStrengthReduce.cpp b/lib/Transforms/Scalar/LoopStrengthReduce.cpp
+index 332c074a1df..4b8e2286ed9 100644
+--- a/lib/Transforms/Scalar/LoopStrengthReduce.cpp
++++ b/lib/Transforms/Scalar/LoopStrengthReduce.cpp
+@@ -4993,7 +4993,7 @@ Value *LSRInstance::Expand(const LSRUse &LU, const LSRFixup &LF,
+ // Unless the addressing mode will not be folded.
+ if (!Ops.empty() && LU.Kind == LSRUse::Address &&
+ isAMCompletelyFolded(TTI, LU, F)) {
+- Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty);
++ Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), nullptr);
+ Ops.clear();
+ Ops.push_back(SE.getUnknown(FullV));
+ }
--- /dev/null
+Index: llvm-toolchain-snapshot_5.0~svn297449/clang/lib/Driver/ToolChains/Arch/Mips.cpp
+===================================================================
+--- llvm-toolchain-snapshot_5.0~svn297449.orig/clang/lib/Driver/ToolChains/Arch/Mips.cpp
++++ llvm-toolchain-snapshot_5.0~svn297449/clang/lib/Driver/ToolChains/Arch/Mips.cpp
+@@ -368,10 +368,10 @@ bool mips::isFP64ADefault(const llvm::Tr
+
+ bool mips::isFPXXDefault(const llvm::Triple &Triple, StringRef CPUName,
+ StringRef ABIName, mips::FloatABI FloatABI) {
+- if (Triple.getVendor() != llvm::Triple::ImaginationTechnologies &&
++/* if (Triple.getVendor() != llvm::Triple::ImaginationTechnologies &&
+ Triple.getVendor() != llvm::Triple::MipsTechnologies &&
+ !Triple.isAndroid())
+- return false;
++ return false;*/
+
+ if (ABIName != "32")
+ return false;
--- /dev/null
+Description: Fix missing include paths on powerpcspe
+Author: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
+Bug-Debian: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=908791
+Forwarded: https://reviews.llvm.org/D52066
+Last-Update: 2018-09-13
+
+--- llvm-toolchain-6.0-6.0.1.orig/clang/lib/Driver/ToolChains/Linux.cpp
++++ llvm-toolchain-6.0-6.0.1/clang/lib/Driver/ToolChains/Linux.cpp
+@@ -629,7 +629,8 @@ void Linux::AddClangSystemIncludeArgs(co
+ "/usr/include/mips64el-linux-gnu",
+ "/usr/include/mips64el-linux-gnuabi64"};
+ const StringRef PPCMultiarchIncludeDirs[] = {
+- "/usr/include/powerpc-linux-gnu"};
++ "/usr/include/powerpc-linux-gnu",
++ "/usr/include/powerpc-linux-gnuspe"};
+ const StringRef PPC64MultiarchIncludeDirs[] = {
+ "/usr/include/powerpc64-linux-gnu"};
+ const StringRef PPC64LEMultiarchIncludeDirs[] = {
--- /dev/null
+Index: llvm-toolchain-6.0-6.0.1/lib/CodeGen/PeepholeOptimizer.cpp
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/CodeGen/PeepholeOptimizer.cpp
++++ llvm-toolchain-6.0-6.0.1/lib/CodeGen/PeepholeOptimizer.cpp
+@@ -98,6 +98,8 @@
+ #include <utility>
+
+ using namespace llvm;
++using RegSubRegPair = TargetInstrInfo::RegSubRegPair;
++using RegSubRegPairAndIdx = TargetInstrInfo::RegSubRegPairAndIdx;
+
+ #define DEBUG_TYPE "peephole-opt"
+
+@@ -110,6 +112,9 @@ static cl::opt<bool>
+ DisablePeephole("disable-peephole", cl::Hidden, cl::init(false),
+ cl::desc("Disable the peephole optimizer"));
+
++/// Specifiy whether or not the value tracking looks through
++/// complex instructions. When this is true, the value tracker
++/// bails on everything that is not a copy or a bitcast.
+ static cl::opt<bool>
+ DisableAdvCopyOpt("disable-adv-copy-opt", cl::Hidden, cl::init(false),
+ cl::desc("Disable advanced copy optimization"));
+@@ -132,11 +137,11 @@ static cl::opt<unsigned> MaxRecurrenceCh
+ "of commuting operands"));
+
+
+-STATISTIC(NumReuse, "Number of extension results reused");
+-STATISTIC(NumCmps, "Number of compares eliminated");
+-STATISTIC(NumImmFold, "Number of move immediate folded");
+-STATISTIC(NumLoadFold, "Number of loads folded");
+-STATISTIC(NumSelects, "Number of selects optimized");
++STATISTIC(NumReuse, "Number of extension results reused");
++STATISTIC(NumCmps, "Number of compares eliminated");
++STATISTIC(NumImmFold, "Number of move immediate folded");
++STATISTIC(NumLoadFold, "Number of loads folded");
++STATISTIC(NumSelects, "Number of selects optimized");
+ STATISTIC(NumUncoalescableCopies, "Number of uncoalescable copies optimized");
+ STATISTIC(NumRewrittenCopies, "Number of copies rewritten");
+ STATISTIC(NumNAPhysCopies, "Number of non-allocatable physical copies removed");
+@@ -149,9 +154,9 @@ namespace {
+ class PeepholeOptimizer : public MachineFunctionPass {
+ const TargetInstrInfo *TII;
+ const TargetRegisterInfo *TRI;
+- MachineRegisterInfo *MRI;
+- MachineDominatorTree *DT; // Machine dominator tree
+- MachineLoopInfo *MLI;
++ MachineRegisterInfo *MRI;
++ MachineDominatorTree *DT; // Machine dominator tree
++ MachineLoopInfo *MLI;
+
+ public:
+ static char ID; // Pass identification
+@@ -173,31 +178,28 @@ namespace {
+ }
+ }
+
+- /// \brief Track Def -> Use info used for rewriting copies.
+- using RewriteMapTy =
+- SmallDenseMap<TargetInstrInfo::RegSubRegPair, ValueTrackerResult>;
++ /// Track Def -> Use info used for rewriting copies.
++ using RewriteMapTy = SmallDenseMap<RegSubRegPair, ValueTrackerResult>;
+
+- /// \brief Sequence of instructions that formulate recurrence cycle.
++ /// Sequence of instructions that formulate recurrence cycle.
+ using RecurrenceCycle = SmallVector<RecurrenceInstr, 4>;
+
+ private:
+- bool optimizeCmpInstr(MachineInstr *MI, MachineBasicBlock *MBB);
+- bool optimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB,
++ bool optimizeCmpInstr(MachineInstr &MI);
++ bool optimizeExtInstr(MachineInstr &MI, MachineBasicBlock &MBB,
+ SmallPtrSetImpl<MachineInstr*> &LocalMIs);
+- bool optimizeSelect(MachineInstr *MI,
++ bool optimizeSelect(MachineInstr &MI,
+ SmallPtrSetImpl<MachineInstr *> &LocalMIs);
+- bool optimizeCondBranch(MachineInstr *MI);
+- bool optimizeCoalescableCopy(MachineInstr *MI);
+- bool optimizeUncoalescableCopy(MachineInstr *MI,
++ bool optimizeCondBranch(MachineInstr &MI);
++ bool optimizeCoalescableCopy(MachineInstr &MI);
++ bool optimizeUncoalescableCopy(MachineInstr &MI,
+ SmallPtrSetImpl<MachineInstr *> &LocalMIs);
+ bool optimizeRecurrence(MachineInstr &PHI);
+- bool findNextSource(unsigned Reg, unsigned SubReg,
+- RewriteMapTy &RewriteMap);
+- bool isMoveImmediate(MachineInstr *MI,
++ bool findNextSource(RegSubRegPair RegSubReg, RewriteMapTy &RewriteMap);
++ bool isMoveImmediate(MachineInstr &MI,
+ SmallSet<unsigned, 4> &ImmDefRegs,
+ DenseMap<unsigned, MachineInstr*> &ImmDefMIs);
+- bool foldImmediate(MachineInstr *MI, MachineBasicBlock *MBB,
+- SmallSet<unsigned, 4> &ImmDefRegs,
++ bool foldImmediate(MachineInstr &MI, SmallSet<unsigned, 4> &ImmDefRegs,
+ DenseMap<unsigned, MachineInstr*> &ImmDefMIs);
+
+ /// \brief Finds recurrence cycles, but only ones that formulated around
+@@ -212,11 +214,11 @@ namespace {
+ /// the set \p CopySrcRegs and \p CopyMIs. If this virtual register was
+ /// previously seen as a copy, replace the uses of this copy with the
+ /// previously seen copy's destination register.
+- bool foldRedundantCopy(MachineInstr *MI,
++ bool foldRedundantCopy(MachineInstr &MI,
+ SmallSet<unsigned, 4> &CopySrcRegs,
+ DenseMap<unsigned, MachineInstr *> &CopyMIs);
+
+- /// \brief Is the register \p Reg a non-allocatable physical register?
++ /// Is the register \p Reg a non-allocatable physical register?
+ bool isNAPhysCopy(unsigned Reg);
+
+ /// \brief If copy instruction \p MI is a non-allocatable virtual<->physical
+@@ -224,11 +226,10 @@ namespace {
+ /// non-allocatable physical register was previously copied to a virtual
+ /// registered and hasn't been clobbered, the virt->phys copy can be
+ /// deleted.
+- bool foldRedundantNAPhysCopy(
+- MachineInstr *MI,
++ bool foldRedundantNAPhysCopy(MachineInstr &MI,
+ DenseMap<unsigned, MachineInstr *> &NAPhysToVirtMIs);
+
+- bool isLoadFoldable(MachineInstr *MI,
++ bool isLoadFoldable(MachineInstr &MI,
+ SmallSet<unsigned, 16> &FoldAsLoadDefCandidates);
+
+ /// \brief Check whether \p MI is understood by the register coalescer
+@@ -249,10 +250,13 @@ namespace {
+ (MI.isRegSequenceLike() || MI.isInsertSubregLike() ||
+ MI.isExtractSubregLike()));
+ }
++
++ MachineInstr &rewriteSource(MachineInstr &CopyLike,
++ RegSubRegPair Def, RewriteMapTy &RewriteMap);
+ };
+
+- /// \brief Helper class to hold instructions that are inside recurrence
+- /// cycles. The recurrence cycle is formulated around 1) a def operand and its
++ /// Helper class to hold instructions that are inside recurrence cycles.
++ /// The recurrence cycle is formulated around 1) a def operand and its
+ /// tied use operand, or 2) a def operand and a use operand that is commutable
+ /// with another use operand which is tied to the def operand. In the latter
+ /// case, index of the tied use operand and the commutable use operand are
+@@ -273,13 +277,13 @@ namespace {
+ Optional<IndexPair> CommutePair;
+ };
+
+- /// \brief Helper class to hold a reply for ValueTracker queries. Contains the
+- /// returned sources for a given search and the instructions where the sources
+- /// were tracked from.
++ /// Helper class to hold a reply for ValueTracker queries.
++ /// Contains the returned sources for a given search and the instructions
++ /// where the sources were tracked from.
+ class ValueTrackerResult {
+ private:
+ /// Track all sources found by one ValueTracker query.
+- SmallVector<TargetInstrInfo::RegSubRegPair, 2> RegSrcs;
++ SmallVector<RegSubRegPair, 2> RegSrcs;
+
+ /// Instruction using the sources in 'RegSrcs'.
+ const MachineInstr *Inst = nullptr;
+@@ -302,16 +306,20 @@ namespace {
+ }
+
+ void addSource(unsigned SrcReg, unsigned SrcSubReg) {
+- RegSrcs.push_back(TargetInstrInfo::RegSubRegPair(SrcReg, SrcSubReg));
++ RegSrcs.push_back(RegSubRegPair(SrcReg, SrcSubReg));
+ }
+
+ void setSource(int Idx, unsigned SrcReg, unsigned SrcSubReg) {
+ assert(Idx < getNumSources() && "Reg pair source out of index");
+- RegSrcs[Idx] = TargetInstrInfo::RegSubRegPair(SrcReg, SrcSubReg);
++ RegSrcs[Idx] = RegSubRegPair(SrcReg, SrcSubReg);
+ }
+
+ int getNumSources() const { return RegSrcs.size(); }
+
++ RegSubRegPair getSrc(int Idx) const {
++ return RegSrcs[Idx];
++ }
++
+ unsigned getSrcReg(int Idx) const {
+ assert(Idx < getNumSources() && "Reg source out of index");
+ return RegSrcs[Idx].Reg;
+@@ -367,59 +375,41 @@ namespace {
+ /// The register where the value can be found.
+ unsigned Reg;
+
+- /// Specifiy whether or not the value tracking looks through
+- /// complex instructions. When this is false, the value tracker
+- /// bails on everything that is not a copy or a bitcast.
+- ///
+- /// Note: This could have been implemented as a specialized version of
+- /// the ValueTracker class but that would have complicated the code of
+- /// the users of this class.
+- bool UseAdvancedTracking;
+-
+ /// MachineRegisterInfo used to perform tracking.
+ const MachineRegisterInfo &MRI;
+
+- /// Optional TargetInstrInfo used to perform some complex
+- /// tracking.
++ /// Optional TargetInstrInfo used to perform some complex tracking.
+ const TargetInstrInfo *TII;
+
+- /// \brief Dispatcher to the right underlying implementation of
+- /// getNextSource.
++ /// Dispatcher to the right underlying implementation of getNextSource.
+ ValueTrackerResult getNextSourceImpl();
+
+- /// \brief Specialized version of getNextSource for Copy instructions.
++ /// Specialized version of getNextSource for Copy instructions.
+ ValueTrackerResult getNextSourceFromCopy();
+
+- /// \brief Specialized version of getNextSource for Bitcast instructions.
++ /// Specialized version of getNextSource for Bitcast instructions.
+ ValueTrackerResult getNextSourceFromBitcast();
+
+- /// \brief Specialized version of getNextSource for RegSequence
+- /// instructions.
++ /// Specialized version of getNextSource for RegSequence instructions.
+ ValueTrackerResult getNextSourceFromRegSequence();
+
+- /// \brief Specialized version of getNextSource for InsertSubreg
+- /// instructions.
++ /// Specialized version of getNextSource for InsertSubreg instructions.
+ ValueTrackerResult getNextSourceFromInsertSubreg();
+
+- /// \brief Specialized version of getNextSource for ExtractSubreg
+- /// instructions.
++ /// Specialized version of getNextSource for ExtractSubreg instructions.
+ ValueTrackerResult getNextSourceFromExtractSubreg();
+
+- /// \brief Specialized version of getNextSource for SubregToReg
+- /// instructions.
++ /// Specialized version of getNextSource for SubregToReg instructions.
+ ValueTrackerResult getNextSourceFromSubregToReg();
+
+- /// \brief Specialized version of getNextSource for PHI instructions.
++ /// Specialized version of getNextSource for PHI instructions.
+ ValueTrackerResult getNextSourceFromPHI();
+
+ public:
+- /// \brief Create a ValueTracker instance for the value defined by \p Reg.
++ /// Create a ValueTracker instance for the value defined by \p Reg.
+ /// \p DefSubReg represents the sub register index the value tracker will
+ /// track. It does not need to match the sub register index used in the
+ /// definition of \p Reg.
+- /// \p UseAdvancedTracking specifies whether or not the value tracker looks
+- /// through complex instructions. By default (false), it handles only copy
+- /// and bitcast instructions.
+ /// If \p Reg is a physical register, a value tracker constructed with
+ /// this constructor will not find any alternative source.
+ /// Indeed, when \p Reg is a physical register that constructor does not
+@@ -427,46 +417,20 @@ namespace {
+ /// Use the next constructor to track a physical register.
+ ValueTracker(unsigned Reg, unsigned DefSubReg,
+ const MachineRegisterInfo &MRI,
+- bool UseAdvancedTracking = false,
+ const TargetInstrInfo *TII = nullptr)
+- : DefSubReg(DefSubReg), Reg(Reg),
+- UseAdvancedTracking(UseAdvancedTracking), MRI(MRI), TII(TII) {
++ : DefSubReg(DefSubReg), Reg(Reg), MRI(MRI), TII(TII) {
+ if (!TargetRegisterInfo::isPhysicalRegister(Reg)) {
+ Def = MRI.getVRegDef(Reg);
+ DefIdx = MRI.def_begin(Reg).getOperandNo();
+ }
+ }
+
+- /// \brief Create a ValueTracker instance for the value defined by
+- /// the pair \p MI, \p DefIdx.
+- /// Unlike the other constructor, the value tracker produced by this one
+- /// may be able to find a new source when the definition is a physical
+- /// register.
+- /// This could be useful to rewrite target specific instructions into
+- /// generic copy instructions.
+- ValueTracker(const MachineInstr &MI, unsigned DefIdx, unsigned DefSubReg,
+- const MachineRegisterInfo &MRI,
+- bool UseAdvancedTracking = false,
+- const TargetInstrInfo *TII = nullptr)
+- : Def(&MI), DefIdx(DefIdx), DefSubReg(DefSubReg),
+- UseAdvancedTracking(UseAdvancedTracking), MRI(MRI), TII(TII) {
+- assert(DefIdx < Def->getDesc().getNumDefs() &&
+- Def->getOperand(DefIdx).isReg() && "Invalid definition");
+- Reg = Def->getOperand(DefIdx).getReg();
+- }
+-
+ /// \brief Following the use-def chain, get the next available source
+ /// for the tracked value.
+ /// \return A ValueTrackerResult containing a set of registers
+ /// and sub registers with tracked values. A ValueTrackerResult with
+ /// an empty set of registers means no source was found.
+ ValueTrackerResult getNextSource();
+-
+- /// \brief Get the last register where the initial value can be found.
+- /// Initially this is the register of the definition.
+- /// Then, after each successful call to getNextSource, this is the
+- /// register of the last source.
+- unsigned getReg() const { return Reg; }
+ };
+
+ } // end anonymous namespace
+@@ -476,11 +440,11 @@ char PeepholeOptimizer::ID = 0;
+ char &llvm::PeepholeOptimizerID = PeepholeOptimizer::ID;
+
+ INITIALIZE_PASS_BEGIN(PeepholeOptimizer, DEBUG_TYPE,
+- "Peephole Optimizations", false, false)
++ "Peephole Optimizations", false, false)
+ INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
+ INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
+ INITIALIZE_PASS_END(PeepholeOptimizer, DEBUG_TYPE,
+- "Peephole Optimizations", false, false)
++ "Peephole Optimizations", false, false)
+
+ /// If instruction is a copy-like instruction, i.e. it reads a single register
+ /// and writes a single register and it does not modify the source, and if the
+@@ -491,10 +455,10 @@ INITIALIZE_PASS_END(PeepholeOptimizer, D
+ /// the code. Since this code does not currently share EXTRACTs, just ignore all
+ /// debug uses.
+ bool PeepholeOptimizer::
+-optimizeExtInstr(MachineInstr *MI, MachineBasicBlock *MBB,
++optimizeExtInstr(MachineInstr &MI, MachineBasicBlock &MBB,
+ SmallPtrSetImpl<MachineInstr*> &LocalMIs) {
+ unsigned SrcReg, DstReg, SubIdx;
+- if (!TII->isCoalescableExtInstr(*MI, SrcReg, DstReg, SubIdx))
++ if (!TII->isCoalescableExtInstr(MI, SrcReg, DstReg, SubIdx))
+ return false;
+
+ if (TargetRegisterInfo::isPhysicalRegister(DstReg) ||
+@@ -535,7 +499,7 @@ optimizeExtInstr(MachineInstr *MI, Machi
+ bool ExtendLife = true;
+ for (MachineOperand &UseMO : MRI->use_nodbg_operands(SrcReg)) {
+ MachineInstr *UseMI = UseMO.getParent();
+- if (UseMI == MI)
++ if (UseMI == &MI)
+ continue;
+
+ if (UseMI->isPHI()) {
+@@ -568,7 +532,7 @@ optimizeExtInstr(MachineInstr *MI, Machi
+ continue;
+
+ MachineBasicBlock *UseMBB = UseMI->getParent();
+- if (UseMBB == MBB) {
++ if (UseMBB == &MBB) {
+ // Local uses that come after the extension.
+ if (!LocalMIs.count(UseMI))
+ Uses.push_back(&UseMO);
+@@ -576,7 +540,7 @@ optimizeExtInstr(MachineInstr *MI, Machi
+ // Non-local uses where the result of the extension is used. Always
+ // replace these unless it's a PHI.
+ Uses.push_back(&UseMO);
+- } else if (Aggressive && DT->dominates(MBB, UseMBB)) {
++ } else if (Aggressive && DT->dominates(&MBB, UseMBB)) {
+ // We may want to extend the live range of the extension result in order
+ // to replace these uses.
+ ExtendedUses.push_back(&UseMO);
+@@ -640,19 +604,18 @@ optimizeExtInstr(MachineInstr *MI, Machi
+ /// against already sets (or could be modified to set) the same flag as the
+ /// compare, then we can remove the comparison and use the flag from the
+ /// previous instruction.
+-bool PeepholeOptimizer::optimizeCmpInstr(MachineInstr *MI,
+- MachineBasicBlock *MBB) {
++bool PeepholeOptimizer::optimizeCmpInstr(MachineInstr &MI) {
+ // If this instruction is a comparison against zero and isn't comparing a
+ // physical register, we can try to optimize it.
+ unsigned SrcReg, SrcReg2;
+ int CmpMask, CmpValue;
+- if (!TII->analyzeCompare(*MI, SrcReg, SrcReg2, CmpMask, CmpValue) ||
++ if (!TII->analyzeCompare(MI, SrcReg, SrcReg2, CmpMask, CmpValue) ||
+ TargetRegisterInfo::isPhysicalRegister(SrcReg) ||
+ (SrcReg2 != 0 && TargetRegisterInfo::isPhysicalRegister(SrcReg2)))
+ return false;
+
+ // Attempt to optimize the comparison instruction.
+- if (TII->optimizeCompareInstr(*MI, SrcReg, SrcReg2, CmpMask, CmpValue, MRI)) {
++ if (TII->optimizeCompareInstr(MI, SrcReg, SrcReg2, CmpMask, CmpValue, MRI)) {
+ ++NumCmps;
+ return true;
+ }
+@@ -661,27 +624,26 @@ bool PeepholeOptimizer::optimizeCmpInstr
+ }
+
+ /// Optimize a select instruction.
+-bool PeepholeOptimizer::optimizeSelect(MachineInstr *MI,
++bool PeepholeOptimizer::optimizeSelect(MachineInstr &MI,
+ SmallPtrSetImpl<MachineInstr *> &LocalMIs) {
+ unsigned TrueOp = 0;
+ unsigned FalseOp = 0;
+ bool Optimizable = false;
+ SmallVector<MachineOperand, 4> Cond;
+- if (TII->analyzeSelect(*MI, Cond, TrueOp, FalseOp, Optimizable))
++ if (TII->analyzeSelect(MI, Cond, TrueOp, FalseOp, Optimizable))
+ return false;
+ if (!Optimizable)
+ return false;
+- if (!TII->optimizeSelect(*MI, LocalMIs))
++ if (!TII->optimizeSelect(MI, LocalMIs))
+ return false;
+- MI->eraseFromParent();
++ MI.eraseFromParent();
+ ++NumSelects;
+ return true;
+ }
+
+-/// \brief Check if a simpler conditional branch can be
+-/// generated
+-bool PeepholeOptimizer::optimizeCondBranch(MachineInstr *MI) {
+- return TII->optimizeCondBranch(*MI);
++/// Check if a simpler conditional branch can be generated.
++bool PeepholeOptimizer::optimizeCondBranch(MachineInstr &MI) {
++ return TII->optimizeCondBranch(MI);
+ }
+
+ /// \brief Try to find the next source that share the same register file
+@@ -695,30 +657,29 @@ bool PeepholeOptimizer::optimizeCondBran
+ /// share the same register file as \p Reg and \p SubReg. The client should
+ /// then be capable to rewrite all intermediate PHIs to get the next source.
+ /// \return False if no alternative sources are available. True otherwise.
+-bool PeepholeOptimizer::findNextSource(unsigned Reg, unsigned SubReg,
++bool PeepholeOptimizer::findNextSource(RegSubRegPair RegSubReg,
+ RewriteMapTy &RewriteMap) {
+ // Do not try to find a new source for a physical register.
+ // So far we do not have any motivating example for doing that.
+ // Thus, instead of maintaining untested code, we will revisit that if
+ // that changes at some point.
++ unsigned Reg = RegSubReg.Reg;
+ if (TargetRegisterInfo::isPhysicalRegister(Reg))
+ return false;
+ const TargetRegisterClass *DefRC = MRI->getRegClass(Reg);
+
+- SmallVector<TargetInstrInfo::RegSubRegPair, 4> SrcToLook;
+- TargetInstrInfo::RegSubRegPair CurSrcPair(Reg, SubReg);
++ SmallVector<RegSubRegPair, 4> SrcToLook;
++ RegSubRegPair CurSrcPair = RegSubReg;
+ SrcToLook.push_back(CurSrcPair);
+
+ unsigned PHICount = 0;
+- while (!SrcToLook.empty() && PHICount < RewritePHILimit) {
+- TargetInstrInfo::RegSubRegPair Pair = SrcToLook.pop_back_val();
++ do {
++ CurSrcPair = SrcToLook.pop_back_val();
+ // As explained above, do not handle physical registers
+- if (TargetRegisterInfo::isPhysicalRegister(Pair.Reg))
++ if (TargetRegisterInfo::isPhysicalRegister(CurSrcPair.Reg))
+ return false;
+
+- CurSrcPair = Pair;
+- ValueTracker ValTracker(CurSrcPair.Reg, CurSrcPair.SubReg, *MRI,
+- !DisableAdvCopyOpt, TII);
++ ValueTracker ValTracker(CurSrcPair.Reg, CurSrcPair.SubReg, *MRI, TII);
+
+ // Follow the chain of copies until we find a more suitable source, a phi
+ // or have to abort.
+@@ -747,14 +708,17 @@ bool PeepholeOptimizer::findNextSource(u
+ unsigned NumSrcs = Res.getNumSources();
+ if (NumSrcs > 1) {
+ PHICount++;
++ if (PHICount >= RewritePHILimit) {
++ DEBUG(dbgs() << "findNextSource: PHI limit reached\n");
++ return false;
++ }
++
+ for (unsigned i = 0; i < NumSrcs; ++i)
+- SrcToLook.push_back(TargetInstrInfo::RegSubRegPair(
+- Res.getSrcReg(i), Res.getSrcSubReg(i)));
++ SrcToLook.push_back(Res.getSrc(i));
+ break;
+ }
+
+- CurSrcPair.Reg = Res.getSrcReg(0);
+- CurSrcPair.SubReg = Res.getSrcSubReg(0);
++ CurSrcPair = Res.getSrc(0);
+ // Do not extend the live-ranges of physical registers as they add
+ // constraints to the register allocator. Moreover, if we want to extend
+ // the live-range of a physical register, unlike SSA virtual register,
+@@ -764,7 +728,8 @@ bool PeepholeOptimizer::findNextSource(u
+
+ // Keep following the chain if the value isn't any better yet.
+ const TargetRegisterClass *SrcRC = MRI->getRegClass(CurSrcPair.Reg);
+- if (!TRI->shouldRewriteCopySrc(DefRC, SubReg, SrcRC, CurSrcPair.SubReg))
++ if (!TRI->shouldRewriteCopySrc(DefRC, RegSubReg.SubReg, SrcRC,
++ CurSrcPair.SubReg))
+ continue;
+
+ // We currently cannot deal with subreg operands on PHI instructions
+@@ -775,7 +740,7 @@ bool PeepholeOptimizer::findNextSource(u
+ // We found a suitable source, and are done with this chain.
+ break;
+ }
+- }
++ } while (!SrcToLook.empty());
+
+ // If we did not find a more suitable source, there is nothing to optimize.
+ return CurSrcPair.Reg != Reg;
+@@ -786,54 +751,50 @@ bool PeepholeOptimizer::findNextSource(u
+ /// successfully traverse a PHI instruction and find suitable sources coming
+ /// from its edges. By inserting a new PHI, we provide a rewritten PHI def
+ /// suitable to be used in a new COPY instruction.
+-static MachineInstr *
+-insertPHI(MachineRegisterInfo *MRI, const TargetInstrInfo *TII,
+- const SmallVectorImpl<TargetInstrInfo::RegSubRegPair> &SrcRegs,
+- MachineInstr *OrigPHI) {
++static MachineInstr &
++insertPHI(MachineRegisterInfo &MRI, const TargetInstrInfo &TII,
++ const SmallVectorImpl<RegSubRegPair> &SrcRegs,
++ MachineInstr &OrigPHI) {
+ assert(!SrcRegs.empty() && "No sources to create a PHI instruction?");
+
+- const TargetRegisterClass *NewRC = MRI->getRegClass(SrcRegs[0].Reg);
++ const TargetRegisterClass *NewRC = MRI.getRegClass(SrcRegs[0].Reg);
+ // NewRC is only correct if no subregisters are involved. findNextSource()
+ // should have rejected those cases already.
+ assert(SrcRegs[0].SubReg == 0 && "should not have subreg operand");
+- unsigned NewVR = MRI->createVirtualRegister(NewRC);
+- MachineBasicBlock *MBB = OrigPHI->getParent();
+- MachineInstrBuilder MIB = BuildMI(*MBB, OrigPHI, OrigPHI->getDebugLoc(),
+- TII->get(TargetOpcode::PHI), NewVR);
++ unsigned NewVR = MRI.createVirtualRegister(NewRC);
++ MachineBasicBlock *MBB = OrigPHI.getParent();
++ MachineInstrBuilder MIB = BuildMI(*MBB, &OrigPHI, OrigPHI.getDebugLoc(),
++ TII.get(TargetOpcode::PHI), NewVR);
+
+ unsigned MBBOpIdx = 2;
+- for (auto RegPair : SrcRegs) {
++ for (const RegSubRegPair &RegPair : SrcRegs) {
+ MIB.addReg(RegPair.Reg, 0, RegPair.SubReg);
+- MIB.addMBB(OrigPHI->getOperand(MBBOpIdx).getMBB());
++ MIB.addMBB(OrigPHI.getOperand(MBBOpIdx).getMBB());
+ // Since we're extended the lifetime of RegPair.Reg, clear the
+ // kill flags to account for that and make RegPair.Reg reaches
+ // the new PHI.
+- MRI->clearKillFlags(RegPair.Reg);
++ MRI.clearKillFlags(RegPair.Reg);
+ MBBOpIdx += 2;
+ }
+
+- return MIB;
++ return *MIB;
+ }
+
+ namespace {
+
+-/// \brief Helper class to rewrite the arguments of a copy-like instruction.
+-class CopyRewriter {
++/// Interface to query instructions amenable to copy rewriting.
++class Rewriter {
+ protected:
+- /// The copy-like instruction.
+ MachineInstr &CopyLike;
+-
+- /// The index of the source being rewritten.
+- unsigned CurrentSrcIdx = 0;
+-
++ unsigned CurrentSrcIdx = 0; ///< The index of the source being rewritten.
+ public:
+- CopyRewriter(MachineInstr &MI) : CopyLike(MI) {}
+- virtual ~CopyRewriter() = default;
++ Rewriter(MachineInstr &CopyLike) : CopyLike(CopyLike) {}
++ virtual ~Rewriter() {}
+
+ /// \brief Get the next rewritable source (SrcReg, SrcSubReg) and
+- /// the related value that it affects (TrackReg, TrackSubReg).
++ /// the related value that it affects (DstReg, DstSubReg).
+ /// A source is considered rewritable if its register class and the
+- /// register class of the related TrackReg may not be register
++ /// register class of the related DstReg may not be register
+ /// coalescer friendly. In other words, given a copy-like instruction
+ /// not all the arguments may be returned at rewritable source, since
+ /// some arguments are none to be register coalescer friendly.
+@@ -848,137 +809,72 @@ public:
+ /// the only source this instruction has:
+ /// (SrcReg, SrcSubReg) = (src, srcSubIdx).
+ /// This source defines the whole definition, i.e.,
+- /// (TrackReg, TrackSubReg) = (dst, dstSubIdx).
++ /// (DstReg, DstSubReg) = (dst, dstSubIdx).
+ ///
+ /// The second and subsequent calls will return false, as there is only one
+ /// rewritable source.
+ ///
+ /// \return True if a rewritable source has been found, false otherwise.
+ /// The output arguments are valid if and only if true is returned.
+- virtual bool getNextRewritableSource(unsigned &SrcReg, unsigned &SrcSubReg,
+- unsigned &TrackReg,
+- unsigned &TrackSubReg) {
+- // If CurrentSrcIdx == 1, this means this function has already been called
+- // once. CopyLike has one definition and one argument, thus, there is
+- // nothing else to rewrite.
+- if (!CopyLike.isCopy() || CurrentSrcIdx == 1)
++ virtual bool getNextRewritableSource(RegSubRegPair &Src,
++ RegSubRegPair &Dst) = 0;
++
++ /// Rewrite the current source with \p NewReg and \p NewSubReg if possible.
++ /// \return True if the rewriting was possible, false otherwise.
++ virtual bool RewriteCurrentSource(unsigned NewReg, unsigned NewSubReg) = 0;
++};
++
++/// Rewriter for COPY instructions.
++class CopyRewriter : public Rewriter {
++public:
++ CopyRewriter(MachineInstr &MI) : Rewriter(MI) {
++ assert(MI.isCopy() && "Expected copy instruction");
++ }
++ virtual ~CopyRewriter() = default;
++
++ bool getNextRewritableSource(RegSubRegPair &Src,
++ RegSubRegPair &Dst) override {
++ // CurrentSrcIdx > 0 means this function has already been called.
++ if (CurrentSrcIdx > 0)
+ return false;
+ // This is the first call to getNextRewritableSource.
+ // Move the CurrentSrcIdx to remember that we made that call.
+ CurrentSrcIdx = 1;
+ // The rewritable source is the argument.
+ const MachineOperand &MOSrc = CopyLike.getOperand(1);
+- SrcReg = MOSrc.getReg();
+- SrcSubReg = MOSrc.getSubReg();
++ Src = RegSubRegPair(MOSrc.getReg(), MOSrc.getSubReg());
+ // What we track are the alternative sources of the definition.
+ const MachineOperand &MODef = CopyLike.getOperand(0);
+- TrackReg = MODef.getReg();
+- TrackSubReg = MODef.getSubReg();
++ Dst = RegSubRegPair(MODef.getReg(), MODef.getSubReg());
+ return true;
+ }
+
+- /// \brief Rewrite the current source with \p NewReg and \p NewSubReg
+- /// if possible.
+- /// \return True if the rewriting was possible, false otherwise.
+- virtual bool RewriteCurrentSource(unsigned NewReg, unsigned NewSubReg) {
+- if (!CopyLike.isCopy() || CurrentSrcIdx != 1)
++ bool RewriteCurrentSource(unsigned NewReg, unsigned NewSubReg) override {
++ if (CurrentSrcIdx != 1)
+ return false;
+ MachineOperand &MOSrc = CopyLike.getOperand(CurrentSrcIdx);
+ MOSrc.setReg(NewReg);
+ MOSrc.setSubReg(NewSubReg);
+ return true;
+ }
+-
+- /// \brief Given a \p Def.Reg and Def.SubReg pair, use \p RewriteMap to find
+- /// the new source to use for rewrite. If \p HandleMultipleSources is true and
+- /// multiple sources for a given \p Def are found along the way, we found a
+- /// PHI instructions that needs to be rewritten.
+- /// TODO: HandleMultipleSources should be removed once we test PHI handling
+- /// with coalescable copies.
+- TargetInstrInfo::RegSubRegPair
+- getNewSource(MachineRegisterInfo *MRI, const TargetInstrInfo *TII,
+- TargetInstrInfo::RegSubRegPair Def,
+- PeepholeOptimizer::RewriteMapTy &RewriteMap,
+- bool HandleMultipleSources = true) {
+- TargetInstrInfo::RegSubRegPair LookupSrc(Def.Reg, Def.SubReg);
+- do {
+- ValueTrackerResult Res = RewriteMap.lookup(LookupSrc);
+- // If there are no entries on the map, LookupSrc is the new source.
+- if (!Res.isValid())
+- return LookupSrc;
+-
+- // There's only one source for this definition, keep searching...
+- unsigned NumSrcs = Res.getNumSources();
+- if (NumSrcs == 1) {
+- LookupSrc.Reg = Res.getSrcReg(0);
+- LookupSrc.SubReg = Res.getSrcSubReg(0);
+- continue;
+- }
+-
+- // TODO: Remove once multiple srcs w/ coalescable copies are supported.
+- if (!HandleMultipleSources)
+- break;
+-
+- // Multiple sources, recurse into each source to find a new source
+- // for it. Then, rewrite the PHI accordingly to its new edges.
+- SmallVector<TargetInstrInfo::RegSubRegPair, 4> NewPHISrcs;
+- for (unsigned i = 0; i < NumSrcs; ++i) {
+- TargetInstrInfo::RegSubRegPair PHISrc(Res.getSrcReg(i),
+- Res.getSrcSubReg(i));
+- NewPHISrcs.push_back(
+- getNewSource(MRI, TII, PHISrc, RewriteMap, HandleMultipleSources));
+- }
+-
+- // Build the new PHI node and return its def register as the new source.
+- MachineInstr *OrigPHI = const_cast<MachineInstr *>(Res.getInst());
+- MachineInstr *NewPHI = insertPHI(MRI, TII, NewPHISrcs, OrigPHI);
+- DEBUG(dbgs() << "-- getNewSource\n");
+- DEBUG(dbgs() << " Replacing: " << *OrigPHI);
+- DEBUG(dbgs() << " With: " << *NewPHI);
+- const MachineOperand &MODef = NewPHI->getOperand(0);
+- return TargetInstrInfo::RegSubRegPair(MODef.getReg(), MODef.getSubReg());
+-
+- } while (true);
+-
+- return TargetInstrInfo::RegSubRegPair(0, 0);
+- }
+-
+- /// \brief Rewrite the source found through \p Def, by using the \p RewriteMap
+- /// and create a new COPY instruction. More info about RewriteMap in
+- /// PeepholeOptimizer::findNextSource. Right now this is only used to handle
+- /// Uncoalescable copies, since they are copy like instructions that aren't
+- /// recognized by the register allocator.
+- virtual MachineInstr *
+- RewriteSource(TargetInstrInfo::RegSubRegPair Def,
+- PeepholeOptimizer::RewriteMapTy &RewriteMap) {
+- return nullptr;
+- }
+ };
+
+ /// \brief Helper class to rewrite uncoalescable copy like instructions
+ /// into new COPY (coalescable friendly) instructions.
+-class UncoalescableRewriter : public CopyRewriter {
+-protected:
+- const TargetInstrInfo &TII;
+- MachineRegisterInfo &MRI;
+-
+- /// The number of defs in the bitcast
+- unsigned NumDefs;
++class UncoalescableRewriter : public Rewriter {
++ unsigned NumDefs; ///< Number of defs in the bitcast.
+
+ public:
+- UncoalescableRewriter(MachineInstr &MI, const TargetInstrInfo &TII,
+- MachineRegisterInfo &MRI)
+- : CopyRewriter(MI), TII(TII), MRI(MRI) {
++ UncoalescableRewriter(MachineInstr &MI) : Rewriter(MI) {
+ NumDefs = MI.getDesc().getNumDefs();
+ }
+
+- /// \brief Get the next rewritable def source (TrackReg, TrackSubReg)
++ /// \see See Rewriter::getNextRewritableSource()
+ /// All such sources need to be considered rewritable in order to
+ /// rewrite a uncoalescable copy-like instruction. This method return
+ /// each definition that must be checked if rewritable.
+- bool getNextRewritableSource(unsigned &SrcReg, unsigned &SrcSubReg,
+- unsigned &TrackReg,
+- unsigned &TrackSubReg) override {
++ bool getNextRewritableSource(RegSubRegPair &Src,
++ RegSubRegPair &Dst) override {
+ // Find the next non-dead definition and continue from there.
+ if (CurrentSrcIdx == NumDefs)
+ return false;
+@@ -990,64 +886,27 @@ public:
+ }
+
+ // What we track are the alternative sources of the definition.
++ Src = RegSubRegPair(0, 0);
+ const MachineOperand &MODef = CopyLike.getOperand(CurrentSrcIdx);
+- TrackReg = MODef.getReg();
+- TrackSubReg = MODef.getSubReg();
++ Dst = RegSubRegPair(MODef.getReg(), MODef.getSubReg());
+
+ CurrentSrcIdx++;
+ return true;
+ }
+
+- /// \brief Rewrite the source found through \p Def, by using the \p RewriteMap
+- /// and create a new COPY instruction. More info about RewriteMap in
+- /// PeepholeOptimizer::findNextSource. Right now this is only used to handle
+- /// Uncoalescable copies, since they are copy like instructions that aren't
+- /// recognized by the register allocator.
+- MachineInstr *
+- RewriteSource(TargetInstrInfo::RegSubRegPair Def,
+- PeepholeOptimizer::RewriteMapTy &RewriteMap) override {
+- assert(!TargetRegisterInfo::isPhysicalRegister(Def.Reg) &&
+- "We do not rewrite physical registers");
+-
+- // Find the new source to use in the COPY rewrite.
+- TargetInstrInfo::RegSubRegPair NewSrc =
+- getNewSource(&MRI, &TII, Def, RewriteMap);
+-
+- // Insert the COPY.
+- const TargetRegisterClass *DefRC = MRI.getRegClass(Def.Reg);
+- unsigned NewVR = MRI.createVirtualRegister(DefRC);
+-
+- MachineInstr *NewCopy =
+- BuildMI(*CopyLike.getParent(), &CopyLike, CopyLike.getDebugLoc(),
+- TII.get(TargetOpcode::COPY), NewVR)
+- .addReg(NewSrc.Reg, 0, NewSrc.SubReg);
+-
+- NewCopy->getOperand(0).setSubReg(Def.SubReg);
+- if (Def.SubReg)
+- NewCopy->getOperand(0).setIsUndef();
+-
+- DEBUG(dbgs() << "-- RewriteSource\n");
+- DEBUG(dbgs() << " Replacing: " << CopyLike);
+- DEBUG(dbgs() << " With: " << *NewCopy);
+- MRI.replaceRegWith(Def.Reg, NewVR);
+- MRI.clearKillFlags(NewVR);
+-
+- // We extended the lifetime of NewSrc.Reg, clear the kill flags to
+- // account for that.
+- MRI.clearKillFlags(NewSrc.Reg);
+-
+- return NewCopy;
++ bool RewriteCurrentSource(unsigned NewReg, unsigned NewSubReg) override {
++ return false;
+ }
+ };
+
+-/// \brief Specialized rewriter for INSERT_SUBREG instruction.
+-class InsertSubregRewriter : public CopyRewriter {
++/// Specialized rewriter for INSERT_SUBREG instruction.
++class InsertSubregRewriter : public Rewriter {
+ public:
+- InsertSubregRewriter(MachineInstr &MI) : CopyRewriter(MI) {
++ InsertSubregRewriter(MachineInstr &MI) : Rewriter(MI) {
+ assert(MI.isInsertSubreg() && "Invalid instruction");
+ }
+
+- /// \brief See CopyRewriter::getNextRewritableSource.
++ /// \see See Rewriter::getNextRewritableSource()
+ /// Here CopyLike has the following form:
+ /// dst = INSERT_SUBREG Src1, Src2.src2SubIdx, subIdx.
+ /// Src1 has the same register class has dst, hence, there is
+@@ -1055,29 +914,27 @@ public:
+ /// Src2.src2SubIdx, may not be register coalescer friendly.
+ /// Therefore, the first call to this method returns:
+ /// (SrcReg, SrcSubReg) = (Src2, src2SubIdx).
+- /// (TrackReg, TrackSubReg) = (dst, subIdx).
++ /// (DstReg, DstSubReg) = (dst, subIdx).
+ ///
+ /// Subsequence calls will return false.
+- bool getNextRewritableSource(unsigned &SrcReg, unsigned &SrcSubReg,
+- unsigned &TrackReg,
+- unsigned &TrackSubReg) override {
++ bool getNextRewritableSource(RegSubRegPair &Src,
++ RegSubRegPair &Dst) override {
+ // If we already get the only source we can rewrite, return false.
+ if (CurrentSrcIdx == 2)
+ return false;
+ // We are looking at v2 = INSERT_SUBREG v0, v1, sub0.
+ CurrentSrcIdx = 2;
+ const MachineOperand &MOInsertedReg = CopyLike.getOperand(2);
+- SrcReg = MOInsertedReg.getReg();
+- SrcSubReg = MOInsertedReg.getSubReg();
++ Src = RegSubRegPair(MOInsertedReg.getReg(), MOInsertedReg.getSubReg());
+ const MachineOperand &MODef = CopyLike.getOperand(0);
+
+ // We want to track something that is compatible with the
+ // partial definition.
+- TrackReg = MODef.getReg();
+ if (MODef.getSubReg())
+ // Bail if we have to compose sub-register indices.
+ return false;
+- TrackSubReg = (unsigned)CopyLike.getOperand(3).getImm();
++ Dst = RegSubRegPair(MODef.getReg(),
++ (unsigned)CopyLike.getOperand(3).getImm());
+ return true;
+ }
+
+@@ -1092,41 +949,39 @@ public:
+ }
+ };
+
+-/// \brief Specialized rewriter for EXTRACT_SUBREG instruction.
+-class ExtractSubregRewriter : public CopyRewriter {
++/// Specialized rewriter for EXTRACT_SUBREG instruction.
++class ExtractSubregRewriter : public Rewriter {
+ const TargetInstrInfo &TII;
+
+ public:
+ ExtractSubregRewriter(MachineInstr &MI, const TargetInstrInfo &TII)
+- : CopyRewriter(MI), TII(TII) {
++ : Rewriter(MI), TII(TII) {
+ assert(MI.isExtractSubreg() && "Invalid instruction");
+ }
+
+- /// \brief See CopyRewriter::getNextRewritableSource.
++ /// \see Rewriter::getNextRewritableSource()
+ /// Here CopyLike has the following form:
+ /// dst.dstSubIdx = EXTRACT_SUBREG Src, subIdx.
+ /// There is only one rewritable source: Src.subIdx,
+ /// which defines dst.dstSubIdx.
+- bool getNextRewritableSource(unsigned &SrcReg, unsigned &SrcSubReg,
+- unsigned &TrackReg,
+- unsigned &TrackSubReg) override {
++ bool getNextRewritableSource(RegSubRegPair &Src,
++ RegSubRegPair &Dst) override {
+ // If we already get the only source we can rewrite, return false.
+ if (CurrentSrcIdx == 1)
+ return false;
+ // We are looking at v1 = EXTRACT_SUBREG v0, sub0.
+ CurrentSrcIdx = 1;
+ const MachineOperand &MOExtractedReg = CopyLike.getOperand(1);
+- SrcReg = MOExtractedReg.getReg();
+ // If we have to compose sub-register indices, bail out.
+ if (MOExtractedReg.getSubReg())
+ return false;
+
+- SrcSubReg = CopyLike.getOperand(2).getImm();
++ Src = RegSubRegPair(MOExtractedReg.getReg(),
++ CopyLike.getOperand(2).getImm());
+
+ // We want to track something that is compatible with the definition.
+ const MachineOperand &MODef = CopyLike.getOperand(0);
+- TrackReg = MODef.getReg();
+- TrackSubReg = MODef.getSubReg();
++ Dst = RegSubRegPair(MODef.getReg(), MODef.getSubReg());
+ return true;
+ }
+
+@@ -1156,14 +1011,14 @@ public:
+ }
+ };
+
+-/// \brief Specialized rewriter for REG_SEQUENCE instruction.
+-class RegSequenceRewriter : public CopyRewriter {
++/// Specialized rewriter for REG_SEQUENCE instruction.
++class RegSequenceRewriter : public Rewriter {
+ public:
+- RegSequenceRewriter(MachineInstr &MI) : CopyRewriter(MI) {
++ RegSequenceRewriter(MachineInstr &MI) : Rewriter(MI) {
+ assert(MI.isRegSequence() && "Invalid instruction");
+ }
+
+- /// \brief See CopyRewriter::getNextRewritableSource.
++ /// \see Rewriter::getNextRewritableSource()
+ /// Here CopyLike has the following form:
+ /// dst = REG_SEQUENCE Src1.src1SubIdx, subIdx1, Src2.src2SubIdx, subIdx2.
+ /// Each call will return a different source, walking all the available
+@@ -1171,17 +1026,16 @@ public:
+ ///
+ /// The first call returns:
+ /// (SrcReg, SrcSubReg) = (Src1, src1SubIdx).
+- /// (TrackReg, TrackSubReg) = (dst, subIdx1).
++ /// (DstReg, DstSubReg) = (dst, subIdx1).
+ ///
+ /// The second call returns:
+ /// (SrcReg, SrcSubReg) = (Src2, src2SubIdx).
+- /// (TrackReg, TrackSubReg) = (dst, subIdx2).
++ /// (DstReg, DstSubReg) = (dst, subIdx2).
+ ///
+ /// And so on, until all the sources have been traversed, then
+ /// it returns false.
+- bool getNextRewritableSource(unsigned &SrcReg, unsigned &SrcSubReg,
+- unsigned &TrackReg,
+- unsigned &TrackSubReg) override {
++ bool getNextRewritableSource(RegSubRegPair &Src,
++ RegSubRegPair &Dst) override {
+ // We are looking at v0 = REG_SEQUENCE v1, sub1, v2, sub2, etc.
+
+ // If this is the first call, move to the first argument.
+@@ -1194,17 +1048,17 @@ public:
+ return false;
+ }
+ const MachineOperand &MOInsertedReg = CopyLike.getOperand(CurrentSrcIdx);
+- SrcReg = MOInsertedReg.getReg();
++ Src.Reg = MOInsertedReg.getReg();
+ // If we have to compose sub-register indices, bail out.
+- if ((SrcSubReg = MOInsertedReg.getSubReg()))
++ if ((Src.SubReg = MOInsertedReg.getSubReg()))
+ return false;
+
+ // We want to track something that is compatible with the related
+ // partial definition.
+- TrackSubReg = CopyLike.getOperand(CurrentSrcIdx + 1).getImm();
++ Dst.SubReg = CopyLike.getOperand(CurrentSrcIdx + 1).getImm();
+
+ const MachineOperand &MODef = CopyLike.getOperand(0);
+- TrackReg = MODef.getReg();
++ Dst.Reg = MODef.getReg();
+ // If we have to compose sub-registers, bail.
+ return MODef.getSubReg() == 0;
+ }
+@@ -1224,16 +1078,14 @@ public:
+
+ } // end anonymous namespace
+
+-/// \brief Get the appropriated CopyRewriter for \p MI.
+-/// \return A pointer to a dynamically allocated CopyRewriter or nullptr
+-/// if no rewriter works for \p MI.
+-static CopyRewriter *getCopyRewriter(MachineInstr &MI,
+- const TargetInstrInfo &TII,
+- MachineRegisterInfo &MRI) {
++/// Get the appropriated Rewriter for \p MI.
++/// \return A pointer to a dynamically allocated Rewriter or nullptr if no
++/// rewriter works for \p MI.
++static Rewriter *getCopyRewriter(MachineInstr &MI, const TargetInstrInfo &TII) {
+ // Handle uncoalescable copy-like instructions.
+- if (MI.isBitcast() || (MI.isRegSequenceLike() || MI.isInsertSubregLike() ||
+- MI.isExtractSubregLike()))
+- return new UncoalescableRewriter(MI, TII, MRI);
++ if (MI.isBitcast() || MI.isRegSequenceLike() || MI.isInsertSubregLike() ||
++ MI.isExtractSubregLike())
++ return new UncoalescableRewriter(MI);
+
+ switch (MI.getOpcode()) {
+ default:
+@@ -1247,53 +1099,102 @@ static CopyRewriter *getCopyRewriter(Mac
+ case TargetOpcode::REG_SEQUENCE:
+ return new RegSequenceRewriter(MI);
+ }
+- llvm_unreachable(nullptr);
+ }
+
+-/// \brief Optimize generic copy instructions to avoid cross
+-/// register bank copy. The optimization looks through a chain of
+-/// copies and tries to find a source that has a compatible register
+-/// class.
+-/// Two register classes are considered to be compatible if they share
+-/// the same register bank.
++/// \brief Given a \p Def.Reg and Def.SubReg pair, use \p RewriteMap to find
++/// the new source to use for rewrite. If \p HandleMultipleSources is true and
++/// multiple sources for a given \p Def are found along the way, we found a
++/// PHI instructions that needs to be rewritten.
++/// TODO: HandleMultipleSources should be removed once we test PHI handling
++/// with coalescable copies.
++static RegSubRegPair
++getNewSource(MachineRegisterInfo *MRI, const TargetInstrInfo *TII,
++ RegSubRegPair Def,
++ const PeepholeOptimizer::RewriteMapTy &RewriteMap,
++ bool HandleMultipleSources = true) {
++ RegSubRegPair LookupSrc(Def.Reg, Def.SubReg);
++ while (true) {
++ ValueTrackerResult Res = RewriteMap.lookup(LookupSrc);
++ // If there are no entries on the map, LookupSrc is the new source.
++ if (!Res.isValid())
++ return LookupSrc;
++
++ // There's only one source for this definition, keep searching...
++ unsigned NumSrcs = Res.getNumSources();
++ if (NumSrcs == 1) {
++ LookupSrc.Reg = Res.getSrcReg(0);
++ LookupSrc.SubReg = Res.getSrcSubReg(0);
++ continue;
++ }
++
++ // TODO: Remove once multiple srcs w/ coalescable copies are supported.
++ if (!HandleMultipleSources)
++ break;
++
++ // Multiple sources, recurse into each source to find a new source
++ // for it. Then, rewrite the PHI accordingly to its new edges.
++ SmallVector<RegSubRegPair, 4> NewPHISrcs;
++ for (unsigned i = 0; i < NumSrcs; ++i) {
++ RegSubRegPair PHISrc(Res.getSrcReg(i), Res.getSrcSubReg(i));
++ NewPHISrcs.push_back(
++ getNewSource(MRI, TII, PHISrc, RewriteMap, HandleMultipleSources));
++ }
++
++ // Build the new PHI node and return its def register as the new source.
++ MachineInstr &OrigPHI = const_cast<MachineInstr &>(*Res.getInst());
++ MachineInstr &NewPHI = insertPHI(*MRI, *TII, NewPHISrcs, OrigPHI);
++ DEBUG(dbgs() << "-- getNewSource\n");
++ DEBUG(dbgs() << " Replacing: " << OrigPHI);
++ DEBUG(dbgs() << " With: " << NewPHI);
++ const MachineOperand &MODef = NewPHI.getOperand(0);
++ return RegSubRegPair(MODef.getReg(), MODef.getSubReg());
++ }
++
++ return RegSubRegPair(0, 0);
++}
++
++/// Optimize generic copy instructions to avoid cross register bank copy.
++/// The optimization looks through a chain of copies and tries to find a source
++/// that has a compatible register class.
++/// Two register classes are considered to be compatible if they share the same
++/// register bank.
+ /// New copies issued by this optimization are register allocator
+ /// friendly. This optimization does not remove any copy as it may
+ /// overconstrain the register allocator, but replaces some operands
+ /// when possible.
+ /// \pre isCoalescableCopy(*MI) is true.
+ /// \return True, when \p MI has been rewritten. False otherwise.
+-bool PeepholeOptimizer::optimizeCoalescableCopy(MachineInstr *MI) {
+- assert(MI && isCoalescableCopy(*MI) && "Invalid argument");
+- assert(MI->getDesc().getNumDefs() == 1 &&
++bool PeepholeOptimizer::optimizeCoalescableCopy(MachineInstr &MI) {
++ assert(isCoalescableCopy(MI) && "Invalid argument");
++ assert(MI.getDesc().getNumDefs() == 1 &&
+ "Coalescer can understand multiple defs?!");
+- const MachineOperand &MODef = MI->getOperand(0);
++ const MachineOperand &MODef = MI.getOperand(0);
+ // Do not rewrite physical definitions.
+ if (TargetRegisterInfo::isPhysicalRegister(MODef.getReg()))
+ return false;
+
+ bool Changed = false;
+ // Get the right rewriter for the current copy.
+- std::unique_ptr<CopyRewriter> CpyRewriter(getCopyRewriter(*MI, *TII, *MRI));
++ std::unique_ptr<Rewriter> CpyRewriter(getCopyRewriter(MI, *TII));
+ // If none exists, bail out.
+ if (!CpyRewriter)
+ return false;
+ // Rewrite each rewritable source.
+- unsigned SrcReg, SrcSubReg, TrackReg, TrackSubReg;
+- while (CpyRewriter->getNextRewritableSource(SrcReg, SrcSubReg, TrackReg,
+- TrackSubReg)) {
++ RegSubRegPair Src;
++ RegSubRegPair TrackPair;
++ while (CpyRewriter->getNextRewritableSource(Src, TrackPair)) {
+ // Keep track of PHI nodes and its incoming edges when looking for sources.
+ RewriteMapTy RewriteMap;
+ // Try to find a more suitable source. If we failed to do so, or get the
+ // actual source, move to the next source.
+- if (!findNextSource(TrackReg, TrackSubReg, RewriteMap))
++ if (!findNextSource(TrackPair, RewriteMap))
+ continue;
+
+ // Get the new source to rewrite. TODO: Only enable handling of multiple
+ // sources (PHIs) once we have a motivating example and testcases for it.
+- TargetInstrInfo::RegSubRegPair TrackPair(TrackReg, TrackSubReg);
+- TargetInstrInfo::RegSubRegPair NewSrc = CpyRewriter->getNewSource(
+- MRI, TII, TrackPair, RewriteMap, false /* multiple sources */);
+- if (SrcReg == NewSrc.Reg || NewSrc.Reg == 0)
++ RegSubRegPair NewSrc = getNewSource(MRI, TII, TrackPair, RewriteMap,
++ /*HandleMultipleSources=*/false);
++ if (Src.Reg == NewSrc.Reg || NewSrc.Reg == 0)
+ continue;
+
+ // Rewrite source.
+@@ -1312,6 +1213,47 @@ bool PeepholeOptimizer::optimizeCoalesca
+ return Changed;
+ }
+
++/// \brief Rewrite the source found through \p Def, by using the \p RewriteMap
++/// and create a new COPY instruction. More info about RewriteMap in
++/// PeepholeOptimizer::findNextSource. Right now this is only used to handle
++/// Uncoalescable copies, since they are copy like instructions that aren't
++/// recognized by the register allocator.
++MachineInstr &
++PeepholeOptimizer::rewriteSource(MachineInstr &CopyLike,
++ RegSubRegPair Def, RewriteMapTy &RewriteMap) {
++ assert(!TargetRegisterInfo::isPhysicalRegister(Def.Reg) &&
++ "We do not rewrite physical registers");
++
++ // Find the new source to use in the COPY rewrite.
++ RegSubRegPair NewSrc = getNewSource(MRI, TII, Def, RewriteMap);
++
++ // Insert the COPY.
++ const TargetRegisterClass *DefRC = MRI->getRegClass(Def.Reg);
++ unsigned NewVReg = MRI->createVirtualRegister(DefRC);
++
++ MachineInstr *NewCopy =
++ BuildMI(*CopyLike.getParent(), &CopyLike, CopyLike.getDebugLoc(),
++ TII->get(TargetOpcode::COPY), NewVReg)
++ .addReg(NewSrc.Reg, 0, NewSrc.SubReg);
++
++ if (Def.SubReg) {
++ NewCopy->getOperand(0).setSubReg(Def.SubReg);
++ NewCopy->getOperand(0).setIsUndef();
++ }
++
++ DEBUG(dbgs() << "-- RewriteSource\n");
++ DEBUG(dbgs() << " Replacing: " << CopyLike);
++ DEBUG(dbgs() << " With: " << *NewCopy);
++ MRI->replaceRegWith(Def.Reg, NewVReg);
++ MRI->clearKillFlags(NewVReg);
++
++ // We extended the lifetime of NewSrc.Reg, clear the kill flags to
++ // account for that.
++ MRI->clearKillFlags(NewSrc.Reg);
++
++ return *NewCopy;
++}
++
+ /// \brief Optimize copy-like instructions to create
+ /// register coalescer friendly instruction.
+ /// The optimization tries to kill-off the \p MI by looking
+@@ -1324,48 +1266,40 @@ bool PeepholeOptimizer::optimizeCoalesca
+ /// been removed from its parent.
+ /// All COPY instructions created, are inserted in \p LocalMIs.
+ bool PeepholeOptimizer::optimizeUncoalescableCopy(
+- MachineInstr *MI, SmallPtrSetImpl<MachineInstr *> &LocalMIs) {
+- assert(MI && isUncoalescableCopy(*MI) && "Invalid argument");
+-
+- // Check if we can rewrite all the values defined by this instruction.
+- SmallVector<TargetInstrInfo::RegSubRegPair, 4> RewritePairs;
+- // Get the right rewriter for the current copy.
+- std::unique_ptr<CopyRewriter> CpyRewriter(getCopyRewriter(*MI, *TII, *MRI));
+- // If none exists, bail out.
+- if (!CpyRewriter)
+- return false;
++ MachineInstr &MI, SmallPtrSetImpl<MachineInstr *> &LocalMIs) {
++ assert(isUncoalescableCopy(MI) && "Invalid argument");
++ UncoalescableRewriter CpyRewriter(MI);
+
+ // Rewrite each rewritable source by generating new COPYs. This works
+ // differently from optimizeCoalescableCopy since it first makes sure that all
+ // definitions can be rewritten.
+ RewriteMapTy RewriteMap;
+- unsigned Reg, SubReg, CopyDefReg, CopyDefSubReg;
+- while (CpyRewriter->getNextRewritableSource(Reg, SubReg, CopyDefReg,
+- CopyDefSubReg)) {
++ RegSubRegPair Src;
++ RegSubRegPair Def;
++ SmallVector<RegSubRegPair, 4> RewritePairs;
++ while (CpyRewriter.getNextRewritableSource(Src, Def)) {
+ // If a physical register is here, this is probably for a good reason.
+ // Do not rewrite that.
+- if (TargetRegisterInfo::isPhysicalRegister(CopyDefReg))
++ if (TargetRegisterInfo::isPhysicalRegister(Def.Reg))
+ return false;
+
+ // If we do not know how to rewrite this definition, there is no point
+ // in trying to kill this instruction.
+- TargetInstrInfo::RegSubRegPair Def(CopyDefReg, CopyDefSubReg);
+- if (!findNextSource(Def.Reg, Def.SubReg, RewriteMap))
++ if (!findNextSource(Def, RewriteMap))
+ return false;
+
+ RewritePairs.push_back(Def);
+ }
+
+ // The change is possible for all defs, do it.
+- for (const auto &Def : RewritePairs) {
++ for (const RegSubRegPair &Def : RewritePairs) {
+ // Rewrite the "copy" in a way the register coalescer understands.
+- MachineInstr *NewCopy = CpyRewriter->RewriteSource(Def, RewriteMap);
+- assert(NewCopy && "Should be able to always generate a new copy");
+- LocalMIs.insert(NewCopy);
++ MachineInstr &NewCopy = rewriteSource(MI, Def, RewriteMap);
++ LocalMIs.insert(&NewCopy);
+ }
+
+ // MI is now dead.
+- MI->eraseFromParent();
++ MI.eraseFromParent();
+ ++NumUncoalescableCopies;
+ return true;
+ }
+@@ -1374,18 +1308,18 @@ bool PeepholeOptimizer::optimizeUncoales
+ /// We only fold loads to virtual registers and the virtual register defined
+ /// has a single use.
+ bool PeepholeOptimizer::isLoadFoldable(
+- MachineInstr *MI, SmallSet<unsigned, 16> &FoldAsLoadDefCandidates) {
+- if (!MI->canFoldAsLoad() || !MI->mayLoad())
++ MachineInstr &MI, SmallSet<unsigned, 16> &FoldAsLoadDefCandidates) {
++ if (!MI.canFoldAsLoad() || !MI.mayLoad())
+ return false;
+- const MCInstrDesc &MCID = MI->getDesc();
++ const MCInstrDesc &MCID = MI.getDesc();
+ if (MCID.getNumDefs() != 1)
+ return false;
+
+- unsigned Reg = MI->getOperand(0).getReg();
++ unsigned Reg = MI.getOperand(0).getReg();
+ // To reduce compilation time, we check MRI->hasOneNonDBGUse when inserting
+ // loads. It should be checked when processing uses of the load, since
+ // uses can be removed during peephole.
+- if (!MI->getOperand(0).getSubReg() &&
++ if (!MI.getOperand(0).getSubReg() &&
+ TargetRegisterInfo::isVirtualRegister(Reg) &&
+ MRI->hasOneNonDBGUse(Reg)) {
+ FoldAsLoadDefCandidates.insert(Reg);
+@@ -1395,16 +1329,16 @@ bool PeepholeOptimizer::isLoadFoldable(
+ }
+
+ bool PeepholeOptimizer::isMoveImmediate(
+- MachineInstr *MI, SmallSet<unsigned, 4> &ImmDefRegs,
++ MachineInstr &MI, SmallSet<unsigned, 4> &ImmDefRegs,
+ DenseMap<unsigned, MachineInstr *> &ImmDefMIs) {
+- const MCInstrDesc &MCID = MI->getDesc();
+- if (!MI->isMoveImmediate())
++ const MCInstrDesc &MCID = MI.getDesc();
++ if (!MI.isMoveImmediate())
+ return false;
+ if (MCID.getNumDefs() != 1)
+ return false;
+- unsigned Reg = MI->getOperand(0).getReg();
++ unsigned Reg = MI.getOperand(0).getReg();
+ if (TargetRegisterInfo::isVirtualRegister(Reg)) {
+- ImmDefMIs.insert(std::make_pair(Reg, MI));
++ ImmDefMIs.insert(std::make_pair(Reg, &MI));
+ ImmDefRegs.insert(Reg);
+ return true;
+ }
+@@ -1415,11 +1349,11 @@ bool PeepholeOptimizer::isMoveImmediate(
+ /// Try folding register operands that are defined by move immediate
+ /// instructions, i.e. a trivial constant folding optimization, if
+ /// and only if the def and use are in the same BB.
+-bool PeepholeOptimizer::foldImmediate(
+- MachineInstr *MI, MachineBasicBlock *MBB, SmallSet<unsigned, 4> &ImmDefRegs,
++bool PeepholeOptimizer::foldImmediate(MachineInstr &MI,
++ SmallSet<unsigned, 4> &ImmDefRegs,
+ DenseMap<unsigned, MachineInstr *> &ImmDefMIs) {
+- for (unsigned i = 0, e = MI->getDesc().getNumOperands(); i != e; ++i) {
+- MachineOperand &MO = MI->getOperand(i);
++ for (unsigned i = 0, e = MI.getDesc().getNumOperands(); i != e; ++i) {
++ MachineOperand &MO = MI.getOperand(i);
+ if (!MO.isReg() || MO.isDef())
+ continue;
+ // Ignore dead implicit defs.
+@@ -1432,7 +1366,7 @@ bool PeepholeOptimizer::foldImmediate(
+ continue;
+ DenseMap<unsigned, MachineInstr*>::iterator II = ImmDefMIs.find(Reg);
+ assert(II != ImmDefMIs.end() && "couldn't find immediate definition");
+- if (TII->FoldImmediate(*MI, *II->second, Reg, MRI)) {
++ if (TII->FoldImmediate(MI, *II->second, Reg, MRI)) {
+ ++NumImmFold;
+ return true;
+ }
+@@ -1454,28 +1388,28 @@ bool PeepholeOptimizer::foldImmediate(
+ // %2 = COPY %0:sub1
+ //
+ // Should replace %2 uses with %1:sub1
+-bool PeepholeOptimizer::foldRedundantCopy(
+- MachineInstr *MI, SmallSet<unsigned, 4> &CopySrcRegs,
++bool PeepholeOptimizer::foldRedundantCopy(MachineInstr &MI,
++ SmallSet<unsigned, 4> &CopySrcRegs,
+ DenseMap<unsigned, MachineInstr *> &CopyMIs) {
+- assert(MI->isCopy() && "expected a COPY machine instruction");
++ assert(MI.isCopy() && "expected a COPY machine instruction");
+
+- unsigned SrcReg = MI->getOperand(1).getReg();
++ unsigned SrcReg = MI.getOperand(1).getReg();
+ if (!TargetRegisterInfo::isVirtualRegister(SrcReg))
+ return false;
+
+- unsigned DstReg = MI->getOperand(0).getReg();
++ unsigned DstReg = MI.getOperand(0).getReg();
+ if (!TargetRegisterInfo::isVirtualRegister(DstReg))
+ return false;
+
+ if (CopySrcRegs.insert(SrcReg).second) {
+ // First copy of this reg seen.
+- CopyMIs.insert(std::make_pair(SrcReg, MI));
++ CopyMIs.insert(std::make_pair(SrcReg, &MI));
+ return false;
+ }
+
+ MachineInstr *PrevCopy = CopyMIs.find(SrcReg)->second;
+
+- unsigned SrcSubReg = MI->getOperand(1).getSubReg();
++ unsigned SrcSubReg = MI.getOperand(1).getSubReg();
+ unsigned PrevSrcSubReg = PrevCopy->getOperand(1).getSubReg();
+
+ // Can't replace different subregister extracts.
+@@ -1504,19 +1438,19 @@ bool PeepholeOptimizer::isNAPhysCopy(uns
+ }
+
+ bool PeepholeOptimizer::foldRedundantNAPhysCopy(
+- MachineInstr *MI, DenseMap<unsigned, MachineInstr *> &NAPhysToVirtMIs) {
+- assert(MI->isCopy() && "expected a COPY machine instruction");
++ MachineInstr &MI, DenseMap<unsigned, MachineInstr *> &NAPhysToVirtMIs) {
++ assert(MI.isCopy() && "expected a COPY machine instruction");
+
+ if (DisableNAPhysCopyOpt)
+ return false;
+
+- unsigned DstReg = MI->getOperand(0).getReg();
+- unsigned SrcReg = MI->getOperand(1).getReg();
++ unsigned DstReg = MI.getOperand(0).getReg();
++ unsigned SrcReg = MI.getOperand(1).getReg();
+ if (isNAPhysCopy(SrcReg) && TargetRegisterInfo::isVirtualRegister(DstReg)) {
+ // %vreg = COPY %physreg
+ // Avoid using a datastructure which can track multiple live non-allocatable
+ // phys->virt copies since LLVM doesn't seem to do this.
+- NAPhysToVirtMIs.insert({SrcReg, MI});
++ NAPhysToVirtMIs.insert({SrcReg, &MI});
+ return false;
+ }
+
+@@ -1528,8 +1462,7 @@ bool PeepholeOptimizer::foldRedundantNAP
+ if (PrevCopy == NAPhysToVirtMIs.end()) {
+ // We can't remove the copy: there was an intervening clobber of the
+ // non-allocatable physical register after the copy to virtual.
+- DEBUG(dbgs() << "NAPhysCopy: intervening clobber forbids erasing " << *MI
+- << '\n');
++ DEBUG(dbgs() << "NAPhysCopy: intervening clobber forbids erasing " << MI);
+ return false;
+ }
+
+@@ -1537,7 +1470,7 @@ bool PeepholeOptimizer::foldRedundantNAP
+ if (PrevDstReg == SrcReg) {
+ // Remove the virt->phys copy: we saw the virtual register definition, and
+ // the non-allocatable physical register's state hasn't changed since then.
+- DEBUG(dbgs() << "NAPhysCopy: erasing " << *MI << '\n');
++ DEBUG(dbgs() << "NAPhysCopy: erasing " << MI);
+ ++NumNAPhysCopies;
+ return true;
+ }
+@@ -1546,7 +1479,7 @@ bool PeepholeOptimizer::foldRedundantNAP
+ // register get a copy of the non-allocatable physical register, and we only
+ // track one such copy. Avoid getting confused by this new non-allocatable
+ // physical register definition, and remove it from the tracked copies.
+- DEBUG(dbgs() << "NAPhysCopy: missed opportunity " << *MI << '\n');
++ DEBUG(dbgs() << "NAPhysCopy: missed opportunity " << MI);
+ NAPhysToVirtMIs.erase(PrevCopy);
+ return false;
+ }
+@@ -1611,11 +1544,11 @@ bool PeepholeOptimizer::findTargetRecurr
+ return false;
+ }
+
+-/// \brief Phi instructions will eventually be lowered to copy instructions. If
+-/// phi is in a loop header, a recurrence may formulated around the source and
+-/// destination of the phi. For such case commuting operands of the instructions
+-/// in the recurrence may enable coalescing of the copy instruction generated
+-/// from the phi. For example, if there is a recurrence of
++/// Phi instructions will eventually be lowered to copy instructions.
++/// If phi is in a loop header, a recurrence may formulated around the source
++/// and destination of the phi. For such case commuting operands of the
++/// instructions in the recurrence may enable coalescing of the copy instruction
++/// generated from the phi. For example, if there is a recurrence of
+ ///
+ /// LoopHeader:
+ /// %1 = phi(%0, %100)
+@@ -1725,27 +1658,25 @@ bool PeepholeOptimizer::runOnMachineFunc
+ }
+
+ if (!MI->isCopy()) {
+- for (const auto &Op : MI->operands()) {
++ for (const MachineOperand &MO : MI->operands()) {
+ // Visit all operands: definitions can be implicit or explicit.
+- if (Op.isReg()) {
+- unsigned Reg = Op.getReg();
+- if (Op.isDef() && isNAPhysCopy(Reg)) {
++ if (MO.isReg()) {
++ unsigned Reg = MO.getReg();
++ if (MO.isDef() && isNAPhysCopy(Reg)) {
+ const auto &Def = NAPhysToVirtMIs.find(Reg);
+ if (Def != NAPhysToVirtMIs.end()) {
+ // A new definition of the non-allocatable physical register
+ // invalidates previous copies.
+- DEBUG(dbgs() << "NAPhysCopy: invalidating because of " << *MI
+- << '\n');
++ DEBUG(dbgs() << "NAPhysCopy: invalidating because of " << *MI);
+ NAPhysToVirtMIs.erase(Def);
+ }
+ }
+- } else if (Op.isRegMask()) {
+- const uint32_t *RegMask = Op.getRegMask();
++ } else if (MO.isRegMask()) {
++ const uint32_t *RegMask = MO.getRegMask();
+ for (auto &RegMI : NAPhysToVirtMIs) {
+ unsigned Def = RegMI.first;
+ if (MachineOperand::clobbersPhysReg(RegMask, Def)) {
+- DEBUG(dbgs() << "NAPhysCopy: invalidating because of " << *MI
+- << '\n');
++ DEBUG(dbgs() << "NAPhysCopy: invalidating because of " << *MI);
+ NAPhysToVirtMIs.erase(Def);
+ }
+ }
+@@ -1761,58 +1692,57 @@ bool PeepholeOptimizer::runOnMachineFunc
+ // don't know what's correct anymore.
+ //
+ // FIXME: handle explicit asm clobbers.
+- DEBUG(dbgs() << "NAPhysCopy: blowing away all info due to " << *MI
+- << '\n');
++ DEBUG(dbgs() << "NAPhysCopy: blowing away all info due to " << *MI);
+ NAPhysToVirtMIs.clear();
+ }
+
+ if ((isUncoalescableCopy(*MI) &&
+- optimizeUncoalescableCopy(MI, LocalMIs)) ||
+- (MI->isCompare() && optimizeCmpInstr(MI, &MBB)) ||
+- (MI->isSelect() && optimizeSelect(MI, LocalMIs))) {
++ optimizeUncoalescableCopy(*MI, LocalMIs)) ||
++ (MI->isCompare() && optimizeCmpInstr(*MI)) ||
++ (MI->isSelect() && optimizeSelect(*MI, LocalMIs))) {
+ // MI is deleted.
+ LocalMIs.erase(MI);
+ Changed = true;
+ continue;
+ }
+
+- if (MI->isConditionalBranch() && optimizeCondBranch(MI)) {
++ if (MI->isConditionalBranch() && optimizeCondBranch(*MI)) {
+ Changed = true;
+ continue;
+ }
+
+- if (isCoalescableCopy(*MI) && optimizeCoalescableCopy(MI)) {
++ if (isCoalescableCopy(*MI) && optimizeCoalescableCopy(*MI)) {
+ // MI is just rewritten.
+ Changed = true;
+ continue;
+ }
+
+ if (MI->isCopy() &&
+- (foldRedundantCopy(MI, CopySrcRegs, CopySrcMIs) ||
+- foldRedundantNAPhysCopy(MI, NAPhysToVirtMIs))) {
++ (foldRedundantCopy(*MI, CopySrcRegs, CopySrcMIs) ||
++ foldRedundantNAPhysCopy(*MI, NAPhysToVirtMIs))) {
+ LocalMIs.erase(MI);
+ MI->eraseFromParent();
+ Changed = true;
+ continue;
+ }
+
+- if (isMoveImmediate(MI, ImmDefRegs, ImmDefMIs)) {
++ if (isMoveImmediate(*MI, ImmDefRegs, ImmDefMIs)) {
+ SeenMoveImm = true;
+ } else {
+- Changed |= optimizeExtInstr(MI, &MBB, LocalMIs);
++ Changed |= optimizeExtInstr(*MI, MBB, LocalMIs);
+ // optimizeExtInstr might have created new instructions after MI
+ // and before the already incremented MII. Adjust MII so that the
+ // next iteration sees the new instructions.
+ MII = MI;
+ ++MII;
+ if (SeenMoveImm)
+- Changed |= foldImmediate(MI, &MBB, ImmDefRegs, ImmDefMIs);
++ Changed |= foldImmediate(*MI, ImmDefRegs, ImmDefMIs);
+ }
+
+ // Check whether MI is a load candidate for folding into a later
+ // instruction. If MI is not a candidate, check whether we can fold an
+ // earlier load into MI.
+- if (!isLoadFoldable(MI, FoldAsLoadDefCandidates) &&
++ if (!isLoadFoldable(*MI, FoldAsLoadDefCandidates) &&
+ !FoldAsLoadDefCandidates.empty()) {
+
+ // We visit each operand even after successfully folding a previous
+@@ -1861,7 +1791,7 @@ bool PeepholeOptimizer::runOnMachineFunc
+ // the load candidates. Note: We might be able to fold *into* this
+ // instruction, so this needs to be after the folding logic.
+ if (MI->isLoadFoldBarrier()) {
+- DEBUG(dbgs() << "Encountered load fold barrier on " << *MI << "\n");
++ DEBUG(dbgs() << "Encountered load fold barrier on " << *MI);
+ FoldAsLoadDefCandidates.clear();
+ }
+ }
+@@ -1958,14 +1888,14 @@ ValueTrackerResult ValueTracker::getNext
+ // duplicate the code from the generic TII.
+ return ValueTrackerResult();
+
+- SmallVector<TargetInstrInfo::RegSubRegPairAndIdx, 8> RegSeqInputRegs;
++ SmallVector<RegSubRegPairAndIdx, 8> RegSeqInputRegs;
+ if (!TII->getRegSequenceInputs(*Def, DefIdx, RegSeqInputRegs))
+ return ValueTrackerResult();
+
+ // We are looking at:
+ // Def = REG_SEQUENCE v0, sub0, v1, sub1, ...
+ // Check if one of the operand defines the subreg we are interested in.
+- for (auto &RegSeqInput : RegSeqInputRegs) {
++ for (const RegSubRegPairAndIdx &RegSeqInput : RegSeqInputRegs) {
+ if (RegSeqInput.SubIdx == DefSubReg) {
+ if (RegSeqInput.SubReg)
+ // Bail if we have to compose sub registers.
+@@ -1996,8 +1926,8 @@ ValueTrackerResult ValueTracker::getNext
+ // duplicate the code from the generic TII.
+ return ValueTrackerResult();
+
+- TargetInstrInfo::RegSubRegPair BaseReg;
+- TargetInstrInfo::RegSubRegPairAndIdx InsertedReg;
++ RegSubRegPair BaseReg;
++ RegSubRegPairAndIdx InsertedReg;
+ if (!TII->getInsertSubregInputs(*Def, DefIdx, BaseReg, InsertedReg))
+ return ValueTrackerResult();
+
+@@ -2050,7 +1980,7 @@ ValueTrackerResult ValueTracker::getNext
+ // duplicate the code from the generic TII.
+ return ValueTrackerResult();
+
+- TargetInstrInfo::RegSubRegPairAndIdx ExtractSubregInputReg;
++ RegSubRegPairAndIdx ExtractSubregInputReg;
+ if (!TII->getExtractSubregInputs(*Def, DefIdx, ExtractSubregInputReg))
+ return ValueTrackerResult();
+
+@@ -2083,7 +2013,7 @@ ValueTrackerResult ValueTracker::getNext
+ Def->getOperand(3).getImm());
+ }
+
+-/// \brief Explore each PHI incoming operand and return its sources
++/// Explore each PHI incoming operand and return its sources.
+ ValueTrackerResult ValueTracker::getNextSourceFromPHI() {
+ assert(Def->isPHI() && "Invalid definition");
+ ValueTrackerResult Res;
+@@ -2095,7 +2025,7 @@ ValueTrackerResult ValueTracker::getNext
+
+ // Return all register sources for PHI instructions.
+ for (unsigned i = 1, e = Def->getNumOperands(); i < e; i += 2) {
+- auto &MO = Def->getOperand(i);
++ const MachineOperand &MO = Def->getOperand(i);
+ assert(MO.isReg() && "Invalid PHI instruction");
+ // We have no code to deal with undef operands. They shouldn't happen in
+ // normal programs anyway.
+@@ -2121,7 +2051,7 @@ ValueTrackerResult ValueTracker::getNext
+ return getNextSourceFromBitcast();
+ // All the remaining cases involve "complex" instructions.
+ // Bail if we did not ask for the advanced tracking.
+- if (!UseAdvancedTracking)
++ if (DisableAdvCopyOpt)
+ return ValueTrackerResult();
+ if (Def->isRegSequence() || Def->isRegSequenceLike())
+ return getNextSourceFromRegSequence();
--- /dev/null
+---
+ clang/bindings/python/clang/cindex.py | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/clang/bindings/python/clang/cindex.py
++++ b/clang/bindings/python/clang/cindex.py
+@@ -3851,7 +3851,7 @@ class Config:
+ elif name == 'Windows':
+ file = 'libclang.dll'
+ else:
+- file = 'libclang.so'
++ file = 'libclang-6.0.so'
+
+ if Config.library_path:
+ file = Config.library_path + '/' + file
--- /dev/null
+Index: llvm-toolchain-6.0-6.0.1/test/CodeGen/X86/flags-copy-lowering.mir
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/test/CodeGen/X86/flags-copy-lowering.mir
++++ llvm-toolchain-6.0-6.0.1/test/CodeGen/X86/flags-copy-lowering.mir
+@@ -72,6 +72,18 @@
+ call void @foo()
+ ret void
+ }
++
++ define i32 @test_existing_setcc(i64 %a, i64 %b) {
++ entry:
++ call void @foo()
++ ret i32 0
++ }
++
++ define i32 @test_existing_setcc_memory(i64 %a, i64 %b) {
++ entry:
++ call void @foo()
++ ret i32 0
++ }
+ ...
+ ---
+ name: test_branch
+@@ -553,3 +565,110 @@ body: |
+ RET 0
+
+ ...
++---
++name: test_existing_setcc
++# CHECK-LABEL: name: test_existing_setcc
++liveins:
++ - { reg: '$rdi', virtual-reg: '%0' }
++ - { reg: '$rsi', virtual-reg: '%1' }
++body: |
++ bb.0:
++ successors: %bb.1, %bb.2, %bb.3
++ liveins: $rdi, $rsi
++
++ %0:gr64 = COPY $rdi
++ %1:gr64 = COPY $rsi
++ CMP64rr %0, %1, implicit-def $eflags
++ %2:gr8 = SETAr implicit $eflags
++ %3:gr8 = SETAEr implicit $eflags
++ %4:gr64 = COPY $eflags
++ ; CHECK: CMP64rr %0, %1, implicit-def $eflags
++ ; CHECK-NEXT: %[[A_REG:[^:]*]]:gr8 = SETAr implicit $eflags
++ ; CHECK-NEXT: %[[AE_REG:[^:]*]]:gr8 = SETAEr implicit $eflags
++ ; CHECK-NOT: COPY{{( killed)?}} $eflags
++
++ ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
++ CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
++ ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
++
++ $eflags = COPY %4
++ JA_1 %bb.1, implicit $eflags
++ JB_1 %bb.2, implicit $eflags
++ JMP_1 %bb.3
++ ; CHECK-NOT: $eflags =
++ ;
++ ; CHECK: TEST8rr %[[A_REG]], %[[A_REG]], implicit-def $eflags
++ ; CHECK-NEXT: JNE_1 %bb.1, implicit killed $eflags
++ ; CHECK-SAME: {{$[[:space:]]}}
++ ; CHECK-NEXT: bb.4:
++ ; CHECK-NEXT: successors: {{.*$}}
++ ; CHECK-SAME: {{$[[:space:]]}}
++ ; CHECK-NEXT: TEST8rr %[[AE_REG]], %[[AE_REG]], implicit-def $eflags
++ ; CHECK-NEXT: JE_1 %bb.2, implicit killed $eflags
++ ; CHECK-NEXT: JMP_1 %bb.3
++
++ bb.1:
++ %5:gr32 = MOV32ri64 42
++ $eax = COPY %5
++ RET 0, $eax
++
++ bb.2:
++ %6:gr32 = MOV32ri64 43
++ $eax = COPY %6
++ RET 0, $eax
++
++ bb.3:
++ %7:gr32 = MOV32r0 implicit-def dead $eflags
++ $eax = COPY %7
++ RET 0, $eax
++
++...
++---
++name: test_existing_setcc_memory
++# CHECK-LABEL: name: test_existing_setcc_memory
++liveins:
++ - { reg: '$rdi', virtual-reg: '%0' }
++ - { reg: '$rsi', virtual-reg: '%1' }
++body: |
++ bb.0:
++ successors: %bb.1, %bb.2
++ liveins: $rdi, $rsi
++
++ %0:gr64 = COPY $rdi
++ %1:gr64 = COPY $rsi
++ CMP64rr %0, %1, implicit-def $eflags
++ SETEm %0, 1, $noreg, -16, $noreg, implicit $eflags
++ %2:gr64 = COPY $eflags
++ ; CHECK: CMP64rr %0, %1, implicit-def $eflags
++ ; We cannot reuse this SETE because it stores the flag directly to memory,
++ ; so we have two SETEs here. FIXME: It'd be great if something could fold
++ ; these automatically. If not, maybe we want to unfold SETcc instructions
++ ; writing to memory so we can reuse them.
++ ; CHECK-NEXT: SETEm {{.*}} implicit $eflags
++ ; CHECK-NEXT: %[[E_REG:[^:]*]]:gr8 = SETEr implicit $eflags
++ ; CHECK-NOT: COPY{{( killed)?}} $eflags
++
++ ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
++ CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
++ ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
++
++ $eflags = COPY %2
++ JE_1 %bb.1, implicit $eflags
++ JMP_1 %bb.2
++ ; CHECK-NOT: $eflags =
++ ;
++ ; CHECK: TEST8rr %[[E_REG]], %[[E_REG]], implicit-def $eflags
++ ; CHECK-NEXT: JNE_1 %bb.1, implicit killed $eflags
++ ; CHECK-NEXT: JMP_1 %bb.2
++
++ bb.1:
++ %3:gr32 = MOV32ri64 42
++ $eax = COPY %3
++ RET 0, $eax
++
++ bb.2:
++ %4:gr32 = MOV32ri64 43
++ $eax = COPY %4
++ RET 0, $eax
++
++...
+Index: llvm-toolchain-6.0-6.0.1/lib/Target/X86/X86FlagsCopyLowering.cpp
+===================================================================
+--- llvm-toolchain-6.0-6.0.1.orig/lib/Target/X86/X86FlagsCopyLowering.cpp
++++ llvm-toolchain-6.0-6.0.1/lib/Target/X86/X86FlagsCopyLowering.cpp
+@@ -608,9 +608,12 @@ X86FlagsCopyLoweringPass::collectCondsIn
+ for (MachineInstr &MI : llvm::reverse(
+ llvm::make_range(MBB.instr_begin(), CopyDefI.getIterator()))) {
+ X86::CondCode Cond = X86::getCondFromSETOpc(MI.getOpcode());
+- if (Cond != X86::COND_INVALID && MI.getOperand(0).isReg() &&
+- TRI->isVirtualRegister(MI.getOperand(0).getReg()))
++ if (Cond != X86::COND_INVALID && !MI.mayStore() && MI.getOperand(0).isReg() &&
++ TRI->isVirtualRegister(MI.getOperand(0).getReg())) {
++ assert(MI.getOperand(0).isDef() &&
++ "A non-storing SETcc should always define a register!");
+ CondRegs[Cond] = MI.getOperand(0).getReg();
++ }
+
+ // Stop scanning when we see the first definition of the EFLAGS as prior to
+ // this we would potentially capture the wrong flag state.
--- /dev/null
+Index: llvm-toolchain-snapshot_7~svn323616/compiler-rt/test/sanitizer_common/TestCases/Linux/sysconf_interceptor_bypass_test.cc
+===================================================================
+--- llvm-toolchain-snapshot_7~svn323616.orig/compiler-rt/test/sanitizer_common/TestCases/Linux/sysconf_interceptor_bypass_test.cc
++++ llvm-toolchain-snapshot_7~svn323616/compiler-rt/test/sanitizer_common/TestCases/Linux/sysconf_interceptor_bypass_test.cc
+@@ -1,27 +0,0 @@
+-// RUN: %clangxx -O2 %s -o %t && %run %t 2>&1 | FileCheck %s
+-
+-// XFAIL: android
+-
+-#include <stdio.h>
+-
+-// getauxval() used instead of sysconf() in GetPageSize() is defined starting
+-// glbc version 2.16.
+-#if defined(__GLIBC_PREREQ) && __GLIBC_PREREQ(2, 16)
+-extern "C" long sysconf(int name) {
+- fprintf(stderr, "sysconf wrapper called\n");
+- return 0;
+-}
+-#endif // defined(__GLIBC_PREREQ) && __GLIBC_PREREQ(2, 16)
+-
+-int main() {
+- // All we need to check is that the sysconf() interceptor defined above was
+- // not called. Should it get called, it will crash right there, any
+- // instrumented code executed before sanitizer init is finished will crash
+- // accessing non-initialized sanitizer internals. Even if it will not crash
+- // in some configuration, it should never be called anyway.
+- fprintf(stderr, "Passed\n");
+- // CHECK-NOT: sysconf wrapper called
+- // CHECK: Passed
+- // CHECK-NOT: sysconf wrapper called
+- return 0;
+-}
--- /dev/null
+---
+ clang/tools/scan-build/bin/scan-build | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/clang/tools/scan-build/bin/scan-build
++++ b/clang/tools/scan-build/bin/scan-build
+@@ -1432,7 +1432,7 @@ sub FindClang {
+ if (!defined $Options{AnalyzerDiscoveryMethod}) {
+ $Clang = Cwd::realpath("$RealBin/bin/clang") if (-f "$RealBin/bin/clang");
+ if (!defined $Clang || ! -x $Clang) {
+- $Clang = Cwd::realpath("$RealBin/clang") if (-f "$RealBin/clang");
++ $Clang = Cwd::realpath("/usr/lib/llvm-6.0/bin/clang");
+ }
+ if (!defined $Clang || ! -x $Clang) {
+ return "error: Cannot find an executable 'clang' relative to" .
--- /dev/null
+Index: llvm-toolchain-snapshot_5.0~svn297449/clang/tools/scan-view/bin/scan-view
+===================================================================
+--- llvm-toolchain-snapshot_5.0~svn297449.orig/clang/tools/scan-view/bin/scan-view
++++ llvm-toolchain-snapshot_5.0~svn297449/clang/tools/scan-view/bin/scan-view
+@@ -61,7 +61,7 @@ def start_browser(port, options):
+
+ def run(port, options, root):
+ # Prefer to look relative to the installed binary
+- share = os.path.dirname(__file__) + "/../share/scan-view"
++ share = os.path.dirname(__file__) + "/../share/"
+ if not os.path.isdir(share):
+ # Otherwise look relative to the source
+ share = os.path.dirname(__file__) + "/../../scan-view/share"
--- /dev/null
+19-clang_debian_version.patch
+23-strlcpy_strlcat_warning_removed.diff
+27-fix_clang_stdint.diff
+26-set-correct-float-abi.diff
+0003-Debian-version-info-and-bugreport.patch
+scan-build-clang-path.diff
+declare_clear_cache.diff
+clang-format-version.diff
+unwind-chain-inclusion.diff
+hurd-pathmax.diff
+silent-gold-test.diff
+atomic_library_1.diff
+python-clangpath.diff
+fix-clang-path-and-build.diff
+# commented because of bug 903709
+#force-gcc-header-obj.diff
+do-not-fail-on-unexpected-pass.diff
+silent-more-tests.diff
+disable-display-PASS-UNSUPPORTED-XFAIL.diff
+fix-llvm-config-obj-src-root.patch
+0044-soname.diff
+lldb-soname.diff
+lldb-libname.diff
+hurd-EIEIO-undef.diff
+silent-MCJIIT-tests.diff
+clang-analyzer-force-version.diff
+install-scan-build-py.diff
+scan-view-fix-path.diff
+mips-fpxx-enable.diff
+0001-llvm-cmake-resolve-symlinks-in-LLVMConfig.cmake.patch
+0001-tools-clang-cmake-resolve-symlinks-in-ClangConfig.cmake.patch
+lldb-link-atomic-cmake.patch
+disable-source-interleave.diff
+silent-gold-utils.diff
+disable-llvm-symbolizer-test.diff
+clang-tidy-run-bin.diff
+fix-scan-view-path.diff
+#clang-fix-cmpxchg8-detection-on-i386.patch
+lldb-addversion-suffix-to-llvm-server-exec.patch
+lldb-missing-install.diff
+silent-test-failing-codeverage.diff
+disable-path-test-failing.diff
+silent-amd-tet.diff
+disable-error-xray.diff
+lldb-disable-swig-error.diff
+silent-test-macho.diff
+silent-llvm-isel-fuzzer.diff
+test-keep-alive.diff
+sparc64-add-missing-tls-get-addr.diff
+remove-test-freezing.diff
+0048-Set-html_static_path-_static-everywhere.patch
+0049-Use-Debian-provided-MathJax-everywhere.patch
+ubuntu-cosmic-support.patch
+D40146-JumpThreading-backport-1.diff
+D42717-JumpThreading-backport-2.diff
+llvm-D49832-SCEVPred.patch
+llvm-rL323946-LSRTy.patch
+PowerPC-Make-AddrSpaceCast-noop.diff
+D51108-rust-powerpc.diff
+pr38663-pgo-lto-crash.patch
+D51335-alignment-issue.diff
+D51639-optim-issue.diff
+rL338481-cherry-pick-really-subtle-miscompile.diff
+disable-sse2-old-x86.diff
+powerpcspe-add-missing-include-path.diff
+x32-fix-driver-search-paths.diff
+hurd-lib_Support_Unix_Path.inc.diff
+hurd-tools_llvm-shlib_CMakeLists.txt.diff
+D53557-hurd-self-exe-realpath.diff
+clang-arm-default-vfp3-on-armv7a.patch
+
+# Julia compa (to avoid yet-a-new-fork-of-llvm)
+# See bug 919628
+# (1) [unwind] llvm-D27629-AArch64-large_model_6.0.1
+julia/llvm-D27629-AArch64-large_model_6.0.1.patch
+# (2) [performance] llvm-D34078-vectorize-fdiv
+julia/llvm-D34078-vectorize-fdiv.patch
+# (4) [performance regression] llvm-D42262-jumpthreading-not-i1
+julia/llvm-D42262-jumpthreading-not-i1.patch
+# (14) llvm-D50167-scev-umin
+#julia/llvm-D50167-scev-umin.patch # Causes FTBFS
+# (13) llvm-D50010-VNCoercion-ni
+julia/llvm-D50010-VNCoercion-ni.patch
+# (5) [???] llvm-PPC-addrspaces
+# aka PowerPC-Make-AddrSpaceCast-noop.diff, already applied
+# (15) llvm-rL326967-aligned-load
+julia/llvm-rL326967-aligned-load.patch
+# (8) [???] llvm-rL327898
+julia/llvm-rL327898.patch
+# (11) [profiling] llvm-D44892-Perf-integration
+julia/llvm-D44892-Perf-integration.patch
+# Dep of llvm-PPC-addrspaces.patch
+julia/llvm-6.0-NVPTX-addrspaces.patch
+# (12) [bug fix] llvm-D49832-SCEVPred
+# [bug fix] llvm-rL323946-LSRTy
+# Already applied before
+947f9692440836dcb8d88b74b69dd379d85974ce.patch
--- /dev/null
+---
+ test/BugPoint/crash-narrowfunctiontest.ll | 1 -
+ test/BugPoint/remove_arguments_test.ll | 1 -
+ test/ExecutionEngine/MCJIT/cross-module-sm-pic-a.ll | 2 +-
+ test/ExecutionEngine/MCJIT/eh-lg-pic.ll | 2 +-
+ test/ExecutionEngine/MCJIT/multi-module-sm-pic-a.ll | 2 +-
+ test/ExecutionEngine/MCJIT/stubs-sm-pic.ll | 2 +-
+ test/ExecutionEngine/MCJIT/test-global-init-nonzero-sm-pic.ll | 2 +-
+ test/ExecutionEngine/MCJIT/test-ptr-reloc-sm-pic.ll | 2 +-
+ test/ExecutionEngine/OrcMCJIT/cross-module-sm-pic-a.ll | 2 +-
+ test/ExecutionEngine/OrcMCJIT/eh-lg-pic.ll | 2 +-
+ test/ExecutionEngine/OrcMCJIT/multi-module-sm-pic-a.ll | 2 +-
+ test/ExecutionEngine/OrcMCJIT/remote/test-global-init-nonzero-sm-pic.ll | 2 +-
+ test/ExecutionEngine/OrcMCJIT/remote/test-ptr-reloc-sm-pic.ll | 2 +-
+ test/ExecutionEngine/OrcMCJIT/stubs-sm-pic.ll | 2 +-
+ test/ExecutionEngine/OrcMCJIT/test-global-init-nonzero-sm-pic.ll | 2 +-
+ test/ExecutionEngine/OrcMCJIT/test-ptr-reloc-sm-pic.ll | 2 +-
+ test/Feature/load_module.ll | 1 -
+ 17 files changed, 14 insertions(+), 17 deletions(-)
+
+--- a/test/BugPoint/crash-narrowfunctiontest.ll
++++ b/test/BugPoint/crash-narrowfunctiontest.ll
+@@ -2,7 +2,6 @@
+ ;
+ ; RUN: bugpoint -load %llvmshlibdir/BugpointPasses%shlibext %s -output-prefix %t -bugpoint-crashcalls -silence-passes > /dev/null
+ ; REQUIRES: loadable_module
+-; XFAIL: *
+
+ define i32 @foo() { ret i32 1 }
+
+--- a/test/BugPoint/remove_arguments_test.ll
++++ b/test/BugPoint/remove_arguments_test.ll
+@@ -1,7 +1,6 @@
+ ; RUN: bugpoint -load %llvmshlibdir/BugpointPasses%shlibext %s -output-prefix %t -bugpoint-crashcalls -silence-passes
+ ; RUN: llvm-dis %t-reduced-simplified.bc -o - | FileCheck %s
+ ; REQUIRES: loadable_module
+-; XFAIL: *
+
+ ; Test to make sure that arguments are removed from the function if they are
+ ; unnecessary. And clean up any types that frees up too.
+--- a/test/ExecutionEngine/MCJIT/cross-module-sm-pic-a.ll
++++ b/test/ExecutionEngine/MCJIT/cross-module-sm-pic-a.ll
+@@ -1,5 +1,5 @@
+ ; RUN: %lli -extra-module=%p/Inputs/cross-module-b.ll -relocation-model=pic -code-model=small %s > /dev/null
+-; XFAIL: mips-, mipsel-, i686, i386
++; XFAIL: *
+
+ declare i32 @FB()
+
+--- a/test/ExecutionEngine/MCJIT/eh-lg-pic.ll
++++ b/test/ExecutionEngine/MCJIT/eh-lg-pic.ll
+@@ -1,5 +1,5 @@
+ ; RUN: %lli -relocation-model=pic -code-model=large %s
+-; XFAIL: cygwin, win32, mingw, mips-, mipsel-, i686, i386, aarch64, arm
++; XFAIL: *
+ declare i8* @__cxa_allocate_exception(i64)
+ declare void @__cxa_throw(i8*, i8*, i8*)
+ declare i32 @__gxx_personality_v0(...)
+--- a/test/ExecutionEngine/MCJIT/multi-module-sm-pic-a.ll
++++ b/test/ExecutionEngine/MCJIT/multi-module-sm-pic-a.ll
+@@ -1,5 +1,5 @@
+ ; RUN: %lli -extra-module=%p/Inputs/multi-module-b.ll -extra-module=%p/Inputs/multi-module-c.ll -relocation-model=pic -code-model=small %s > /dev/null
+-; XFAIL: mips-, mipsel-, i686, i386
++; XFAIL: *
+
+ declare i32 @FB()
+
+--- a/test/ExecutionEngine/MCJIT/stubs-sm-pic.ll
++++ b/test/ExecutionEngine/MCJIT/stubs-sm-pic.ll
+@@ -1,5 +1,5 @@
+ ; RUN: %lli -disable-lazy-compilation=false -relocation-model=pic -code-model=small %s
+-; XFAIL: mips-, mipsel-, i686, i386, aarch64, arm
++; XFAIL: mips-, mipsel-, i686, i386, aarch64, arm, x86_64
+
+ define i32 @main() nounwind {
+ entry:
+--- a/test/ExecutionEngine/MCJIT/test-global-init-nonzero-sm-pic.ll
++++ b/test/ExecutionEngine/MCJIT/test-global-init-nonzero-sm-pic.ll
+@@ -1,5 +1,5 @@
+ ; RUN: %lli -relocation-model=pic -code-model=small %s > /dev/null
+-; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386
++; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386, x86_64
+
+ @count = global i32 1, align 4
+
+--- a/test/ExecutionEngine/MCJIT/test-ptr-reloc-sm-pic.ll
++++ b/test/ExecutionEngine/MCJIT/test-ptr-reloc-sm-pic.ll
+@@ -1,5 +1,5 @@
+ ; RUN: %lli -O0 -relocation-model=pic -code-model=small %s
+-; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386
++; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386, x86_64
+
+ @.str = private unnamed_addr constant [6 x i8] c"data1\00", align 1
+ @ptr = global i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i32 0, i32 0), align 4
+--- a/test/ExecutionEngine/OrcMCJIT/cross-module-sm-pic-a.ll
++++ b/test/ExecutionEngine/OrcMCJIT/cross-module-sm-pic-a.ll
+@@ -1,5 +1,5 @@
+ ; RUN: %lli -jit-kind=orc-mcjit -extra-module=%p/Inputs/cross-module-b.ll -relocation-model=pic -code-model=small %s > /dev/null
+-; XFAIL: mips-, mipsel-, i686, i386
++; XFAIL: *
+
+ declare i32 @FB()
+
+--- a/test/ExecutionEngine/OrcMCJIT/eh-lg-pic.ll
++++ b/test/ExecutionEngine/OrcMCJIT/eh-lg-pic.ll
+@@ -1,5 +1,5 @@
+ ; RUN: %lli -jit-kind=orc-mcjit -relocation-model=pic -code-model=large %s
+-; XFAIL: cygwin, win32, mingw, mips-, mipsel-, i686, i386, aarch64, arm
++; XFAIL: *
+ declare i8* @__cxa_allocate_exception(i64)
+ declare void @__cxa_throw(i8*, i8*, i8*)
+ declare i32 @__gxx_personality_v0(...)
+--- a/test/ExecutionEngine/OrcMCJIT/multi-module-sm-pic-a.ll
++++ b/test/ExecutionEngine/OrcMCJIT/multi-module-sm-pic-a.ll
+@@ -1,5 +1,5 @@
+ ; RUN: %lli -jit-kind=orc-mcjit -extra-module=%p/Inputs/multi-module-b.ll -extra-module=%p/Inputs/multi-module-c.ll -relocation-model=pic -code-model=small %s > /dev/null
+-; XFAIL: mips-, mipsel-, i686, i386
++; XFAIL: *
+
+ declare i32 @FB()
+
+--- a/test/ExecutionEngine/OrcMCJIT/remote/test-global-init-nonzero-sm-pic.ll
++++ b/test/ExecutionEngine/OrcMCJIT/remote/test-global-init-nonzero-sm-pic.ll
+@@ -1,6 +1,6 @@
+ ; RUN: %lli -jit-kind=orc-mcjit -remote-mcjit -mcjit-remote-process=lli-child-target%exeext \
+ ; RUN: -relocation-model=pic -code-model=small %s > /dev/null
+-; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386, mingw32, win32
++; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386, mingw32, win32, x86_64
+ ; UNSUPPORTED: powerpc64-unknown-linux-gnu
+ ; Remove UNSUPPORTED for powerpc64-unknown-linux-gnu if problem caused by r266663 is fixed
+
+--- a/test/ExecutionEngine/OrcMCJIT/remote/test-ptr-reloc-sm-pic.ll
++++ b/test/ExecutionEngine/OrcMCJIT/remote/test-ptr-reloc-sm-pic.ll
+@@ -1,6 +1,6 @@
+ ; RUN: %lli -jit-kind=orc-mcjit -remote-mcjit -mcjit-remote-process=lli-child-target%exeext \
+ ; RUN: -O0 -relocation-model=pic -code-model=small %s
+-; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386, mingw32, win32
++; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386, mingw32, win32, x86_64
+ ; UNSUPPORTED: powerpc64-unknown-linux-gnu
+ ; Remove UNSUPPORTED for powerpc64-unknown-linux-gnu if problem caused by r266663 is fixed
+
+--- a/test/ExecutionEngine/OrcMCJIT/stubs-sm-pic.ll
++++ b/test/ExecutionEngine/OrcMCJIT/stubs-sm-pic.ll
+@@ -1,5 +1,5 @@
+ ; RUN: %lli -jit-kind=orc-mcjit -disable-lazy-compilation=false -relocation-model=pic -code-model=small %s
+-; XFAIL: mips-, mipsel-, i686, i386, aarch64, arm
++; XFAIL: mips-, mipsel-, i686, i386, aarch64, arm, x86_64
+
+ define i32 @main() nounwind {
+ entry:
+--- a/test/ExecutionEngine/OrcMCJIT/test-global-init-nonzero-sm-pic.ll
++++ b/test/ExecutionEngine/OrcMCJIT/test-global-init-nonzero-sm-pic.ll
+@@ -1,5 +1,5 @@
+ ; RUN: %lli -jit-kind=orc-mcjit -relocation-model=pic -code-model=small %s > /dev/null
+-; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386
++; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386, x86_64
+
+ @count = global i32 1, align 4
+
+--- a/test/ExecutionEngine/OrcMCJIT/test-ptr-reloc-sm-pic.ll
++++ b/test/ExecutionEngine/OrcMCJIT/test-ptr-reloc-sm-pic.ll
+@@ -1,5 +1,5 @@
+ ; RUN: %lli -jit-kind=orc-mcjit -O0 -relocation-model=pic -code-model=small %s
+-; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386
++; XFAIL: mips-, mipsel-, aarch64, arm, i686, i386, x86_64
+
+ @.str = private unnamed_addr constant [6 x i8] c"data1\00", align 1
+ @ptr = global i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str, i32 0, i32 0), align 4
+--- a/test/Feature/load_module.ll
++++ b/test/Feature/load_module.ll
+@@ -3,7 +3,6 @@
+ ; RUN: -disable-output 2>&1 | grep Hello
+ ; REQUIRES: loadable_module
+ ; FIXME: On Cygming, it might fail without building LLVMHello manually.
+-; XFAIL: *
+
+ @junk = global i32 0
+
--- /dev/null
+Index: llvm-toolchain-snapshot_6.0~svn315566/test/MC/AMDGPU/hsa.s
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn315566.orig/test/MC/AMDGPU/hsa.s
++++ llvm-toolchain-snapshot_6.0~svn315566/test/MC/AMDGPU/hsa.s
+@@ -1,5 +1,6 @@
+ // RUN: llvm-mc -triple amdgcn--amdhsa -mcpu=kaveri -show-encoding %s | FileCheck %s --check-prefix=ASM
+ // RUN: llvm-mc -filetype=obj -triple amdgcn--amdhsa -mcpu=kaveri -show-encoding %s | llvm-readobj -symbols -s -sd | FileCheck %s --check-prefix=ELF
++// XFAIL: *
+
+ // ELF: Section {
+ // ELF: Name: .text
--- /dev/null
+Description: fails on debian unstable amd64
+ Command Output (stderr):
+ --
+ /build/llvm-toolchain-snapshot-4.0~svn279916/test/tools/gold/X86/start-lib-common.ll:22:10: error: expected string not found in input
+ ; CHECK: @x = common global i32 0, align 8
+ ^
+ <stdin>:1:1: note: scanning from here
+ ; ModuleID = '/build/llvm-toolchain-snapshot-4.0~svn279916/build-llvm/test/tools/gold/X86/Output/start-lib-common.ll.tmp3.o'
+ ^
+ <stdin>:4:1: note: possible intended match here
+ @x = common global i32 0, align 4
+ ^
+
+
+Index: llvm-toolchain-snapshot_7~svn323434/test/tools/gold/X86/start-lib-common.ll
+===================================================================
+--- llvm-toolchain-snapshot_7~svn323434.orig/test/tools/gold/X86/start-lib-common.ll
++++ llvm-toolchain-snapshot_7~svn323434/test/tools/gold/X86/start-lib-common.ll
+@@ -9,6 +9,7 @@
+ ; RUN: -shared %t1.o --start-lib %t2.o --end-lib -o %t3.o
+ ; RUN: llvm-dis %t3.o -o - | FileCheck %s
+
++; XFAIL: *
+ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+ @x = common global i32 0, align 4
+
+Index: llvm-toolchain-snapshot_7~svn323434/test/tools/gold/X86/comdat.ll
+===================================================================
+--- llvm-toolchain-snapshot_7~svn323434.orig/test/tools/gold/X86/comdat.ll
++++ llvm-toolchain-snapshot_7~svn323434/test/tools/gold/X86/comdat.ll
+@@ -5,6 +5,7 @@
+ ; RUN: -plugin-opt=save-temps
+ ; RUN: FileCheck --check-prefix=RES %s < %t3.o.resolution.txt
+ ; RUN: llvm-readobj -t %t3.o | FileCheck --check-prefix=OBJ %s
++; XFAIL: *
+
+ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+ target triple = "x86_64-unknown-linux-gnu"
--- /dev/null
+---
+ test/tools/gold/X86/common_thinlto.ll | 1 +
+ test/tools/gold/X86/emit-llvm.ll | 2 ++
+ test/tools/gold/X86/parallel.ll | 1 +
+ test/tools/gold/X86/pr19901_thinlto.ll | 1 +
+ test/tools/gold/X86/slp-vectorize.ll | 1 +
+ test/tools/gold/X86/strip_names.ll | 1 +
+ test/tools/gold/X86/thinlto.ll | 2 ++
+ test/tools/gold/X86/thinlto_archive.ll | 1 +
+ test/tools/gold/X86/thinlto_internalize.ll | 2 ++
+ test/tools/gold/X86/thinlto_linkonceresolution.ll | 2 ++
+ test/tools/gold/X86/thinlto_weak_resolution.ll | 3 ++-
+ test/tools/gold/X86/type-merge2.ll | 2 +-
+ test/tools/gold/X86/vectorize.ll | 1 +
+ test/tools/gold/X86/visibility.ll | 1 +
+ 14 files changed, 19 insertions(+), 2 deletions(-)
+
+Index: llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/common_thinlto.ll
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn317433.orig/test/tools/gold/X86/common_thinlto.ll
++++ llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/common_thinlto.ll
+@@ -17,6 +17,7 @@
+
+ ; RUN: llvm-nm %t3 | FileCheck %s --check-prefix=NM
+ ; NM: bar
++; XFAIL: *
+
+ source_filename = "common1.c"
+ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+Index: llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/emit-llvm.ll
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn317433.orig/test/tools/gold/X86/emit-llvm.ll
++++ llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/emit-llvm.ll
+@@ -21,6 +21,8 @@
+ ; RUN: not test -a %t4.o
+
+ ; NM: T f3
++; XFAIL: *
++
+
+ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+ target triple = "x86_64-unknown-linux-gnu"
+Index: llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/parallel.ll
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn317433.orig/test/tools/gold/X86/parallel.ll
++++ llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/parallel.ll
+@@ -5,6 +5,7 @@
+ ; RUN: llvm-dis %t.1.5.precodegen.bc -o - | FileCheck --check-prefix=CHECK-BC1 %s
+ ; RUN: llvm-nm %t.o | FileCheck --check-prefix=CHECK0 %s
+ ; RUN: llvm-nm %t.o1 | FileCheck --check-prefix=CHECK1 %s
++; XFAIL: *
+
+ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+ target triple = "x86_64-unknown-linux-gnu"
+Index: llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/pr19901_thinlto.ll
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn317433.orig/test/tools/gold/X86/pr19901_thinlto.ll
++++ llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/pr19901_thinlto.ll
+@@ -4,6 +4,7 @@
+ ; RUN: --plugin-opt=thinlto \
+ ; RUN: -shared -m elf_x86_64 -o %t.so %t2.o %t.o
+ ; RUN: llvm-readobj -t %t.so | FileCheck %s
++; XFAIL: i686, i386
+
+ ; CHECK: Symbol {
+ ; CHECK: Name: f
+Index: llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/slp-vectorize.ll
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn317433.orig/test/tools/gold/X86/slp-vectorize.ll
++++ llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/slp-vectorize.ll
+@@ -7,6 +7,7 @@
+
+ ; test that the vectorizer is run.
+ ; CHECK: fadd <4 x float>
++; XFAIL: *
+
+ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+ target triple = "x86_64-unknown-linux-gnu"
+Index: llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/strip_names.ll
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn317433.orig/test/tools/gold/X86/strip_names.ll
++++ llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/strip_names.ll
+@@ -25,6 +25,7 @@
+ ; NONAME: %2 = load i32, i32* @GlobalValueName
+ ; NONAME: %3 = add i32 %0, %2
+ ; NONAME: ret i32 %3
++; XFAIL: *
+
+ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+ target triple = "x86_64-unknown-linux-gnu"
+Index: llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/thinlto.ll
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn317433.orig/test/tools/gold/X86/thinlto.ll
++++ llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/thinlto.ll
+@@ -114,6 +114,8 @@
+ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+ target triple = "x86_64-unknown-linux-gnu"
+
++; XFAIL: i686, i386
++
+ declare void @g(...)
+
+ define void @f() {
+Index: llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/thinlto_archive.ll
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn317433.orig/test/tools/gold/X86/thinlto_archive.ll
++++ llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/thinlto_archive.ll
+@@ -15,6 +15,7 @@
+ ; RUN: --plugin-opt=jobs=1 \
+ ; RUN: -shared %t.o %t.a -o %t4 2>&1 | FileCheck %s
+ ; RUN: llvm-nm %t4 | FileCheck %s --check-prefix=NM
++; XFAIL: i686, i386
+
+ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+ target triple = "x86_64-unknown-linux-gnu"
+Index: llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/thinlto_internalize.ll
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn317433.orig/test/tools/gold/X86/thinlto_internalize.ll
++++ llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/thinlto_internalize.ll
+@@ -14,6 +14,8 @@
+ ; h() should be internalized after promotion, and eliminated after inlining
+ ; CHECK-NOT: @h.llvm.
+
++; XFAIL: i686, i386
++
+ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+ target triple = "x86_64-unknown-linux-gnu"
+ define i32 @g() {
+Index: llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/thinlto_linkonceresolution.ll
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn317433.orig/test/tools/gold/X86/thinlto_linkonceresolution.ll
++++ llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/thinlto_linkonceresolution.ll
+@@ -23,6 +23,8 @@
+ ; OPT-NOT: @f()
+ ; OPT2: define weak_odr dso_local hidden void @f()
+
++; XFAIL: i686, i386
++
+ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+ target triple = "x86_64-unknown-linux-gnu"
+ define i32 @g() {
+Index: llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/thinlto_weak_resolution.ll
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn317433.orig/test/tools/gold/X86/thinlto_weak_resolution.ll
++++ llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/thinlto_weak_resolution.ll
+@@ -9,6 +9,7 @@
+ ; RUN: --plugin-opt=save-temps \
+ ; RUN: -shared \
+ ; RUN: -o %t3.o %t.o %t2.o
++; XFAIL: i686, i386
+
+ ; RUN: llvm-nm %t3.o | FileCheck %s
+ ; CHECK: weakfunc
+Index: llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/type-merge2.ll
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn317433.orig/test/tools/gold/X86/type-merge2.ll
++++ llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/type-merge2.ll
+@@ -6,6 +6,8 @@
+ ; RUN: -shared %t.o %t2.o -o %t3.o
+ ; RUN: llvm-dis %t3.o.0.2.internalize.bc -o - | FileCheck %s
+
++; XFAIL: *
++
+ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+ target triple = "x86_64-unknown-linux-gnu"
+
+Index: llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/vectorize.ll
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn317433.orig/test/tools/gold/X86/vectorize.ll
++++ llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/vectorize.ll
+@@ -7,6 +7,7 @@
+
+ ; test that the vectorizer is run.
+ ; CHECK: fadd <4 x float>
++; XFAIL: *
+
+ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+ target triple = "x86_64-unknown-linux-gnu"
+Index: llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/visibility.ll
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn317433.orig/test/tools/gold/X86/visibility.ll
++++ llvm-toolchain-snapshot_6.0~svn317433/test/tools/gold/X86/visibility.ll
+@@ -16,6 +16,7 @@
+ ; CHECK-NEXT: Other [
+ ; CHECK-NEXT: STV_PROTECTED
+ ; CHECK-NEXT: ]
++; XFAIL: *
+
+ ; IR: define dso_local void @foo
+
--- /dev/null
+Index: llvm-toolchain-snapshot_6.0~svn315736/test/tools/llvm-isel-fuzzer/aarch64-execname-options.ll
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn315736.orig/test/tools/llvm-isel-fuzzer/aarch64-execname-options.ll
++++ llvm-toolchain-snapshot_6.0~svn315736/test/tools/llvm-isel-fuzzer/aarch64-execname-options.ll
+@@ -2,6 +2,7 @@
+ ; without copying the whole lib dir or polluting the build dir.
+ ; REQUIRES: static-libs
+ ; REQUIRES: aarch64-registered-target
++: XFAIL: *
+
+ ; RUN: echo > %t.input
+
+Index: llvm-toolchain-snapshot_6.0~svn315736/test/tools/llvm-isel-fuzzer/execname-options.ll
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn315736.orig/test/tools/llvm-isel-fuzzer/execname-options.ll
++++ llvm-toolchain-snapshot_6.0~svn315736/test/tools/llvm-isel-fuzzer/execname-options.ll
+@@ -1,6 +1,7 @@
+ ; If the binary looks up libraries using an rpath, we can't test this
+ ; without copying the whole lib dir or polluting the build dir.
+ ; REQUIRES: static-libs
++: XFAIL: *
+
+ ; RUN: echo > %t.input
+
--- /dev/null
+# Comment the tests for the code coverage (fails otherwise)
+
+
+---
+ test/BugPoint/crash-narrowfunctiontest.ll | 1 +
+ test/BugPoint/metadata.ll | 3 ++-
+ test/BugPoint/remove_arguments_test.ll | 1 +
+ test/Feature/load_module.ll | 1 +
+ 4 files changed, 5 insertions(+), 1 deletion(-)
+
+--- a/test/BugPoint/crash-narrowfunctiontest.ll
++++ b/test/BugPoint/crash-narrowfunctiontest.ll
+@@ -2,6 +2,7 @@
+ ;
+ ; RUN: bugpoint -load %llvmshlibdir/BugpointPasses%shlibext %s -output-prefix %t -bugpoint-crashcalls -silence-passes > /dev/null
+ ; REQUIRES: loadable_module
++; XFAIL: *
+
+ define i32 @foo() { ret i32 1 }
+
+--- a/test/BugPoint/metadata.ll
++++ b/test/BugPoint/metadata.ll
+@@ -7,7 +7,8 @@
+ ;
+ ; RUN: bugpoint -load %llvmshlibdir/BugpointPasses%shlibext %s -output-prefix %t-notype -bugpoint-crashcalls -silence-passes -disable-namedmd-remove -disable-strip-debuginfo > /dev/null
+ ; RUN: llvm-dis %t-notype-reduced-simplified.bc -o - | FileCheck %s --check-prefix=NOTYPE
+-;
++; XFAIL: *
++
+ ; Bugpoint should keep the call's metadata attached to the call.
+
+ ; CHECK: call void @foo(), !dbg ![[LOC:[0-9]+]], !attach ![[CALL:[0-9]+]]
+--- a/test/BugPoint/remove_arguments_test.ll
++++ b/test/BugPoint/remove_arguments_test.ll
+@@ -1,6 +1,7 @@
+ ; RUN: bugpoint -load %llvmshlibdir/BugpointPasses%shlibext %s -output-prefix %t -bugpoint-crashcalls -silence-passes
+ ; RUN: llvm-dis %t-reduced-simplified.bc -o - | FileCheck %s
+ ; REQUIRES: loadable_module
++; XFAIL: *
+
+ ; Test to make sure that arguments are removed from the function if they are
+ ; unnecessary. And clean up any types that frees up too.
+--- a/test/Feature/load_module.ll
++++ b/test/Feature/load_module.ll
+@@ -3,6 +3,7 @@
+ ; RUN: -disable-output 2>&1 | grep Hello
+ ; REQUIRES: loadable_module
+ ; FIXME: On Cygming, it might fail without building LLVMHello manually.
++; XFAIL: *
+
+ @junk = global i32 0
+
--- /dev/null
+Index: llvm-toolchain-snapshot_5.0~svn306792/test/ThinLTO/X86/autoupgrade.ll
+===================================================================
+--- llvm-toolchain-snapshot_5.0~svn306792.orig/test/ThinLTO/X86/autoupgrade.ll
++++ llvm-toolchain-snapshot_5.0~svn306792/test/ThinLTO/X86/autoupgrade.ll
+@@ -12,6 +12,8 @@
+ ; CHECK: <STRTAB_BLOCK
+ ; CHECK-NEXT: blob data = 'mainglobalfunc1llvm.invariant.start.p0i8{{.*}}'
+
++; XFAIL: *
++
+ target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
+ target triple = "x86_64-apple-macosx10.11.0"
+
--- /dev/null
+Index: llvm-toolchain-snapshot_6.0~svn314668/test/Object/macho-invalid.test
+===================================================================
+--- llvm-toolchain-snapshot_6.0~svn314668.orig/test/Object/macho-invalid.test
++++ llvm-toolchain-snapshot_6.0~svn314668/test/Object/macho-invalid.test
+@@ -284,9 +284,6 @@ INVALID-DYLIB-WRONG-FILETYPE: macho-inva
+ RUN: not llvm-objdump -macho -private-headers %p/Inputs/macho-invalid-dylib-no-id 2>&1 | FileCheck -check-prefix INVALID-DYLIB-NO-ID %s
+ INVALID-DYLIB-NO-ID: macho-invalid-dylib-no-id': truncated or malformed object (no LC_ID_DYLIB load command in dynamic library filetype)
+
+-RUN: not llvm-objdump -macho -private-headers %p/Inputs/macho-invalid-dylib-cmdsize-past-eof 2>&1 | FileCheck -check-prefix INVALID-DYLIB-CMDSIZE %s
+-INVALID-DYLIB-CMDSIZE: macho-invalid-dylib-cmdsize-past-eof': truncated or malformed object (load command 0 extends past end of file)
+-
+ RUN: not llvm-objdump -macho -private-headers %p/Inputs/macho-invalid-uuid-more-than-one 2>&1 | FileCheck -check-prefix INVALID-UUID-MORE-THAN-ONE %s
+ INVALID-UUID-MORE-THAN-ONE: macho-invalid-uuid-more-than-one': truncated or malformed object (more than one LC_UUID command)
+
--- /dev/null
+Description: [Sparc] Include __tls_get_addr in symbol table for TLS calls to it
+ Global Dynamic and Local Dynamic call relocations only implicitly
+ reference __tls_get_addr, but it still needs to be in the symbol table
+ to be bound at link time otherwise it fails to link. For details, see
+ https://sourceware.org/bugzilla/show_bug.cgi?id=22832.
+Author: James Clarke <jrtc27@jrtc27.com>
+Last-Update: 2018-02-14
+
+--- llvm-toolchain-4.0-4.0.1.orig/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
++++ llvm-toolchain-4.0-4.0.1/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
+@@ -194,14 +194,30 @@ static void fixELFSymbolsInTLSFixupsImpl
+ void SparcMCExpr::fixELFSymbolsInTLSFixups(MCAssembler &Asm) const {
+ switch(getKind()) {
+ default: return;
++ case VK_Sparc_TLS_GD_CALL:
++ case VK_Sparc_TLS_LDM_CALL: {
++ // The corresponding relocations reference __tls_get_addr, as they call it,
++ // but this is only implicit; there is no connection in the ELF file
++ // between the relocation and the symbol, other than the specification for
++ // the semantics of the relocations. However, the symbol must be included
++ // in our symbol table despite the lack of references to it, since it needs
++ // to be bound during linking for these relocations. For details see
++ // https://sourceware.org/bugzilla/show_bug.cgi?id=22832.
++ MCSymbol *Symbol = Asm.getContext().getOrCreateSymbol("__tls_get_addr");
++ Asm.registerSymbol(*Symbol);
++ auto ELFSymbol = cast<MCSymbolELF>(Symbol);
++ if (!ELFSymbol->isBindingSet()) {
++ ELFSymbol->setBinding(ELF::STB_GLOBAL);
++ ELFSymbol->setExternal(true);
++ }
++ LLVM_FALLTHROUGH;
++ }
+ case VK_Sparc_TLS_GD_HI22:
+ case VK_Sparc_TLS_GD_LO10:
+ case VK_Sparc_TLS_GD_ADD:
+- case VK_Sparc_TLS_GD_CALL:
+ case VK_Sparc_TLS_LDM_HI22:
+ case VK_Sparc_TLS_LDM_LO10:
+ case VK_Sparc_TLS_LDM_ADD:
+- case VK_Sparc_TLS_LDM_CALL:
+ case VK_Sparc_TLS_LDO_HIX22:
+ case VK_Sparc_TLS_LDO_LOX10:
+ case VK_Sparc_TLS_LDO_ADD:
--- /dev/null
+Index: llvm-toolchain-5.0-5.0.1~+rc1/utils/lit/lit/ProgressBar.py
+===================================================================
+--- llvm-toolchain-5.0-5.0.1~+rc1.orig/utils/lit/lit/ProgressBar.py
++++ llvm-toolchain-5.0-5.0.1~+rc1/utils/lit/lit/ProgressBar.py
+@@ -189,15 +189,7 @@ class SimpleProgressBar:
+ return
+
+ for i in range(self.atIndex, next):
+- idx = i % 5
+- if idx == 0:
+- sys.stdout.write('%-2d' % (i*2))
+- elif idx == 1:
+- pass # Skip second char
+- elif idx < 4:
+- sys.stdout.write('.')
+- else:
+- sys.stdout.write(' ')
++ sys.stdout.write('%-2d ' % (i*2))
+ sys.stdout.flush()
+ self.atIndex = next
+
--- /dev/null
+Description: Add Ubuntu Cosmic to the distro release list.
+Author: Adam Conrad <adconrad@ubuntu.com>
+Last-Update: 2018-05-03
+
+--- llvm-toolchain-6.0-6.0.orig/clang/include/clang/Driver/Distro.h
++++ llvm-toolchain-6.0-6.0/clang/include/clang/Driver/Distro.h
+@@ -61,6 +61,7 @@ public:
+ UbuntuZesty,
+ UbuntuArtful,
+ UbuntuBionic,
++ UbuntuCosmic,
+ UnknownDistro
+ };
+
+@@ -114,7 +115,7 @@ public:
+ }
+
+ bool IsUbuntu() const {
+- return DistroVal >= UbuntuHardy && DistroVal <= UbuntuBionic;
++ return DistroVal >= UbuntuHardy && DistroVal <= UbuntuCosmic;
+ }
+
+ bool IsAlpineLinux() const {
+--- llvm-toolchain-6.0-6.0.orig/clang/lib/Driver/Distro.cpp
++++ llvm-toolchain-6.0-6.0/clang/lib/Driver/Distro.cpp
+@@ -49,6 +49,7 @@ static Distro::DistroType DetectDistro(v
+ .Case("zesty", Distro::UbuntuZesty)
+ .Case("artful", Distro::UbuntuArtful)
+ .Case("bionic", Distro::UbuntuBionic)
++ .Case("cosmic", Distro::UbuntuCosmic)
+ .Default(Distro::UnknownDistro);
+ if (Version != Distro::UnknownDistro)
+ return Version;
--- /dev/null
+# Without this patch, the first local include of unwind.h might, with the
+# __has_include_next, try to include the one from the system.
+# It might be /usr/include/clang/3.4/include/unwind.h
+# Because of the #ifndef __CLANG_UNWIND_H, it might never include any declaration
+# from the system.
+
+---
+ clang/lib/Headers/unwind.h | 9 +++++----
+ 1 file changed, 5 insertions(+), 4 deletions(-)
+
+--- a/clang/lib/Headers/unwind.h
++++ b/clang/lib/Headers/unwind.h
+@@ -23,9 +23,6 @@
+
+ /* See "Data Definitions for libgcc_s" in the Linux Standard Base.*/
+
+-#ifndef __CLANG_UNWIND_H
+-#define __CLANG_UNWIND_H
+-
+ #if defined(__APPLE__) && __has_include_next(<unwind.h>)
+ /* Darwin (from 11.x on) provide an unwind.h. If that's available,
+ * use it. libunwind wraps some of its definitions in #ifdef _GNU_SOURCE,
+@@ -53,6 +50,9 @@
+ # endif
+ #else
+
++#ifndef __CLANG_UNWIND_H
++#define __CLANG_UNWIND_H
++
+ #include <stdint.h>
+
+ #ifdef __cplusplus
+@@ -294,6 +294,7 @@ _Unwind_Ptr _Unwind_GetTextRelBase(struc
+ }
+ #endif
+
++#endif /* __CLANG_UNWIND_H */
++
+ #endif
+
+-#endif /* __CLANG_UNWIND_H */
--- /dev/null
+Description: Fix missing include and library paths on x32
+Author: James Clarke <jrtc27@jrtc27.com>
+Forwarded: https://reviews.llvm.org/D43630
+Last-Update: 2018-09-15
+
+--- llvm-toolchain-6.0-6.0.1.orig/clang/lib/Driver/ToolChains/Gnu.cpp
++++ llvm-toolchain-6.0-6.0.1/clang/lib/Driver/ToolChains/Gnu.cpp
+@@ -1737,7 +1737,10 @@ bool Generic_GCC::GCCInstallationDetecto
+ "x86_64-manbo-linux-gnu", "x86_64-linux-gnu",
+ "x86_64-slackware-linux", "x86_64-linux-android",
+ "x86_64-unknown-linux"};
+- static const char *const X32LibDirs[] = {"/libx32"};
++ static const char *const X32LibDirs[] = {"/libx32", "/lib"};
++ static const char *const X32Triples[] = {
++ "x86_64-linux-gnux32", "x86_64-unknown-linux-gnux32",
++ "x86_64-pc-linux-gnux32"};
+ static const char *const X86LibDirs[] = {"/lib32", "/lib"};
+ static const char *const X86Triples[] = {
+ "i686-linux-gnu", "i686-pc-linux-gnu", "i486-linux-gnu",
+@@ -1842,14 +1845,16 @@ bool Generic_GCC::GCCInstallationDetecto
+ }
+ break;
+ case llvm::Triple::x86_64:
+- LibDirs.append(begin(X86_64LibDirs), end(X86_64LibDirs));
+- TripleAliases.append(begin(X86_64Triples), end(X86_64Triples));
+ // x32 is always available when x86_64 is available, so adding it as
+ // secondary arch with x86_64 triples
+ if (TargetTriple.getEnvironment() == llvm::Triple::GNUX32) {
+- BiarchLibDirs.append(begin(X32LibDirs), end(X32LibDirs));
++ LibDirs.append(begin(X32LibDirs), end(X32LibDirs));
++ TripleAliases.append(begin(X32Triples), end(X32Triples));
++ BiarchLibDirs.append(begin(X86_64LibDirs), end(X86_64LibDirs));
+ BiarchTripleAliases.append(begin(X86_64Triples), end(X86_64Triples));
+ } else {
++ LibDirs.append(begin(X86_64LibDirs), end(X86_64LibDirs));
++ TripleAliases.append(begin(X86_64Triples), end(X86_64Triples));
+ BiarchLibDirs.append(begin(X86LibDirs), end(X86LibDirs));
+ BiarchTripleAliases.append(begin(X86Triples), end(X86Triples));
+ }
+--- llvm-toolchain-6.0-6.0.1.orig/clang/lib/Driver/ToolChains/Linux.cpp
++++ llvm-toolchain-6.0-6.0.1/clang/lib/Driver/ToolChains/Linux.cpp
+@@ -77,10 +77,13 @@ static std::string getMultiarchTriple(co
+ return "i386-linux-gnu";
+ break;
+ case llvm::Triple::x86_64:
+- // We don't want this for x32, otherwise it will match x86_64 libs
+- if (TargetEnvironment != llvm::Triple::GNUX32 &&
+- D.getVFS().exists(SysRoot + "/lib/x86_64-linux-gnu"))
+- return "x86_64-linux-gnu";
++ if (TargetEnvironment == llvm::Triple::GNUX32) {
++ if (D.getVFS().exists(SysRoot + "/lib/x86_64-linux-gnux32"))
++ return "x86_64-linux-gnux32";
++ } else {
++ if (D.getVFS().exists(SysRoot + "/lib/x86_64-linux-gnu"))
++ return "x86_64-linux-gnu";
++ }
+ break;
+ case llvm::Triple::aarch64:
+ if (D.getVFS().exists(SysRoot + "/lib/aarch64-linux-gnu"))
+@@ -597,6 +600,8 @@ void Linux::AddClangSystemIncludeArgs(co
+ // in use in any released version of Debian, so we should consider
+ // removing them.
+ "/usr/include/i686-linux-gnu/64", "/usr/include/i486-linux-gnu/64"};
++ const StringRef X32MultiarchIncludeDirs[] = {
++ "/usr/include/x86_64-linux-gnux32"};
+ const StringRef X86MultiarchIncludeDirs[] = {
+ "/usr/include/i386-linux-gnu",
+
+@@ -639,7 +644,10 @@ void Linux::AddClangSystemIncludeArgs(co
+ ArrayRef<StringRef> MultiarchIncludeDirs;
+ switch (getTriple().getArch()) {
+ case llvm::Triple::x86_64:
+- MultiarchIncludeDirs = X86_64MultiarchIncludeDirs;
++ if (getTriple().getEnvironment() == llvm::Triple::GNUX32)
++ MultiarchIncludeDirs = X32MultiarchIncludeDirs;
++ else
++ MultiarchIncludeDirs = X86_64MultiarchIncludeDirs;
+ break;
+ case llvm::Triple::x86:
+ MultiarchIncludeDirs = X86MultiarchIncludeDirs;
--- /dev/null
+#!/bin/sh
+
+clang -Xclang -load -Xclang /usr/lib/llvm-@LLVM_VERSION@/lib/LLVMPolly.so $@
--- /dev/null
+#!/bin/sh
+ORIG_VERSION=5.0
+TARGET_VERSION=6.0
+ORIG_VERSION_2=6_0
+TARGET_VERSION_2=6_0
+
+LIST=`ls debian/control debian/orig-tar.sh debian/rules debian/patches/clang-analyzer-force-version.diff debian/patches/clang-format-version.diff debian/patches/python-clangpath.diff debian/patches/scan-build-clang-path.diff debian/patches/lldb-libname.diff debian/patches/fix-scan-view-path.diff debian/patches/lldb-addversion-suffix-to-llvm-server-exec.patch debian/patches/clang-tidy-run-bin.diff debian/patches/clang-apply-replacements.diff debian/patches/fix-scan-view-path.diff`
+for F in $LIST; do
+ sed -i -e "s|$ORIG_VERSION_2|$TARGET_VERSION_2|g" $F
+ sed -i -e "s|$ORIG_VERSION|$TARGET_VERSION|g" $F
+done
+
+echo "once you copy the old version into a new branch"
+echo "edit debian/control, update the VCS links"
+echo "edit debian/control, update the source pkg name"
+echo "edit debian/changelog, update the source pkg name"
--- /dev/null
+tools/clang/bindings/python/clang/ /usr/lib/python2.7/dist-packages/
--- /dev/null
+usr/lib/llvm-@LLVM_VERSION@/lib/python2.7/site-packages/lldb/
--- /dev/null
+usr/lib/@DEB_HOST_MULTIARCH@/libLLVM-@LLVM_VERSION_FULL@.so.1 usr/lib/llvm-@LLVM_VERSION@/lib/python2.7/site-packages/lldb/libLLVM-@LLVM_VERSION_FULL@.so.1
+usr/lib/@DEB_HOST_MULTIARCH@/libLLVM-@LLVM_VERSION_FULL@.so.1 usr/lib/llvm-@LLVM_VERSION@/lib/python2.7/site-packages/lldb/libLLVM-@LLVM_VERSION@.so.1
+usr/lib/@DEB_HOST_MULTIARCH@/liblldb-@LLVM_VERSION@.so.1 usr/lib/llvm-@LLVM_VERSION@/lib/python2.7/site-packages/lldb/_lldb.so
+usr/lib/llvm-@LLVM_VERSION@/lib/python2.7/site-packages/lldb/ usr/lib/python2.7/dist-packages/lldb
+
+
--- /dev/null
+#!/bin/sh
+# Stop at the first error
+set -e
+
+VERSION=6.0
+
+if test ! -f /usr/bin/llvm-config-$VERSION; then
+ echo "Install llvm-$VERSION & llvm-$VERSION-dev"
+ exit 1
+fi
+llvm-config-$VERSION --link-shared --libs &> /dev/null
+
+echo '#include <stdlib.h>
+int main() {
+ char *x = (char*)malloc(10 * sizeof(char*));
+ free(x);
+ return x[5];
+}
+' > foo.c
+clang-$VERSION -o foo -fsanitize=address -O1 -fno-omit-frame-pointer -g foo.c
+if ! ./foo 2>&1 | grep -q heap-use-after-free ; then
+ echo "sanitize=address is failing"
+ exit 42
+fi
+
+echo 'int main() {return 0;}' > foo.c
+clang-$VERSION foo.c
+
+echo '#include <stddef.h>' > foo.c
+clang-$VERSION -c foo.c
+
+echo "#include <fenv.h>" > foo.cc
+NBLINES=$(clang++-$VERSION -P -E foo.cc|wc -l)
+if test $NBLINES -lt 100; then
+ echo "Error: more than 100 lines should be returned"
+ exit 42
+fi
+
+echo '#include <emmintrin.h>' > foo.cc
+clang++-$VERSION -c foo.cc
+
+echo '
+#include <string.h>
+int
+main ()
+{
+ (void) strcat;
+ return 0;
+}' > foo.c
+clang-$VERSION -c foo.c
+
+echo '#include <errno.h>
+int main() {} ' > foo.c
+clang-$VERSION foo.c
+
+echo '#include <chrono>
+int main() { }' > foo.cpp
+clang++-$VERSION -std=c++11 foo.cpp
+
+echo '#include <stdio.h>
+int main() {
+if (1==1) {
+ printf("true");
+}else{
+ printf("false");
+ return 42;
+}
+return 0;}' > foo.c
+clang-$VERSION --coverage foo.c -o foo
+./foo > /dev/null
+if test ! -f foo.gcno; then
+ echo "Coverage failed";
+fi
+
+echo "#include <iterator>" > foo.cpp
+clang++-$VERSION -c foo.cpp
+
+
+echo '#include <stdio.h>
+int main() {
+if (1==1) {
+ printf("true");
+}else{
+ printf("false");
+ return 42;
+}
+return 0;}' > foo.c
+rm foo
+
+if test ! -f /usr/lib/llvm-$VERSION/bin/../lib/LLVMgold.so; then
+ echo "Install llvm-$VERSION-dev"
+ exit 1
+fi
+
+clang-$VERSION -flto foo.c -o foo
+./foo > /dev/null
+
+clang-$VERSION -fuse-ld=gold foo.c -o foo
+./foo > /dev/null
+
+# test thinlto
+echo "int foo(void) { return 0; }"> foo.c
+echo "int foo(void); int main() {foo(); return 0;}">main.c
+clang-$VERSION -flto=thin -O2 foo.c main.c -o foo
+./foo > /dev/null
+
+if test ! -f /usr/bin/lld-$VERSION; then
+ echo "Install lld-$VERSION"
+ exit 1
+fi
+clang-$VERSION -fuse-ld=lld -O2 foo.c main.c -o foo
+./foo > /dev/null
+
+clang-$VERSION -fuse-ld=lld-$VERSION -O2 foo.c main.c -o foo
+./foo > /dev/null
+
+cat << EOF > test_fuzzer.cc
+#include <stdint.h>
+#include <stddef.h>
+extern "C" int LLVMFuzzerTestOneInput(const uint8_t *data, size_t size) {
+ if (size > 0 && data[0] == 'H')
+ if (size > 1 && data[1] == 'I')
+ if (size > 2 && data[2] == '!')
+ __builtin_trap();
+ return 0;
+}
+EOF
+
+if test ! -f /usr/lib/llvm-$VERSION/lib/libFuzzer.a; then
+ echo "Install libfuzzer-$VERSION-dev";
+ exit -1;
+fi
+
+clang++-$VERSION -fsanitize=address -fsanitize-coverage=edge test_fuzzer.cc /usr/lib/llvm-$VERSION/lib/libFuzzer.a
+if ! ./a.out 2>&1 | grep -q -E "(Test unit written|PreferSmall)"; then
+ echo "fuzzer"
+ exit 42
+fi
+clang-$VERSION -fsanitize=fuzzer test_fuzzer.cc
+if ! ./a.out 2>&1 | grep -q -E "(Test unit written|PreferSmall)"; then
+ echo "fuzzer"
+ exit 42
+fi
+
+echo 'int main() {
+ int a=0;
+ return a;
+}
+' > foo.c
+clang++-$VERSION -g -o bar foo.c
+echo "b main
+run
+bt
+quit" > lldb-cmd.txt
+
+if test ! -f /usr/bin/lldb-$VERSION; then
+ echo "Install lldb-$VERSION";
+ exit -1;
+fi
+
+
+lldb-$VERSION -s lldb-cmd.txt bar
+echo '
+#include <vector>
+int main (void)
+{ std::vector<int> a;
+ a.push_back (0);
+}
+' > foo.cpp
+clang++-$VERSION -g -o foo foo.cpp
+echo 'target create "./foo"
+b main
+r
+n
+p a
+quit' > lldb-cmd.txt
+lldb-$VERSION -s lldb-cmd.txt ./foo
+
+echo "int main() { return 1; }" > foo.c
+clang-$VERSION -fsanitize=efficiency-working-set -o foo foo.c
+./foo > /dev/null || true
+
+
+rm -rf cmaketest && mkdir cmaketest
+cat > cmaketest/CMakeLists.txt <<EOF
+cmake_minimum_required(VERSION 2.8.12)
+project(SanityCheck)
+find_package(LLVM $VERSION REQUIRED CONFIG)
+message(STATUS "LLVM_CMAKE_DIR: \${LLVM_CMAKE_DIR}")
+if(NOT EXISTS "\${LLVM_TOOLS_BINARY_DIR}/clang")
+message(FATAL_ERROR "Invalid LLVM_TOOLS_BINARY_DIR: \${LLVM_TOOLS_BINARY_DIR}")
+endif()
+# TODO add version to ClangConfig.cmake and use $VERSION below
+find_package(Clang REQUIRED CONFIG)
+find_file(H clang/AST/ASTConsumer.h PATHS \${CLANG_INCLUDE_DIRS} NO_DEFAULT_PATH)
+message(STATUS "CLANG_INCLUDE_DIRS: \${CLANG_INCLUDE_DIRS}")
+if(NOT H)
+message(FATAL_ERROR "Invalid Clang header path: \${CLANG_INCLUDE_DIRS}")
+endif()
+EOF
+mkdir cmaketest/standard cmaketest/explicit
+echo "Test: CMake find LLVM and Clang in default path"
+(cd cmaketest/standard && CC=clang-$VERSION CXX=clang++-$VERSION cmake ..)
+echo "Test: CMake find LLVM and Clang in explicit prefix path"
+(cd cmaketest/explicit && CC=clang-$VERSION CXX=clang++-$VERSION CMAKE_PREFIX_PATH=/usr/lib/llvm-$VERSION cmake ..)
+rm -rf cmaketest
+
+# Test case for bug #900440
+rm -rf cmaketest && mkdir cmaketest
+cat > cmaketest/CMakeLists.txt <<EOF
+cmake_minimum_required(VERSION 2.8.12)
+project(testllvm)
+
+find_package(LLVM CONFIG REQUIRED)
+find_package(Clang CONFIG REQUIRED)
+
+if(NOT LLVM_VERSION STREQUAL Clang_VERSION)
+ #message(FATAL_ERROR "LLVM ${LLVM_VERSION} not matching to Clang ${Clang_VERSION}")
+endif()
+EOF
+mkdir cmaketest/foo/
+(cd cmaketest/foo && cmake ..)
+rm -rf cmaketest
+
+
+CLANG=clang-$VERSION
+#command -v "$CLANG" 1>/dev/null 2>/dev/null || { printf "Usage:\n%s CLANGEXE [ARGS]\n" "$0" 1>&2; exit 1; }
+#shift
+
+TEMPDIR=$(mktemp -d); trap "rm -rf \"$TEMPDIR\"" 0
+
+cat > "$TEMPDIR/test.c" <<EOF
+#include <stdlib.h>
+#include <stdio.h>
+int main ()
+{
+#if __has_feature(address_sanitizer)
+ puts("address_sanitizer");
+#endif
+#if __has_feature(thread_sanitizer)
+ puts("thread_sanitizer");
+#endif
+#if __has_feature(memory_sanitizer)
+ puts("memory_sanitizer");
+#endif
+#if __has_feature(undefined_sanitizer)
+ puts("undefined_sanitizer");
+#endif
+#if __has_feature(dataflow_sanitizer)
+ puts("dataflow_sanitizer");
+#endif
+#if __has_feature(efficiency_sanitizer)
+ puts("efficiency_sanitizer");
+#endif
+ printf("Ok\n");
+ return EXIT_SUCCESS;
+}
+EOF
+
+#clean up
+rm a.out bar crash-* foo foo.* lldb-cmd.txt main.c test_fuzzer.cc
+
+# only for AMD64 for now
+# many sanitizers only work on AMD64
+# x32 programs need to be enabled in the kernel bootparams for debian
+# (https://wiki.debian.org/X32Port)
+#
+# SYSTEM should iterate multiple targets (eg. x86_64-unknown-none-gnu for embedded)
+# MARCH should iterate the library architectures via flags
+# LIB should iterate the different libraries
+echo "if it fails, please run"
+echo "apt-get install libc6-dev:i386 libgcc-5-dev:i386 libc6-dev-x32 libx32gcc-5-dev libx32gcc-8-dev"
+for SYSTEM in ""; do
+ for MARCH in -m64 -m32 -mx32 "-m32 -march=i686"; do
+ for LIB in --rtlib=compiler-rt -fsanitize=address -fsanitize=thread -fsanitize=memory -fsanitize=undefined -fsanitize=dataflow; do # -fsanitize=efficiency-working-set; do
+ if test "$MARCH" == "-m32" -o "$MARCH" == "-mx32"; then
+ if test $LIB == "-fsanitize=thread" -o $LIB == "-fsanitize=memory" -o $LIB == "-fsanitize=dataflow" -o $LIB == "-fsanitize=address" -o $LIB == "-fsanitize=undefined"; then
+ echo "Skip $MARCH / $LIB";
+ continue
+ fi
+ fi
+ if test "$MARCH" == "-m32 -march=i686"; then
+ if test $LIB == "-fsanitize=memory" -o $LIB == "-fsanitize=thread" -o $LIB == "-fsanitize=dataflow"; then
+ echo "Skip $MARCH / $LIB";
+ continue
+ fi
+ fi
+ XARGS="$SYSTEM $MARCH $LIB"
+ printf "\nTest: clang %s\n" "$XARGS"
+ rm -f "$TEMPDIR/test"
+ "$CLANG" $XARGS -o "$TEMPDIR/test" "$@" "$TEMPDIR/test.c"
+ [ ! -e "$TEMPDIR/test" ] || { "$TEMPDIR/test" || printf 'Error\n'; }
+ done
+ done
+done
+
+echo "If the following fails, try setting an environment variable such as:"
+echo "OBJC_INCLUDE_PATH=/usr/lib/gcc/x86_64-linux-gnu/7/include"
+echo "libobjc-7-dev should be also installed"
+echo "#include <objc/objc.h>" > foo.m
+clang-$VERSION -c foo.m
+
+if test ! -f /usr/lib/llvm-$VERSION/lib/libclangBasic.a; then
+ echo "Install libclang-$VERSION-dev"
+ exit 1
+fi
+
+echo "Completed"
--- /dev/null
+#!/usr/bin/make -f
+
+PATH := $(PATH):$(CURDIR)/bin
+export PATH
+
+TARGET_BUILD := build-llvm
+DEB_INST := $(CURDIR)/debian/tmp/
+
+GXX_VERSIONED_PACKAGE := $(shell dpkg-query -W -f '$${Depends}' g++ | grep -o 'g++-[0-9][0-9.]*' | tail -n1 )
+GXX_VERSIONED_EXECUTABLE := $(shell dpkg -L $(GXX_VERSIONED_PACKAGE) | grep '/usr/bin/g++-[0-9][0-9.]*' | xargs ls -d | tail -n1 )
+GCC_VERSION := $(subst /usr/bin/g++-,,$(GXX_VERSIONED_EXECUTABLE))
+
+LLVM_VERSION := $(shell dpkg-parsechangelog | sed -rne "s,^Version: 1:([0-9]+).([0-9]+).*,\1.\2,p")
+LLVM_VERSION_FULL := $(shell dpkg-parsechangelog | sed -rne "s,^Version: 1:([0-9.]+)(~|-)(.*),\1,p")
+ifeq ($(LLVM_VERSION),$(LLVM_VERSION_FULL))
+ LLVM_VERSION_FULL := $(LLVM_VERSION).0
+endif
+
+SONAME_EXT := 1
+# Manage the case when the version is 1:3.5~svn213052-1~exp1 or 1:3.4.2-1
+DEBIAN_REVISION := $(shell dpkg-parsechangelog | sed -rne "s,^Version: 1:([0-9.]+)(~|-)(.*),\3,p")
+ifneq (,$(filter parallel=%,$(subst $(COMMA), ,$(DEB_BUILD_OPTIONS))))
+ NJOBS := -j $(subst parallel=,,$(filter parallel=%,$(subst $(COMMA), ,$(DEB_BUILD_OPTIONS))))
+endif
+
+VENDOR=$(shell lsb_release -is)
+DH_VERSION := $(shell dpkg -s debhelper | grep '^Version' | awk '{print $$2}')
+
+DEB_HOST_MULTIARCH ?= $(shell dpkg-architecture -qDEB_HOST_MULTIARCH)
+DEB_HOST_GNU_TYPE ?= $(shell dpkg-architecture -qDEB_HOST_GNU_TYPE)
+DEB_HOST_ARCH_BITS ?= $(shell dpkg-architecture -qDEB_HOST_ARCH_BITS)
+DEB_HOST_ARCH ?= $(shell dpkg-architecture -qDEB_HOST_ARCH)
+DEB_HOST_ARCH_OS ?= $(shell dpkg-architecture -qDEB_HOST_ARCH_OS)
+
+LDFLAGS_EXTRA =
+CXXFLAGS_EXTRA = -std=c++0x
+CONFIGURE_EXTRA =
+CMAKE_EXTRA =
+
+ifneq (,$(filter $(DEB_HOST_ARCH),powerpc powerpcspe))
+LDFLAGS_EXTRA += -latomic
+endif
+
+# Only enable gsplit dwarf on archs which needs it (32 bits)
+ifeq ($(DEB_HOST_ARCH_BITS),32)
+ifeq ($(shell dpkg --compare-versions $(shell dpkg-query -W -f '$${Version}' binutils) ge 2.22.52.0.4 ; echo $$?),0)
+# when using -gsplit-dwarf, it will requires extract-dwo which doesn't exist on precise:
+# More: https://llvm.org/bugs/show_bug.cgi?id=28841
+ifeq ($(shell dpkg --compare-versions $(shell dpkg-query -W -f '$${Version}' g++-$(GCC_VERSION)) lt 7.1.0-7~ || \
+ dpkg --compare-versions $(shell dpkg-query -W -f '$${Version}' g++-$(GCC_VERSION)) ge 7.2.0-2; echo $$?),0)
+# Only pass -gsplit-dwarf with working version of gcc 7
+# More: https://bugs.llvm.org/show_bug.cgi?id=34140 & https://bugs.debian.org/873609
+CXXFLAGS_EXTRA += -gsplit-dwarf
+else
+$(error "Broken gcc version for -gsplit-dwarf support. Please use < gcc 7 or >= 7.2.0-2")
+endif # < gcc 7 or >= 7.2.0-2
+endif # binutils
+endif # archs
+
+ifeq ($(shell dpkg --compare-versions $(shell dpkg-query -W -f '$${Version}' g++-$(GCC_VERSION)) lt 4.9-20140411-1~ ; echo $$?),0)
+# Too old version of gcc. Force 4.9
+ GCC_VERSION := 4.9
+endif
+
+export CC=gcc-$(GCC_VERSION)
+export CXX=g++-$(GCC_VERSION)
+
+opt_flags = -O2 -DNDEBUG
+
+ifneq (,$(findstring $(DEB_HOST_ARCH),armel))
+ opt_flags += -marm
+ # 3.8 fails to build, disable the compiler_rt builtins
+ # See http://lists.llvm.org/pipermail/llvm-dev/2016-May/099761.html
+ CMAKE_EXTRA += -DCOMPILER_RT_BUILD_BUILTINS=OFF
+ # Prevent clang from getting a > v4t default
+ # See bug #868779
+ CMAKE_EXTRA += -DLLVM_HOST_TRIPLE=arm-linux-gnueabi
+endif
+
+ifeq ($(shell dpkg --compare-versions $(shell dpkg-query -W -f '$${Version}' g++-$(GCC_VERSION)) ge 4.8-20121128-1~ ; echo $$?),0)
+ control_vars = '-Vdep:devlibs=libstdc++-$(GCC_VERSION)-dev, libgcc-$(GCC_VERSION)-dev' \
+ '-Vdep:devlibs-objc=libobjc-$(GCC_VERSION)-dev'
+else ifeq ($(shell dpkg --compare-versions $(shell dpkg-query -W -f '$${Version}' g++-$(GCC_VERSION)) ge 4.7.2-10~ ; echo $$?),0)
+ control_vars = '-Vdep:devlibs=libstdc++6-$(GCC_VERSION)-dev, libgcc-$(GCC_VERSION)-dev' \
+ '-Vdep:devlibs-objc=libobjc-$(GCC_VERSION)-dev'
+else
+ control_vars = '-Vdep:devlibs=libstdc++6-$(GCC_VERSION)-dev'
+endif
+
+BINUTILS_GOLD_ARCHS := amd64 arm64 armhf i386 ppc64 ppc64el sparc sparc64 x32 s390x hurd-i386
+ifeq ($(shell dpkg --compare-versions $(shell dpkg-query -W -f '$${Version}' binutils) ge 2.23.1-1~exp3 ; echo $$?),0)
+ifneq (,$(filter $(DEB_HOST_ARCH),$(BINUTILS_GOLD_ARCHS)))
+# -fused-ld=gold enables the gold linker (but is not supported by all archs / distro)
+ LDFLAGS_EXTRA += -fuse-ld=gold --no-keep-files-mapped --no-map-whole-files
+ CXXFLAGS_EXTRA += -fuse-ld=gold -Wl,--no-keep-files-mapped -Wl,--no-map-whole-files
+ CMAKE_EXTRA += -DLLVM_BINUTILS_INCDIR=/usr/include/
+endif
+endif
+
+# Enable polly (or not)
+POLLY_ENABLE=yes
+ifneq (,$(filter $(DEB_HOST_ARCH), powerpc powerpcspe))
+ POLLY_ENABLE=no
+endif
+
+RUN_TEST=yes
+ifneq (,$(filter nocheck,$(DEB_BUILD_OPTIONS)))
+ RUN_TEST=no
+endif
+
+ifneq (,$(filter codecoverage,$(DEB_BUILD_OPTIONS)))
+# enable the code coverage
+ CODECOVERAGE=yes
+# for -fvisibility-inlines-hidden see http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20130729/183016.html
+ CXXFLAGS_EXTRA += -fprofile-arcs -ftest-coverage
+ LDFLAGS_EXTRA += -coverage -lgcov
+ RUN_TEST=yes
+endif
+
+ifneq (,$(filter scan-build,$(DEB_BUILD_OPTIONS)))
+# enable the build using scan-build
+# The package are installed through the variable declarations:
+# OTHERMIRROR="deb http://llvm.org/apt/unstable/ llvm-toolchain main"
+# EXTRAPACKAGES="clang-3.5"
+ PRE_PROCESS=scan-build-$(LLVM_VERSION) --show-description -analyzer-config stable-report-filename=true -enable-checker optin.performance.Padding
+ PRE_PROCESS_CONF=scan-build-$(LLVM_VERSION)
+# no need to run tests in this case
+ RUN_TEST=no
+ CONFIGURE_EXTRA += --enable-assertions
+ CMAKE_EXTRA += -DLLVM_ENABLE_ASSERTIONS=ON
+endif
+
+ifneq (,$(filter coverity,$(DEB_BUILD_OPTIONS)))
+# enable the build using coverity
+# pbuilder contains BINDMOUNTS="/opt/cov-analysis/"
+# And we have some pbuilder hooks to configure and pack the result
+# Where the binaries are installed on the jenkins instance
+ PRE_PROCESS=PATH=$$PATH:/opt/cov-analysis/bin/ cov-build --dir cov-int
+# We don't want to check the temporary files produced by the configure
+ PRE_PROCESS_CONF=
+ COVERITY_ENABLE=1
+ CONFIGURE_EXTRA += --enable-assertions
+ CMAKE_EXTRA += -DLLVM_ENABLE_ASSERTIONS=ON
+# no need to run tests in this case
+ RUN_TEST=no
+else
+ COVERITY_ENABLE=0
+endif
+
+LLDB_ENABLE=yes
+LLDB_DISABLE_ARCHS := hurd-i386 ia64 powerpc powerpcspe ppc64 s390x sparc64
+# hurd has threading issues
+ifeq (,$(filter-out $(LLDB_DISABLE_ARCHS), $(DEB_HOST_ARCH)))
+# Disable LLDB for this arch.
+ LLDB_ENABLE=no
+else
+# See https://llvm.org/bugs/show_bug.cgi?id=28898
+# Enable it again as it seems it is fixed upstream https://bugs.llvm.org/show_bug.cgi?id=35291
+# CMAKE_EXTRA += -DLLDB_DISABLE_LIBEDIT=ON
+endif
+
+LLD_ENABLE=yes
+
+DH_OPTIONS=
+OCAML_ENABLE= no
+OCAML_ARCHS := amd64 arm64 armel armhf i386 ppc64el s390x
+ifneq (,$(filter $(DEB_HOST_ARCH),$(OCAML_ARCHS)))
+# Enable OCAML for this arch.
+ # OCAML_ENABLE=yes
+ # OCAML_STDLIB_DIR ?= $(shell ocamlc -where)
+ # DH_OPTIONS=--with ocaml,python2
+else
+ DH_OPTIONS=--with python2
+endif
+# Force the deactivation of ocaml until the transition is done
+OCAML_ENABLE=no
+
+LIBFUZZER_ENABLE=yes
+ifeq (,$(filter $(DEB_HOST_ARCH_OS),linux))
+ LIBFUZZER_ENABLE=no
+endif
+
+
+%:
+ dh $@ $(DH_OPTIONS)
+
+
+preconfigure:
+ for f in debian/*.in; do \
+ f2=$$(echo $$f | sed 's/\.in$$//;s/X\.Y/$(LLVM_VERSION)/'); \
+ echo "$$f => $$f2"; \
+ sed -e 's|@DEB_HOST_MULTIARCH@|$(DEB_HOST_MULTIARCH)|g' \
+ -e "s|@OCAML_STDLIB_DIR@|$(OCAML_STDLIB_DIR)|g" \
+ -e "s|@LLVM_VERSION_FULL@|$(LLVM_VERSION_FULL)|g" \
+ -e "s|@LLVM_VERSION@|$(LLVM_VERSION)|g" $$f > $$f2; \
+ done
+ mkdir -p bin
+ ln -sf /usr/bin/python2 bin/python
+
+# Override this two targets. They are trying to manage the .in conversion for me
+override_dh_ocamlinit:
+override_dh_ocamlclean:
+
+override_dh_auto_configure: preconfigure
+ echo "Using gcc: "
+ $(CC) -v
+ mkdir -p $(TARGET_BUILD)
+ mkdir -p clang/include/clang/Debian
+ sed -e "s|@DEB_PATCHSETVERSION@|$(DEBIAN_REVISION)|" \
+ debian/debian_path.h > clang/include/clang/Debian/debian_path.h
+
+# Remove some old symlinks
+ cd tools/ && \
+ if test -h clang; then \
+ rm clang; \
+ fi; \
+ ln -s ../clang .; \
+ readlink clang
+
+ if test "$(POLLY_ENABLE)" = yes; then \
+ cd tools/ && \
+ if test -h polly; then \
+ rm polly; \
+ fi; \
+ ln -s ../polly .; \
+ fi
+
+ if test "$(LLD_ENABLE)" = yes; then \
+ cd tools/ && \
+ if test -h lld; then \
+ rm lld; \
+ fi; \
+ ln -s ../lld .; \
+ readlink lld; \
+ fi
+
+ if test "$(LLDB_ENABLE)" = yes; then \
+ cd tools/ && \
+ if test -h lldb; then \
+ rm lldb; \
+ fi; \
+ ln -s ../lldb .; \
+ fi
+
+ cd projects/ && \
+ if test -h compiler-rt; then \
+ rm compiler-rt; \
+ fi; \
+ ln -s ../compiler-rt .; \
+ readlink compiler-rt
+
+ # Configure coverity (we need the compilers) + work around perf issues
+ -(if test $(COVERITY_ENABLE) -eq 1; then \
+ export PATH=$$PATH:/opt/cov-analysis/bin/; \
+ cov-configure --compiler clang --comptype clang; \
+ cov-configure --compiler gcc-$(GCC_VERSION) --comptype gcc; \
+ cov-configure --compiler g++-$(GCC_VERSION) --comptype gcc; \
+ cov-configure -co /usr/bin/g++-$(GCC_VERSION) --comptype gcc -- -std=c++0x -fPIC -std=c++11; \
+ cov-configure -co /usr/bin/gcc-$(GCC_VERSION) --comptype gcc -- -fPIC; \
+ cov-configure -co /usr/bin/g++-$(GCC_VERSION) --comptype gcc -- -std=c++0x -fPIC -std=c++11 -fno-exceptions; \
+ cov-configure -co /usr/bin/g++-$(GCC_VERSION) --comptype gcc --template \
+ --xml-option append_arg:"--ppp_translator" \
+ --xml-option append_arg:"replace/llvm::AlignOf<PrevTy>::Alignment/(llvm::AlignOf<PrevTy>::Alignment)" \
+ --xml-option append_arg:"--ppp_translator" \
+ --xml-option append_arg:"replace/llvm::AlignOf<NextTy>::Alignment/(llvm::AlignOf<NextTy>::Alignment)"; \
+ cov-configure --compiler c++ --comptype g++ --template \
+ --xml-option append_arg:"--ppp_translator" \
+ --xml-option append_arg:"replace/llvm::AlignOf<PrevTy>::Alignment/(llvm::AlignOf<PrevTy>::Alignment)" \
+ --xml-option append_arg:"--ppp_translator" \
+ --xml-option append_arg:"replace/llvm::AlignOf<NextTy>::Alignment/(llvm::AlignOf<NextTy>::Alignment)"; \
+ fi)
+
+ # Due to bug upstream, no symlink here
+ rm -fr tools/clang/tools/extra
+ cp -R -H clang-tools-extra tools/clang/tools/extra
+
+ echo "Running tests: $(RUN_TEST)"
+
+ # if cmake is installed in /tmp/cmake/ uses it
+ # Used to build llvm on old ubuntu (precise) on the llvm.org/apt/ ci
+ CMAKE_BIN=cmake; \
+ if test -f /tmp/cmake/bin/cmake; then \
+ CMAKE_BIN=/tmp/cmake/bin/cmake; \
+ fi; \
+ echo "Using cmake: $$CMAKE_BIN"; \
+ cd $(TARGET_BUILD) && \
+ $(PRE_PROCESS_CONF) $$CMAKE_BIN ../ \
+ -DCMAKE_INSTALL_PREFIX=/usr/lib/llvm-$(LLVM_VERSION) \
+ -DCMAKE_VERBOSE_MAKEFILE=ON \
+ -DCMAKE_BUILD_TYPE=RelWithDebInfo \
+ -DCMAKE_CXX_FLAGS_RELWITHDEBINFO="$(opt_flags)" \
+ -DCMAKE_CXX_FLAGS='$(CXXFLAGS_EXTRA)' \
+ -DLLVM_LINK_LLVM_DYLIB=ON \
+ -DLLVM_INSTALL_UTILS=ON \
+ -DLLVM_VERSION_SUFFIX= \
+ -DLLVM_ENABLE_SPHINX=OFF \
+ -DSPHINX_WARNINGS_AS_ERRORS=OFF \
+ -DLLVM_BUILD_LLVM_DYLIB=ON \
+ -DLLVM_ENABLE_RTTI=ON \
+ -DLLVM_ENABLE_FFI=ON \
+ $(CMAKE_EXTRA) \
+ -DLIBCLANG_LIBRARY_VERSION=$(SONAME_EXT) \
+ -DPOLLY_BUNDLED_JSONCPP=OFF \
+ -DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD="WebAssembly;AVR"
+
+override_dh_auto_build:
+ $(PRE_PROCESS) $(MAKE) $(NJOBS) -C $(TARGET_BUILD) VERBOSE=1 CLANG_VENDOR=$(VENDOR) CXXFLAGS="$(CXXFLAGS_EXTRA)" LDFLAGS="$(LDFLAGS_EXTRA)" REQUIRES_RTTI=1 DEBUGMAKE=1
+ifeq (${LIBFUZZER_ENABLE},yes)
+ cd $(TARGET_BUILD) \
+ CFLAGS=`dpkg-buildflags --get CFLAGS`; \
+ CFLAGS="$$CFLAGS `dpkg-buildflags --get CPPFLAGS`"; \
+ echo $$CFLAGS; \
+ bin/clang++ -c $$CFLAGS -std=c++11 ../compiler-rt/lib/fuzzer/*.cpp -IFuzzer; \
+ ar ruv libFuzzer.a Fuzzer*.o
+endif
+
+override_dh_prep: build_doc
+ dh_prep
+
+build_doc:
+ -(if test "$(OCAML_ENABLE)" = yes; then \
+ $(MAKE) $(NJOBS) -C "$(TARGET_BUILD)/docs" ocaml_doc; \
+ fi)
+
+# Continue if failing, Ubuntu precise cannot generate manpages as sphinx is too old
+ -(cd $(TARGET_BUILD) && make $(NJOBS) docs-llvm-html docs-clang-html docs-clang-tools-html docs-polly-html docs-polly-man docs-clang-tools-man docs-clang-man docs-llvm-man)
+
+# Rename manpages
+ d=$(CURDIR)/docs/_build/man/; \
+ if test -d $$d; then \
+ cd $$d; \
+ for f in *.1; do \
+ echo "$$f"|grep $(LLVM_VERSION) || mv $$f `echo $$f|sed "s|\.1|-$(LLVM_VERSION).1|"`; \
+ done; \
+ else \
+ echo "could not find $$d"; \
+ fi
+
+ mkdir -p debian/man/
+ help2man --no-info --version-string=$(LLVM_VERSION) clang/tools/scan-view/bin/scan-view > debian/man/scan-view-$(LLVM_VERSION).1
+ help2man --no-info --version-string=$(LLVM_VERSION) clang/tools/clang-format/clang-format-diff.py > debian/man/clang-format-diff-$(LLVM_VERSION).1
+
+ CMDS="llvm-dwarfdump llvm-mc llvm-mcmarkup llvm-objdump llvm-rtdyld llvm-size llvm-ranlib lldb lldb-mi clang-format clang clang++ clang-tblgen clang-check clang-cpp clang-import-test clang-tidy clang-apply-replacements clang-rename clang-query pp-trace sancov lli modularize clang-include-fixer find-all-symbols clang-reorder-fields ld.lld llvm-tblgen clang-change-namespace clang-offload-bundler"; \
+ for f in $$CMDS; do \
+ echo "Generating manpage of $$f"; \
+ LD_LIBRARY_PATH=$(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/lib/:/usr/lib/*/libfakeroot help2man --no-info --version-string=$(LLVM_VERSION) $(TARGET_BUILD)/bin/$$f > debian/man/$$f-$(LLVM_VERSION).1; \
+ done
+
+override_dh_auto_install:
+ # Clean up temporary files to make sure the install works
+ rm -rf $(find $(TARGET_BUILD) -wholename '*CMakeFiles*' -not -name CMakeLists.txt -a -name "*.dir" -type d)
+ # install/fast enables a make install without recompiling temporary files
+ $(MAKE) -C $(TARGET_BUILD) VERBOSE=1 install/fast DESTDIR=$(DEB_INST)/
+ # Not used on Linux.
+ rm -f $(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/bin/argdumper
+ rm -f $(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/share/clang/clang-format-bbedit.applescript
+
+ cp $(TARGET_BUILD)/bin/clang-query $(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/bin
+
+ # Only run on executable, not script
+ chrpath -d `find $(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/bin/ -type f -executable -exec file -i '{}' \; | grep 'x-executable; charset=binary'|cut -d: -f1`
+
+ cd debian/tmp/usr/lib/llvm-$(LLVM_VERSION)/lib/ && rm -f libclang.so.$(SONAME_EXT) libclang-$(LLVM_VERSION).so; \
+ ln -s libclang-$(LLVM_VERSION).so.$(SONAME_EXT) libclang.so.$(SONAME_EXT)
+
+# Remove artifact (where compiler-rt is built)
+# if test -d $(TARGET_BUILD)/tools/clang/runtime/compiler-rt/clang_linux; then \
+# cd $(TARGET_BUILD)/tools/clang/runtime/compiler-rt/clang_linux && rm -rf $$(find . -mindepth 2 -maxdepth 2 -type d) && rm -rf $$(find -empty) && rm -rf */.dir; \
+# fi
+
+ mkdir -p $(CURDIR)/debian/clang-$(LLVM_VERSION)/usr/bin/
+ cp compiler-rt/lib/asan/scripts/asan_symbolize.py $(CURDIR)/debian/clang-$(LLVM_VERSION)/usr/bin/asan_symbolize-$(LLVM_VERSION)
+
+ifeq (${LIBFUZZER_ENABLE},yes)
+ mkdir -p $(CURDIR)/debian/libfuzzer-$(LLVM_VERSION)-dev/usr/lib/llvm-$(LLVM_VERSION)/lib/
+ cp -v $(TARGET_BUILD)/libFuzzer.a $(CURDIR)/debian/libfuzzer-$(LLVM_VERSION)-dev/usr/lib/llvm-$(LLVM_VERSION)/lib/
+endif
+
+# Create this fake directory to make the install libclang-common-dev happy
+# under the unsupported archs of compiler-rt
+ mkdir -p $(DEB_INST)/usr/lib/clang/$(LLVM_VERSION)/lib
+ mkdir -p $(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/lib/clang/$(LLVM_VERSION_FULL)/lib/
+ mkdir -p $(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/lib/clang/$(LLVM_VERSION)/lib/clang_linux/
+ mkdir -p $(TARGET_BUILD)/tools/clang/runtime/compiler-rt/clang_linux/
+ mkdir -p $(TARGET_BUILD)/tools/clang/runtime/compiler-rt/clang_linux/
+# On some archs, the sanatizers are not built. As we explicitly includes some txt files, create
+# a fake txt to make sure it doesn't fail
+ echo "The *.txt files, if available, contain helper to override some of the errors messages." > $(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/lib/clang/$(LLVM_VERSION_FULL)/README.txt
+ echo "Please visit https://github.com/google/sanitizers/wiki/AddressSanitizer for help" >> $(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/lib/clang/$(LLVM_VERSION_FULL)/README.txt
+
+# idem for the lldb python binding
+ mkdir -p $(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/lib/python2.7/site-packages/lldb/
+
+# Remove things that CMake install but which aren't packaged yet,
+# or are packaged from the source or build tree.
+ mv $(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/bin/clang-$(LLVM_VERSION) \
+ $(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/bin/clang
+
+# Don't think it is used
+ rm -f $(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/lib/libPolly*a
+# Probably useless
+ rm -f $(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/lib/python2.7/site-packages/six.py
+
+# Rename binaries
+ mkdir -p $(DEB_INST)/usr/bin/
+ cd $(DEB_INST)/usr/bin/; \
+ rm -f *; \
+ for f in ../lib/llvm-$(LLVM_VERSION)/bin/*; do \
+ ln -s $$f `basename $$f`-$(LLVM_VERSION); \
+ echo "Link $$f to `basename $$f`-$(LLVM_VERSION)"; \
+ done
+
+# Rename some stuff with the version name
+ cp $(CURDIR)/clang/tools/scan-build/man/scan-build.1 $(CURDIR)/clang/tools/scan-build/man/scan-build-$(LLVM_VERSION).1
+
+ # copy the vim files (except that tablegen does not exist for indent
+ VIM_DIRS="ftdetect ftplugin syntax indent"; \
+ for dir in $$VIM_DIRS; do \
+ cp -f $(CURDIR)/utils/vim/$$dir/llvm.vim $(CURDIR)/utils/vim/$$dir/llvm-$(LLVM_VERSION).vim; \
+ if test -f $(CURDIR)/utils/vim/$$dir/tablegen.vim; then \
+ cp -f $(CURDIR)/utils/vim/$$dir/tablegen.vim $(CURDIR)/utils/vim/$$dir/tablegen-$(LLVM_VERSION).vim; \
+ fi; \
+ done
+ cp -f $(CURDIR)/utils/vim/vimrc $(CURDIR)/utils/vim/llvm-$(LLVM_VERSION)-vimrc
+
+ cp -f $(CURDIR)/clang/tools/clang-format/clang-format-diff.py $(CURDIR)/clang/tools/clang-format/clang-format-diff-$(LLVM_VERSION)
+
+ cp -f $(CURDIR)/clang/tools/clang-format/clang-format.py clang/tools/clang-format/clang-format-$(LLVM_VERSION).py
+
+ rm -rf clang/tools/scan-build-$(LLVM_VERSION)
+ cp -fR $(CURDIR)/clang/tools/scan-build clang/tools/scan-build-$(LLVM_VERSION)
+
+ rm -rf clang/tools/scan-build-py-$(LLVM_VERSION)
+ cp -fR $(CURDIR)/clang/tools/scan-build-py clang/tools/scan-build-py-$(LLVM_VERSION)
+ chmod +x clang/tools/scan-build-py-$(LLVM_VERSION)/bin/*
+
+ rm -rf clang/tools/scan-view-$(LLVM_VERSION)
+ cp -fR $(CURDIR)/clang/tools/scan-view clang/tools/scan-view-$(LLVM_VERSION)
+
+# Remove some license files
+ rm -f $(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/include/llvm/Support/LICENSE.TXT
+
+# Disable CMake's package validation checks for target files that we may remove.
+ sed -i '/_IMPORT_CHECK_TARGETS \(Polly\|sancov\)/ {s|^|#|}' $(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/lib/cmake/llvm/LLVMExports-*.cmake
+
+# Disable CMake's package validation checks for binaries that may not be installed
+ sed -i 's|.*_IMPORT_CHECK_FILES_FOR_.*/bin/.*)|#&|' $(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/lib/cmake/clang/ClangTargets-*.cmake
+
+# Managed in python-lldb-X.Y.links.in
+ rm -f $(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/lib/python*/site-packages/lldb/_lldb.so
+
+# Manage the polly files. Sometimes, we build them. Sometimes not.
+ if test "$(POLLY_ENABLE)" = yes; then \
+ mkdir -p $(CURDIR)/debian/libclang-$(LLVM_VERSION)-dev/usr/lib/llvm-$(LLVM_VERSION)/lib/ $(CURDIR)/debian/libclang-common-$(LLVM_VERSION)-dev/usr/lib/llvm-$(LLVM_VERSION)/include/polly/; \
+ mv -f $(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/lib/libpolly* \
+ $(CURDIR)/debian/libclang-$(LLVM_VERSION)-dev/usr/lib/llvm-$(LLVM_VERSION)/lib/; \
+ rm -rf $(CURDIR)/debian/libclang-common-$(LLVM_VERSION)-dev/usr/lib/llvm-$(LLVM_VERSION)/include/polly; \
+ mv -f $(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/include/polly/ \
+ $(CURDIR)/debian/libclang-common-$(LLVM_VERSION)-dev/usr/lib/llvm-$(LLVM_VERSION)/include/; \
+ fi
+
+# Rename OCaml bindings
+ if test "$(OCAML_ENABLE)" = yes; then \
+ mkdir -p "$(DEB_INST)$(OCAML_STDLIB_DIR)"; \
+ mkdir -p "$(DEB_INST)usr/lib/llvm-$(LLVM_VERSION)/docs/ocaml/html/html"; \
+ mkdir -p "$(DEB_INST)usr/lib/llvm-$(LLVM_VERSION)/share/doc/llvm/ocaml-html/"; \
+ if test -d "$(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/lib/ocaml"; then \
+ mv -f "$(DEB_INST)usr/lib/llvm-$(LLVM_VERSION)/lib/ocaml" \
+ "$(DEB_INST)$(OCAML_STDLIB_DIR)/llvm-$(LLVM_VERSION)"; \
+ fi; \
+ fi
+ rm -rf bin
+
+# Delete the target build directory to save some space on the build systems
+# All the files have been installed in $(CURDIR)/debian/tmp/ already
+ rm -rf $(TARGET_BUILD)
+
+
+override_dh_makeshlibs:
+ dh_makeshlibs -plibclang$(SONAME_EXT)-$(LLVM_VERSION) -V"libclang$(SONAME_EXT)-$(LLVM_VERSION) (>= 1:6.0~svn298832-1~)"
+ dh_makeshlibs -pliblldb-$(LLVM_VERSION) -V"liblldb-$(LLVM_VERSION) (>= 1:6.0~svn298832-1~)"
+ dh_makeshlibs -plibllvm$(LLVM_VERSION) -V"libllvm$(LLVM_VERSION) (>= 1:6.0~svn298832-1~)"
+ dh_makeshlibs --remaining-packages
+
+override_dh_shlibdeps:
+# Ignore asan libraries. They would trigger dependencies to multiarch libraries
+ dh_shlibdeps -l$(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/lib/ -Xlibclang_rt.asan -Xlibclang_rt.asan -Xlibclang_rt.asan-*.so -Xlibclang_rt.asan-*.so
+
+override_dh_installman:
+ dh_installman
+# Make sure that lli manpage is only in llvm-3.2-runtime (See #697117)
+ rm -f $(CURDIR)/debian/llvm-$(LLVM_VERSION)/usr/share/man/man1/lli*
+
+
+override_dh_strip:
+ : # running out of diskspace on the buildds
+ find $(TARGET_BUILD) -name '*.o' -o -name '*.a' | xargs -r rm -f
+ifeq (0, $(strip $(shell dpkg --compare-versions $(DH_VERSION) ge 9.20160114; echo $$?)))
+ : # If we don't have the right version of debhelper, don't run the option
+ dh_strip -p libclang$(SONAME_EXT)-$(LLVM_VERSION) --dbgsym-migration='libclang$(SONAME_EXT)-$(LLVM_VERSION)-dbg (<< 1:6.0-2~)'
+ dh_strip -p libllvm$(LLVM_VERSION) --dbgsym-migration='libllvm$(LLVM_VERSION)-dbg (<< 1:6.0-2~)'
+ dh_strip -p liblldb-$(LLVM_VERSION) --dbgsym-migration='liblldb-$(LLVM_VERSION)-dbg (<< 1:6.0-2~)'
+endif
+# ifeq (${LLD_ENABLE},yes)
+# dh_strip -p liblld-$(LLVM_VERSION) --dbg-package=liblld-$(LLVM_VERSION)-dbg
+# endif
+ dh_strip -a
+
+
+override_dh_install:
+# cp $(TARGET_BUILD)/lib/libLLVM-$(LLVM_VERSION).so $(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/lib/libLLVM-$(LLVM_VERSION).so.$(SONAME_EXT)
+ifeq (${POLLY_ENABLE},yes)
+# only for arch:any builds
+ifneq (,$(filter libclang-common-$(LLVM_VERSION)-dev, $(shell dh_listpackages)))
+ dh_install -p libclang-common-$(LLVM_VERSION)-dev usr/lib/llvm-$(LLVM_VERSION)/lib/cmake/polly/*.cmake usr/lib/llvm-$(LLVM_VERSION)/lib/cmake/polly
+# On old Debian & Ubuntu, removing the files is necessary
+ rm -rf debian/tmp/usr/lib/llvm-$(LLVM_VERSION)/lib/cmake/polly/*.cmake
+else
+ rm -rf $(CURDIR)/debian/tmp/usr/lib/llvm-$(LLVM_VERSION)/lib/cmake/polly/*.cmake
+endif
+endif
+ dh_install --fail-missing
+
+override_dh_installdeb:
+# Managed by the package
+ dh_installdeb -a
+
+ rm -f $(CURDIR)/debian/tmp/usr/lib/llvm-$(LLVM_VERSION)/lib/python*/site-packages/lldb/__init__.pyc $(CURDIR)/debian/python-lldb-$(LLVM_VERSION)/usr/lib/llvm-$(LLVM_VERSION)/lib/python*/site-packages/lldb/__init__.pyc
+ rm -f $(CURDIR)/debian/clang-$(LLVM_VERSION)-examples/usr/share/doc/clang-$(LLVM_VERSION)-examples/examples/*Make*
+
+# Remove auto generated python pyc
+ find $(CURDIR)/debian/llvm-$(LLVM_VERSION)-tools/usr/lib/llvm-$(LLVM_VERSION)/ -name '*.pyc' | xargs -r rm -f
+
+ifeq (${RUN_TEST},yes)
+# List of the archs we know we have 100 % tests working
+ARCH_LLVM_TEST_OK := i386 amd64
+
+override_dh_auto_test:
+
+# LLVM tests
+ifneq (,$(findstring $(DEB_HOST_ARCH),$(ARCH_LLVM_TEST_OK)))
+# logs the output to check-llvm_build_log.txt for validation through autopkgtest
+ $(MAKE) $(NJOBS) -C $(TARGET_BUILD) check-llvm | tee check-llvm_build_log.txt
+else
+ $(MAKE) $(NJOBS) -C $(TARGET_BUILD) check-llvm || true
+endif
+
+# Clang tests
+ $(MAKE) $(NJOBS) -C $(TARGET_BUILD) check-clang || true
+
+# Clang extra tests (ex: clang-tidy)
+ $(MAKE) $(NJOBS) -C $(TARGET_BUILD) check-clang-tools || true
+
+# LLD tests
+ifeq (${LLD_ENABLE},yes)
+ $(MAKE) $(NJOBS) -C $(TARGET_BUILD) check-lld || true
+endif
+
+# Sanitizer
+ $(MAKE) $(NJOBS) -C $(TARGET_BUILD) check-sanitizer || true
+
+# LLDB tests
+ifeq (,$(filter $(DEB_HOST_ARCH), $(LLDB_DISABLE_ARCHS) armhf armel))
+ifneq (,$(filter codecoverage,$(DEB_BUILD_OPTIONS)))
+# Create a symlink to run the testsuite: see https://bugs.archlinux.org/task/50759
+ cd $(CURDIR)/$(TARGET_BUILD)/lib/python*/site-packages/; \
+ if test ! -e _lldb.so; then \
+ ln -s lldb/_lldb.so; \
+ fi
+ LD_LIBRARY_PATH=$$LD_LIBRARY_PATH:$(CURDIR)/$(TARGET_BUILD)/lib/ $(MAKE) $(NJOBS) -C $(TARGET_BUILD) check-lldb || true
+ # remove the workaround
+ rm $(CURDIR)/$(TARGET_BUILD)/lib/python*/site-packages/_lldb.so
+endif
+endif
+
+# Polly tests
+ifeq (${POLLY_ENABLE},yes)
+ $(MAKE) $(NJOBS) -C $(TARGET_BUILD) check-polly || true
+endif
+
+# Managed by debian build system
+ rm -f $(CURDIR)/$(TARGET_BUILD)/lib/python*/site-packages/lldb/_lldb.so
+
+# polly tests
+ if test "$(POLLY_ENABLE)" = yes; then \
+ cd $(TARGET_BUILD)/ && LD_LIBRARY_PATH=$$LD_LIBRARY_PATH:$(DEB_INST)/usr/lib/llvm-$(LLVM_VERSION)/lib/ $(MAKE) -C tools/polly/test/ check-polly || true; \
+ fi
+
+# The compression of the code coverage report is done in the
+# hook B21GetCoverageResults on the server
+ if test "$(CODECOVERAGE)" = "yes"; then \
+ REPORT=reports/llvm-toolchain.info; \
+ mkdir -p reports/; \
+ lcov --directory $(TARGET_BUILD)/ --capture --ignore-errors source --output-file $$REPORT; \
+ lcov --remove $$REPORT "/usr*" -o $$REPORT; \
+ genhtml -o reports/coverage --show-details --highlight --legend $$REPORT; \
+ fi
+override_dh_auto_test:
+endif
+
+
+override_dh_gencontrol:
+ dh_gencontrol -- $(control_vars)
+
+
+override_dh_auto_clean:
+ rm -rf $(TARGET_BUILD) tools/clang/include/clang/Debian/debian_path.h docs/_build/ clang/docs/_build tools/clang/docs/_html/
+# QA tools
+ rm -rf cov-int/ reports/
+ rm -f `ls debian/*.in|sed -e "s|.in$$||g"`
+ find utils -name '*.pyc' | xargs -r rm -f
+ # Use -I because a test has a space in its name
+ find lldb/test -iname '*.pyc' | xargs -I{} -r rm -f {}
+ find test -name '*.pyc' -o -name '*.cm[ix]' | xargs -r rm -f
+ find test/Bindings -name '*.o' | xargs -r rm -f
+ rm -f tools/clang tools/polly tools/lld tools/lldb projects/compiler-rt
+ rm -rf tools/clang/tools/extra clang/tools/extra/
+ rm -f $(CURDIR)/utils/vim/llvm-$(LLVM_VERSION).vim $(CURDIR)/utils/vim/tablegen-$(LLVM_VERSION).vim
+ rm -f $(CURDIR)/clang/tools/clang-format/clang-format-diff-$(LLVM_VERSION)
+ rm -f $(CURDIR)/clang/tools/clang-format/clang-format-$(LLVM_VERSION).py
+
+
+.PHONY: override_dh_strip preconfigure
--- /dev/null
+# Removed by patch remove-dbtree.diff
+source: source-is-missing clang/www/analyzer/scripts/dbtree.js
+# No longer used (we are using cmake now)
+source: outdated-autotools-helper-file autoconf/config.guess 2011-08-20
+source: outdated-autotools-helper-file autoconf/config.sub 2011-11-02
+# Reported here https://bugs.llvm.org/show_bug.cgi?id=32962
+# No activity, silent it to avoid false positive in automation
+source: license-problem-convert-utf-code lib/Support/ConvertUTF.cpp
+
--- /dev/null
+3.0 (quilt)
--- /dev/null
+Tests: llvm
+Depends: @
+Restrictions: build-needed
+
--- /dev/null
+#!/bin/sh
+# Checks llvm build passing on architectiures known to have 100% tests workings
+
+if grep -q "Unexpected Failure" check-llvm_build_log.txt; then
+ exit 1
+else
+ echo "build OK"
+fi
+rm check-llvm_build_log.txt
--- /dev/null
+version=3
+opts=uversionmangle=s/\.(tar.*|tgz|zip|gz|bz2)$//i,dversionmangle=s/[-.+~]?(cvs|svn|git|snapshot|pre|hg)(.*)$//i,pasv \
+https://llvm.org/releases/download.html (?:.*/)?clang-?_?([\d+\.]+|\d+)\.(tar.*|tgz|zip|gz|bz2|) debian debian/orig-tar.sh
+
projects / llvm-toolchain-6.0.git / commitdiff