vlapic_set_irq(vcpu_vlapic(v), vector, 0);
}
- else if ( is_hvm_pv_evtchn_vcpu(v) )
+ else if ( is_hvm_pv_evtchn_domain(v->domain) )
vcpu_kick(v);
else if ( v->vcpu_id == 0 )
hvm_set_callback_irq_level(v);
#define has_32bit_shinfo(d) ((d)->arch.has_32bit_shinfo)
+/*
+ * Set to true if either the global vector-type callback or per-vCPU
+ * LAPIC vectors are used. Assume all vCPUs will use
+ * HVMOP_set_evtchn_upcall_vector as long as the initial vCPU does.
+ */
#define is_hvm_pv_evtchn_domain(d) (is_hvm_domain(d) && \
- (d)->arch.hvm.irq->callback_via_type == HVMIRQ_callback_vector)
-#define is_hvm_pv_evtchn_vcpu(v) (is_hvm_pv_evtchn_domain(v->domain))
+ ((d)->arch.hvm.irq->callback_via_type == HVMIRQ_callback_vector || \
+ (d)->vcpu[0]->arch.hvm.evtchn_upcall_vector))
#define is_domain_direct_mapped(d) ((void)(d), 0)
#define VCPU_TRAP_NONE 0
res->a |= XEN_HVM_CPUID_DOMID_PRESENT;
res->c = d->domain_id;
+ /*
+ * Per-vCPU event channel upcalls are implemented and work
+ * correctly with PIRQs routed over event channels.
+ */
+ res->a |= XEN_HVM_CPUID_UPCALL_VECTOR;
+
break;
case 5: /* PV-specific parameters */
* field from 8 to 15 bits, allowing to target APIC IDs up 32768.
*/
#define XEN_HVM_CPUID_EXT_DEST_ID (1u << 5)
+/*
+ * Per-vCPU event channel upcalls work correctly with physical IRQs
+ * bound to event channels.
+ */
+#define XEN_HVM_CPUID_UPCALL_VECTOR (1u << 6)
/*
* Leaf 6 (0x40000x05)