x86: Use defines for bits of MSR_IA32_DEBUGCTLMSR instead of numbers

Signed-off-by: Dietmar Hahn <dietmar.hahn@ts.fujitsu.com>
Committed-by: Jan Beulich <jbeulich@suse.com>

diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
index 1e2086309822c78c4cbde8b3ccf4dcc9fa6bb6ac..935b25b68161e450133048d72d708d08bf277a00 100644 (file)
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -1944,11 +1944,12 @@ static int vmx_msr_write_intercept(unsigned int msr, uint64_t msr_content)
         break;
     case MSR_IA32_DEBUGCTLMSR: {
         int i, rc = 0;
+        uint64_t supported = IA32_DEBUGCTLMSR_LBR | IA32_DEBUGCTLMSR_BTF;
 
-        if ( !msr_content || (msr_content & ~3) )
+        if ( !msr_content || (msr_content & ~supported) )
             break;
 
-        if ( msr_content & 1 )
+        if ( msr_content & IA32_DEBUGCTLMSR_LBR )
         {
             const struct lbr_info *lbr = last_branch_msr_get();
             if ( lbr == NULL )

diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index b6f7b9ac40ceceb7cbaea46f6b89dcef1731cc62..2057ac5c2e4f86369b9e11b7a08c8d98dae11708 100644 (file)
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -3376,12 +3376,12 @@ void write_efer(u64 val)
 static void ler_enable(void)
 {
     u64 debugctl;
-    
+
     if ( !this_cpu(ler_msr) )
         return;
 
     rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);
-    wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl | 1);
+    wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl | IA32_DEBUGCTLMSR_LBR);
 }
 
 void do_debug(struct cpu_user_regs *regs)

diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index 2f78a24266d0ef0ebaa5dae6ceb22fa0fcebbae4..4c773741e827bac1ee9d2544d6e2b025cc26501d 100644 (file)
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -65,11 +65,14 @@
 #define MSR_MTRRdefType                        0x000002ff
 
 #define MSR_IA32_DEBUGCTLMSR           0x000001d9
+#define IA32_DEBUGCTLMSR_LBR           (1<<0) /* Last Branch Record */
+#define IA32_DEBUGCTLMSR_BTF           (1<<1) /* Single Step on Branches */
+
 #define MSR_IA32_LASTBRANCHFROMIP      0x000001db
 #define MSR_IA32_LASTBRANCHTOIP                0x000001dc
 #define MSR_IA32_LASTINTFROMIP         0x000001dd
 #define MSR_IA32_LASTINTTOIP           0x000001de
- 
+
 #define MSR_IA32_MTRR_PHYSBASE0     0x00000200
 #define MSR_IA32_MTRR_PHYSMASK0     0x00000201
 #define MSR_IA32_MTRR_PHYSBASE1     0x00000202