ARM: add Calxeda Midway platform
authorAndre Przywara <andre.przywara@linaro.org>
Tue, 13 Aug 2013 15:13:07 +0000 (17:13 +0200)
committerIan Campbell <ian.campbell@citrix.com>
Tue, 20 Aug 2013 14:24:06 +0000 (15:24 +0100)
Calxeda Midway is an ARMv7 server platform with Cortex-A15 cores.
The peripheral side has many similarities with the machine known as
Highbank.
Add Calxeda Midway to the list of supported platforms to avoid a
warning on boot and provide the proper reset method.

Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
xen/arch/arm/platforms/Makefile
xen/arch/arm/platforms/midway.c [new file with mode: 0644]
xen/include/asm-arm/platforms/midway.h [new file with mode: 0644]

index ff2b65b26536e0734cf74d0ef85466200f11dd72..6ee8e6a7f222f20a4c0037956d8a351e6a58b74a 100644 (file)
@@ -1,2 +1,3 @@
 obj-y += vexpress.o
 obj-y += exynos5.o
+obj-y += midway.o
diff --git a/xen/arch/arm/platforms/midway.c b/xen/arch/arm/platforms/midway.c
new file mode 100644 (file)
index 0000000..2d3be1b
--- /dev/null
@@ -0,0 +1,62 @@
+/*
+ * xen/arch/arm/platforms/midway.c
+ *
+ * Calxeda Midway specific settings
+ *
+ * Andre Przywara <andre.przywara@linaro.org>
+ * Copyright (c) 2013 Linaro Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <xen/mm.h>
+#include <xen/vmap.h>
+#include <asm/platforms/midway.h>
+#include <asm/platform.h>
+
+static void midway_reset(void)
+{
+    void __iomem *pmu;
+
+    BUILD_BUG_ON((MW_SREG_PWR_REQ & PAGE_MASK) !=
+                 (MW_SREG_A15_PWR_CTRL & PAGE_MASK));
+
+    pmu = ioremap_nocache(MW_SREG_PWR_REQ & PAGE_MASK, PAGE_SIZE);
+    if ( !pmu )
+    {
+        dprintk(XENLOG_ERR, "Unable to map PMU\n");
+        return;
+    }
+
+    iowritel(pmu + (MW_SREG_PWR_REQ & ~PAGE_MASK), MW_PWR_HARD_RESET);
+    iowritel(pmu + (MW_SREG_A15_PWR_CTRL & ~PAGE_MASK), 1);
+    iounmap(pmu);
+}
+
+static const char const *midway_dt_compat[] __initdata =
+{
+    "calxeda,ecx-2000",
+    NULL
+};
+
+PLATFORM_START(midway, "CALXEDA MIDWAY")
+    .compatible = midway_dt_compat,
+    .reset = midway_reset,
+PLATFORM_END
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/include/asm-arm/platforms/midway.h b/xen/include/asm-arm/platforms/midway.h
new file mode 100644 (file)
index 0000000..099e435
--- /dev/null
@@ -0,0 +1,21 @@
+#ifndef __ASM_ARM_PLATFORMS_MIDWAY_H
+#define __ASM_ASM_PLATFORMS_MIDWAY_H
+
+/* addresses of SREG registers for resetting the SoC */
+#define MW_SREG_PWR_REQ             0xfff3cf00
+#define MW_SREG_A15_PWR_CTRL        0xfff3c200
+
+#define MW_PWR_SUSPEND              0
+#define MW_PWR_SOFT_RESET           1
+#define MW_PWR_HARD_RESET           2
+#define MW_PWR_SHUTDOWN             3
+
+#endif /* __ASM_ARM_PLATFORMS_MIDWAY_H */
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */