xen: arm: Set EL1 register width in HCR_EL2 during context switch.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>

diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index bf204d3bb750279e35c6d60ae4eb6488d07ab405..b4d99f190c0d8b91c5a13b8a17a923ab5fa08f59 100644 (file)
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -207,6 +207,11 @@ static void ctxt_switch_to(struct vcpu *n)
 
     isb();
 
+    if ( is_pv32_domain(n->domain) )
+        hcr &= ~HCR_RW;
+    else
+        hcr |= HCR_RW;
+
     WRITE_SYSREG(hcr, HCR_EL2);
     isb();
 

diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h
index 2c208210016a6de2911798bd1254244483b4ac98..59215b82c2d28c577234128022322e301ecf3e93 100644 (file)
--- a/xen/include/asm-arm/processor.h
+++ b/xen/include/asm-arm/processor.h
@@ -49,6 +49,7 @@
 #define PSR_GUEST_INIT  (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK)
 
 /* HCR Hyp Configuration Register */
+#define HCR_RW          (1<<31) /* ARM64 only */
 #define HCR_TGE         (1<<27)
 #define HCR_TVM         (1<<26)
 #define HCR_TTLB        (1<<25)